Initialize other pheripherals

This commit is contained in:
Attila Body 2019-10-07 11:47:37 +02:00
parent ec4df11c61
commit ffec0e2b57
69 changed files with 25802 additions and 620 deletions

View file

@ -1,232 +1,279 @@
#MicroXplorer Configuration settings - do not modify
Dma.MEMTOMEM.12.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.12.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.12.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.12.Instance=DMA2_Stream4
Dma.MEMTOMEM.12.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.12.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.12.MemInc=DMA_MINC_DISABLE
Dma.MEMTOMEM.12.Mode=DMA_NORMAL
Dma.MEMTOMEM.12.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.12.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.12.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.12.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.MEMTOMEM.13.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.13.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.13.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.13.Instance=DMA2_Stream0
Dma.MEMTOMEM.13.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.13.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.13.MemInc=DMA_MINC_ENABLE
Dma.MEMTOMEM.13.Mode=DMA_NORMAL
Dma.MEMTOMEM.13.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.13.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.13.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.13.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.13.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.Request0=UART4_RX
Dma.Request1=UART4_TX
Dma.Request10=USART6_RX
Dma.Request11=USART6_TX
Dma.Request12=MEMTOMEM
Dma.Request13=MEMTOMEM
Dma.Request2=USART3_RX
Dma.Request3=USART3_TX
Dma.Request4=UART5_RX
Dma.Request5=UART5_TX
Dma.Request6=USART2_RX
Dma.Request7=USART2_TX
Dma.Request8=USART1_RX
Dma.Request9=USART1_TX
Dma.MEMTOMEM.8.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.8.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.8.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.8.Instance=DMA2_Stream4
Dma.MEMTOMEM.8.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.8.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.8.MemInc=DMA_MINC_DISABLE
Dma.MEMTOMEM.8.Mode=DMA_NORMAL
Dma.MEMTOMEM.8.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.8.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.8.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.8.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.MEMTOMEM.9.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.9.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.9.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.9.Instance=DMA2_Stream3
Dma.MEMTOMEM.9.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.9.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.9.MemInc=DMA_MINC_ENABLE
Dma.MEMTOMEM.9.Mode=DMA_NORMAL
Dma.MEMTOMEM.9.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.9.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.9.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.9.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.Request0=USART3_RX
Dma.Request1=USART3_TX
Dma.Request10=UART4_RX
Dma.Request11=UART4_TX
Dma.Request12=SPI1_RX
Dma.Request13=SPI1_TX
Dma.Request2=USART2_RX
Dma.Request3=USART2_TX
Dma.Request4=USART1_RX
Dma.Request5=USART1_TX
Dma.Request6=USART6_RX
Dma.Request7=USART6_TX
Dma.Request8=MEMTOMEM
Dma.Request9=MEMTOMEM
Dma.RequestsNb=14
Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_RX.0.Instance=DMA1_Stream2
Dma.UART4_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART4_RX.0.MemInc=DMA_MINC_ENABLE
Dma.UART4_RX.0.Mode=DMA_NORMAL
Dma.UART4_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_RX.0.Priority=DMA_PRIORITY_LOW
Dma.UART4_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART4_TX.1.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART4_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_TX.1.Instance=DMA1_Stream4
Dma.UART4_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART4_TX.1.MemInc=DMA_MINC_ENABLE
Dma.UART4_TX.1.Mode=DMA_NORMAL
Dma.UART4_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_TX.1.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_TX.1.Priority=DMA_PRIORITY_LOW
Dma.UART4_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART5_RX.4.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART5_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART5_RX.4.Instance=DMA1_Stream0
Dma.UART5_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART5_RX.4.MemInc=DMA_MINC_ENABLE
Dma.UART5_RX.4.Mode=DMA_NORMAL
Dma.UART5_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART5_RX.4.PeriphInc=DMA_PINC_DISABLE
Dma.UART5_RX.4.Priority=DMA_PRIORITY_MEDIUM
Dma.UART5_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART5_TX.5.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART5_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART5_TX.5.Instance=DMA1_Stream7
Dma.UART5_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART5_TX.5.MemInc=DMA_MINC_ENABLE
Dma.UART5_TX.5.Mode=DMA_NORMAL
Dma.UART5_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART5_TX.5.PeriphInc=DMA_PINC_DISABLE
Dma.UART5_TX.5.Priority=DMA_PRIORITY_MEDIUM
Dma.UART5_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_RX.8.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.8.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.8.Instance=DMA2_Stream2
Dma.USART1_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_RX.8.MemInc=DMA_MINC_ENABLE
Dma.USART1_RX.8.Mode=DMA_NORMAL
Dma.USART1_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_RX.8.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_RX.8.Priority=DMA_PRIORITY_MEDIUM
Dma.USART1_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_TX.9.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART1_TX.9.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_TX.9.Instance=DMA2_Stream7
Dma.USART1_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_TX.9.MemInc=DMA_MINC_ENABLE
Dma.USART1_TX.9.Mode=DMA_NORMAL
Dma.USART1_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_TX.9.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_TX.9.Priority=DMA_PRIORITY_MEDIUM
Dma.USART1_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_RX.6.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_RX.6.Instance=DMA1_Stream5
Dma.USART2_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.6.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.6.Mode=DMA_NORMAL
Dma.USART2_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.6.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.6.Priority=DMA_PRIORITY_MEDIUM
Dma.USART2_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_TX.7.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_TX.7.Instance=DMA1_Stream6
Dma.USART2_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.7.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.7.Mode=DMA_NORMAL
Dma.USART2_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.7.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.7.Priority=DMA_PRIORITY_MEDIUM
Dma.USART2_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.2.Instance=DMA1_Stream1
Dma.USART3_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.2.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.2.Mode=DMA_NORMAL
Dma.USART3_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.2.Priority=DMA_PRIORITY_MEDIUM
Dma.USART3_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_TX.3.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.3.Instance=DMA1_Stream3
Dma.USART3_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.3.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.3.Mode=DMA_NORMAL
Dma.USART3_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.3.Priority=DMA_PRIORITY_MEDIUM
Dma.USART3_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_RX.10.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART6_RX.10.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_RX.10.Instance=DMA2_Stream1
Dma.USART6_RX.10.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_RX.10.MemInc=DMA_MINC_ENABLE
Dma.USART6_RX.10.Mode=DMA_NORMAL
Dma.USART6_RX.10.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_RX.10.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_RX.10.Priority=DMA_PRIORITY_MEDIUM
Dma.USART6_RX.10.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_TX.11.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART6_TX.11.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_TX.11.Instance=DMA2_Stream6
Dma.USART6_TX.11.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_TX.11.MemInc=DMA_MINC_ENABLE
Dma.USART6_TX.11.Mode=DMA_NORMAL
Dma.USART6_TX.11.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_TX.11.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_TX.11.Priority=DMA_PRIORITY_MEDIUM
Dma.USART6_TX.11.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.SPI1_RX.12.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI1_RX.12.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_RX.12.Instance=DMA2_Stream0
Dma.SPI1_RX.12.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_RX.12.MemInc=DMA_MINC_ENABLE
Dma.SPI1_RX.12.Mode=DMA_NORMAL
Dma.SPI1_RX.12.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_RX.12.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_RX.12.Priority=DMA_PRIORITY_LOW
Dma.SPI1_RX.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.SPI1_TX.13.Direction=DMA_MEMORY_TO_PERIPH
Dma.SPI1_TX.13.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_TX.13.Instance=DMA2_Stream5
Dma.SPI1_TX.13.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_TX.13.MemInc=DMA_MINC_ENABLE
Dma.SPI1_TX.13.Mode=DMA_NORMAL
Dma.SPI1_TX.13.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_TX.13.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_TX.13.Priority=DMA_PRIORITY_LOW
Dma.SPI1_TX.13.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART4_RX.10.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART4_RX.10.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_RX.10.Instance=DMA1_Stream2
Dma.UART4_RX.10.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART4_RX.10.MemInc=DMA_MINC_ENABLE
Dma.UART4_RX.10.Mode=DMA_NORMAL
Dma.UART4_RX.10.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_RX.10.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_RX.10.Priority=DMA_PRIORITY_LOW
Dma.UART4_RX.10.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART4_TX.11.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART4_TX.11.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_TX.11.Instance=DMA1_Stream4
Dma.UART4_TX.11.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART4_TX.11.MemInc=DMA_MINC_ENABLE
Dma.UART4_TX.11.Mode=DMA_NORMAL
Dma.UART4_TX.11.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_TX.11.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_TX.11.Priority=DMA_PRIORITY_LOW
Dma.UART4_TX.11.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_RX.4.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.4.Instance=DMA2_Stream2
Dma.USART1_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_RX.4.MemInc=DMA_MINC_ENABLE
Dma.USART1_RX.4.Mode=DMA_NORMAL
Dma.USART1_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_RX.4.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_RX.4.Priority=DMA_PRIORITY_MEDIUM
Dma.USART1_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_TX.5.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART1_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_TX.5.Instance=DMA2_Stream7
Dma.USART1_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_TX.5.MemInc=DMA_MINC_ENABLE
Dma.USART1_TX.5.Mode=DMA_NORMAL
Dma.USART1_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_TX.5.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_TX.5.Priority=DMA_PRIORITY_MEDIUM
Dma.USART1_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_RX.2.Instance=DMA1_Stream5
Dma.USART2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_RX.2.MemInc=DMA_MINC_ENABLE
Dma.USART2_RX.2.Mode=DMA_NORMAL
Dma.USART2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.2.Priority=DMA_PRIORITY_MEDIUM
Dma.USART2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_TX.3.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_TX.3.Instance=DMA1_Stream6
Dma.USART2_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.3.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.3.Mode=DMA_NORMAL
Dma.USART2_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.3.Priority=DMA_PRIORITY_MEDIUM
Dma.USART2_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.0.Instance=DMA1_Stream1
Dma.USART3_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.0.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.0.Mode=DMA_NORMAL
Dma.USART3_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.0.Priority=DMA_PRIORITY_MEDIUM
Dma.USART3_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_TX.1.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.1.Instance=DMA1_Stream3
Dma.USART3_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.1.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.1.Mode=DMA_NORMAL
Dma.USART3_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.1.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.1.Priority=DMA_PRIORITY_MEDIUM
Dma.USART3_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_RX.6.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART6_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_RX.6.Instance=DMA2_Stream1
Dma.USART6_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_RX.6.MemInc=DMA_MINC_ENABLE
Dma.USART6_RX.6.Mode=DMA_NORMAL
Dma.USART6_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_RX.6.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_RX.6.Priority=DMA_PRIORITY_MEDIUM
Dma.USART6_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_TX.7.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART6_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_TX.7.Instance=DMA2_Stream6
Dma.USART6_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_TX.7.MemInc=DMA_MINC_ENABLE
Dma.USART6_TX.7.Mode=DMA_NORMAL
Dma.USART6_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_TX.7.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_TX.7.Priority=DMA_PRIORITY_MEDIUM
Dma.USART6_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
FATFS.IPParameters=_USE_MKFS,_USE_LFN,_LFN_UNICODE,_FS_TINY,_FS_LOCK,USE_DMA_CODE_SD
FATFS.USE_DMA_CODE_SD=0
FATFS._FS_LOCK=3
FATFS._FS_TINY=0
FATFS._LFN_UNICODE=1
FATFS._USE_LFN=1
FATFS._USE_MKFS=0
File.Version=6
KeepUserPlacement=false
Mcu.Family=STM32F4
Mcu.IP0=CRC
Mcu.IP1=DMA
Mcu.IP10=USART3
Mcu.IP11=USART6
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SPI1
Mcu.IP5=SYS
Mcu.IP6=UART4
Mcu.IP7=UART5
Mcu.IP8=USART1
Mcu.IP9=USART2
Mcu.IPNb=12
Mcu.IP10=UART4
Mcu.IP11=USART1
Mcu.IP12=USART2
Mcu.IP13=USART3
Mcu.IP14=USART6
Mcu.IP15=USB_OTG_FS
Mcu.IP2=FATFS
Mcu.IP3=FSMC
Mcu.IP4=NVIC
Mcu.IP5=RCC
Mcu.IP6=SDIO
Mcu.IP7=SPI1
Mcu.IP8=SPI2
Mcu.IP9=SYS
Mcu.IPNb=16
Mcu.Name=STM32F407V(E-G)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=PB11
Mcu.Pin11=PC6
Mcu.Pin12=PC7
Mcu.Pin13=PA9
Mcu.Pin14=PA10
Mcu.Pin15=PA13
Mcu.Pin16=PA14
Mcu.Pin17=PC10
Mcu.Pin18=PC11
Mcu.Pin19=PC12
Mcu.Pin2=PH0-OSC_IN
Mcu.Pin20=PD2
Mcu.Pin21=PD4
Mcu.Pin22=PD5
Mcu.Pin23=PD6
Mcu.Pin24=PD7
Mcu.Pin25=PB3
Mcu.Pin26=PB4
Mcu.Pin27=PB5
Mcu.Pin28=VP_CRC_VS_CRC
Mcu.Pin29=VP_SYS_VS_Systick
Mcu.Pin3=PH1-OSC_OUT
Mcu.Pin4=PA2
Mcu.Pin5=PA3
Mcu.Pin6=PA6
Mcu.Pin7=PA7
Mcu.Pin8=PB0
Mcu.Pin9=PB10
Mcu.PinsNb=30
Mcu.Pin0=PE3
Mcu.Pin1=PE4
Mcu.Pin10=PA0-WKUP
Mcu.Pin11=PA1
Mcu.Pin12=PA2
Mcu.Pin13=PA3
Mcu.Pin14=PA6
Mcu.Pin15=PA7
Mcu.Pin16=PB0
Mcu.Pin17=PE7
Mcu.Pin18=PE8
Mcu.Pin19=PE9
Mcu.Pin2=PC14-OSC32_IN
Mcu.Pin20=PE10
Mcu.Pin21=PE11
Mcu.Pin22=PE12
Mcu.Pin23=PE13
Mcu.Pin24=PE14
Mcu.Pin25=PE15
Mcu.Pin26=PB10
Mcu.Pin27=PB11
Mcu.Pin28=PB12
Mcu.Pin29=PB13
Mcu.Pin3=PC15-OSC32_OUT
Mcu.Pin30=PB14
Mcu.Pin31=PB15
Mcu.Pin32=PD8
Mcu.Pin33=PD9
Mcu.Pin34=PD10
Mcu.Pin35=PD13
Mcu.Pin36=PD14
Mcu.Pin37=PD15
Mcu.Pin38=PC6
Mcu.Pin39=PC7
Mcu.Pin4=PH0-OSC_IN
Mcu.Pin40=PC8
Mcu.Pin41=PC9
Mcu.Pin42=PA9
Mcu.Pin43=PA10
Mcu.Pin44=PA11
Mcu.Pin45=PA12
Mcu.Pin46=PA13
Mcu.Pin47=PA14
Mcu.Pin48=PC10
Mcu.Pin49=PC11
Mcu.Pin5=PH1-OSC_OUT
Mcu.Pin50=PC12
Mcu.Pin51=PD0
Mcu.Pin52=PD1
Mcu.Pin53=PD2
Mcu.Pin54=PD4
Mcu.Pin55=PD5
Mcu.Pin56=PD7
Mcu.Pin57=PB3
Mcu.Pin58=PB4
Mcu.Pin59=PB5
Mcu.Pin6=PC0
Mcu.Pin60=PB6
Mcu.Pin61=PB7
Mcu.Pin62=PB8
Mcu.Pin63=VP_CRC_VS_CRC
Mcu.Pin64=VP_FATFS_VS_SDIO
Mcu.Pin65=VP_SYS_VS_Systick
Mcu.Pin7=PC1
Mcu.Pin8=PC2
Mcu.Pin9=PC3
Mcu.PinsNb=66
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F407VETx
MxCube.Version=5.3.0
MxDb.Version=DB.5.0.30
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream3_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream4_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream0_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.DMA2_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.DMA2_Stream4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.DMA2_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@ -235,17 +282,26 @@ NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.SPI2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.UART4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UART5_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.USART6_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
PA0-WKUP.Mode=Asynchronous
PA0-WKUP.Signal=UART4_TX
PA1.Mode=Asynchronous
PA1.Signal=UART4_RX
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA11.Mode=Device_Only
PA11.Signal=USB_OTG_FS_DM
PA12.Mode=Device_Only
PA12.Signal=USB_OTG_FS_DP
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
@ -272,31 +328,72 @@ PB10.Mode=Asynchronous
PB10.Signal=USART3_TX
PB11.Mode=Asynchronous
PB11.Signal=USART3_RX
PB12.GPIOParameters=GPIO_Label
PB12.GPIO_Label=T_CS
PB12.Locked=true
PB12.Signal=GPIO_Output
PB13.Locked=true
PB13.Mode=Full_Duplex_Master
PB13.Signal=SPI2_SCK
PB14.Locked=true
PB14.Mode=Full_Duplex_Master
PB14.Signal=SPI2_MISO
PB15.Locked=true
PB15.Mode=Full_Duplex_Master
PB15.Signal=SPI2_MOSI
PB3.Locked=true
PB3.Mode=Full_Duplex_Master
PB3.Signal=SPI1_SCK
PB4.Locked=true
PB4.Mode=Full_Duplex_Master
PB4.Signal=SPI1_MISO
PB5.Locked=true
PB5.Mode=Full_Duplex_Master
PB5.Signal=SPI1_MOSI
PC10.Locked=true
PC10.Mode=Asynchronous
PC10.Signal=UART4_TX
PC11.Locked=true
PC11.Mode=Asynchronous
PC11.Signal=UART4_RX
PC12.Mode=Asynchronous
PC12.Signal=UART5_TX
PB6.GPIOParameters=GPIO_Label
PB6.GPIO_Label=NRF_CE
PB6.Locked=true
PB6.Signal=GPIO_Output
PB7.GPIOParameters=GPIO_Label
PB7.GPIO_Label=NRF_CS
PB7.Locked=true
PB7.Signal=GPIO_Output
PB8.GPIOParameters=GPIO_Label
PB8.GPIO_Label=NRF_IRQ
PB8.Locked=true
PB8.Signal=GPIO_Input
PC0.GPIOParameters=GPIO_Label
PC0.GPIO_Label=DEBUG0
PC0.Locked=true
PC0.Signal=GPIO_Output
PC1.GPIOParameters=GPIO_Label
PC1.GPIO_Label=DEBUG1
PC1.Locked=true
PC1.Signal=GPIO_Output
PC10.Mode=SD_4_bits_Wide_bus
PC10.Signal=SDIO_D2
PC11.Mode=SD_4_bits_Wide_bus
PC11.Signal=SDIO_D3
PC12.Mode=SD_4_bits_Wide_bus
PC12.Signal=SDIO_CK
PC14-OSC32_IN.Mode=LSE-External-Oscillator
PC14-OSC32_IN.Signal=RCC_OSC32_IN
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
PC2.GPIOParameters=GPIO_Label
PC2.GPIO_Label=DEBUG2
PC2.Locked=true
PC2.Signal=GPIO_Output
PC3.GPIOParameters=GPIO_Label
PC3.GPIO_Label=DEBUG3
PC3.Locked=true
PC3.Signal=GPIO_Output
PC6.Mode=Asynchronous
PC6.Signal=USART6_TX
PC7.Mode=Asynchronous
PC7.Signal=USART6_RX
PC8.Mode=SD_4_bits_Wide_bus
PC8.Signal=SDIO_D0
PC9.Mode=SD_4_bits_Wide_bus
PC9.Signal=SDIO_D1
PCC.Checker=false
PCC.Line=STM32F407/417
PCC.MCU=STM32F407V(E-G)Tx
@ -305,24 +402,58 @@ PCC.Seq0=0
PCC.Series=STM32F4
PCC.Temperature=25
PCC.Vdd=3.3
PD2.Mode=Asynchronous
PD2.Signal=UART5_RX
PD4.GPIOParameters=GPIO_Label
PD4.GPIO_Label=DIAG0
PD4.Locked=true
PD4.Signal=GPIO_Output
PD5.GPIOParameters=GPIO_Label
PD5.GPIO_Label=DIAG1
PD5.Locked=true
PD5.Signal=GPIO_Output
PD6.GPIOParameters=GPIO_Label
PD6.GPIO_Label=DIAG2
PD6.Locked=true
PD6.Signal=GPIO_Output
PD7.GPIOParameters=GPIO_Label
PD7.GPIO_Label=DIAG3
PD7.Locked=true
PD7.Signal=GPIO_Output
PD0.Mode=16b-d1
PD0.Signal=FSMC_D2
PD1.Mode=16b-d1
PD1.Signal=FSMC_D3
PD10.Mode=16b-d1
PD10.Signal=FSMC_D15
PD13.Mode=A18_1
PD13.Signal=FSMC_A18
PD14.Mode=16b-d1
PD14.Signal=FSMC_D0
PD15.Mode=16b-d1
PD15.Signal=FSMC_D1
PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDIO_CMD
PD4.Mode=Lcd1
PD4.Signal=FSMC_NOE
PD5.Mode=Lcd1
PD5.Signal=FSMC_NWE
PD7.Mode=NorPsramChipSelect1_1
PD7.Signal=FSMC_NE1
PD8.Mode=16b-d1
PD8.Signal=FSMC_D13
PD9.Mode=16b-d1
PD9.Signal=FSMC_D14
PE10.Mode=16b-d1
PE10.Signal=FSMC_D7
PE11.Mode=16b-d1
PE11.Signal=FSMC_D8
PE12.Mode=16b-d1
PE12.Signal=FSMC_D9
PE13.Mode=16b-d1
PE13.Signal=FSMC_D10
PE14.Mode=16b-d1
PE14.Signal=FSMC_D11
PE15.Mode=16b-d1
PE15.Signal=FSMC_D12
PE3.GPIOParameters=GPIO_PuPd,GPIO_Label
PE3.GPIO_Label=KEY1
PE3.GPIO_PuPd=GPIO_PULLUP
PE3.Locked=true
PE3.Signal=GPIO_Input
PE4.GPIOParameters=GPIO_PuPd,GPIO_Label
PE4.GPIO_Label=KEY0
PE4.GPIO_PuPd=GPIO_PULLUP
PE4.Locked=true
PE4.Signal=GPIO_Input
PE7.Mode=16b-d1
PE7.Signal=FSMC_D4
PE8.Mode=16b-d1
PE8.Signal=FSMC_D5
PE9.Mode=16b-d1
PE9.Signal=FSMC_D6
PH0-OSC_IN.Mode=HSE-External-Oscillator
PH0-OSC_IN.Signal=RCC_OSC_IN
PH1-OSC_OUT.Mode=HSE-External-Oscillator
@ -354,8 +485,8 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-MX_DMA_Init-DMA-false-LL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_SPI1_Init-SPI1-false-LL-true,5-MX_UART4_Init-UART4-false-LL-true,6-MX_UART5_Init-UART5-false-LL-true,7-MX_USART1_UART_Init-USART1-false-LL-true,8-MX_USART2_UART_Init-USART2-false-LL-true,9-MX_USART3_UART_Init-USART3-false-LL-true,10-MX_USART6_UART_Init-USART6-false-LL-true,11-MX_CRC_Init-CRC-false-LL-true
RCC.48MHZClocksFreq_Value=84000000
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-MX_DMA_Init-DMA-false-LL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_UART4_Init-UART4-false-LL-true,5-MX_USART1_UART_Init-USART1-false-LL-true,6-MX_USART2_UART_Init-USART2-false-LL-true,7-MX_USART3_UART_Init-USART3-false-LL-true,8-MX_USART6_UART_Init-USART6-false-LL-true,9-MX_CRC_Init-CRC-false-LL-true,10-MX_FSMC_Init-FSMC-true-HAL-true,11-MX_SDIO_SD_Init-SDIO-true-HAL-true,12-MX_SPI1_Init-SPI1-true-LL-true,13-MX_SPI2_Init-SPI2-true-LL-true,14-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-true-HAL-true,15-MX_FATFS_Init-FATFS-true-HAL-true
RCC.48MHZClocksFreq_Value=48000000
RCC.AHBFreq_Value=168000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
RCC.APB1Freq_Value=42000000
@ -372,14 +503,14 @@ RCC.HCLKFreq_Value=168000000
RCC.HSE_VALUE=8000000
RCC.HSI_VALUE=16000000
RCC.I2SClocksFreq_Value=192000000
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
RCC.LSI_VALUE=32000
RCC.MCO2PinFreq_Value=168000000
RCC.PLLCLKFreq_Value=168000000
RCC.PLLM=4
RCC.PLLN=168
RCC.PLLQCLKFreq_Value=84000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.PLLQ=7
RCC.PLLQCLKFreq_Value=48000000
RCC.RTCFreq_Value=32000
RCC.RTCHSEDivFreq_Value=4000000
RCC.SYSCLKFreq_VALUE=168000000
@ -388,35 +519,18 @@ RCC.VCOI2SOutputFreq_Value=384000000
RCC.VCOInputFreq_Value=2000000
RCC.VCOOutputFreq_Value=336000000
RCC.VcooutputI2S=192000000
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
SPI1.CLKPhase=SPI_PHASE_1EDGE
SPI1.CLKPolarity=SPI_POLARITY_LOW
SPI1.CRCCalculation=SPI_CRCCALCULATION_DISABLE
SPI1.CalculateBaudRate=42.0 MBits/s
SPI1.DataSize=SPI_DATASIZE_8BIT
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.FirstBit=SPI_FIRSTBIT_MSB
SPI1.IPParameters=TIMode,DataSize,FirstBit,BaudRatePrescaler,CLKPolarity,CLKPhase,CRCCalculation,NSS,VirtualType,Mode,Direction,CalculateBaudRate
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI1.Mode=SPI_MODE_MASTER
SPI1.NSS=SPI_NSS_SOFT
SPI1.TIMode=SPI_TIMODE_DISABLE
SPI1.VirtualType=VM_MASTER
UART4.BaudRate=115200
UART4.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,VirtualMode
UART4.Mode=MODE_TX_RX
UART4.OverSampling=UART_OVERSAMPLING_16
UART4.Parity=PARITY_NONE
UART4.StopBits=UART_STOPBITS_1
SPI2.CalculateBaudRate=21.0 MBits/s
SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualType=VM_MASTER
UART4.IPParameters=VirtualMode
UART4.VirtualMode=Asynchronous
UART4.WordLength=WORDLENGTH_8B
UART5.BaudRate=5250000
UART5.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,VirtualMode
UART5.Mode=MODE_TX_RX
UART5.OverSampling=UART_OVERSAMPLING_8
UART5.Parity=PARITY_NONE
UART5.StopBits=UART_STOPBITS_1
UART5.VirtualMode=Asynchronous
UART5.WordLength=WORDLENGTH_8B
USART1.BaudRate=5250000
USART1.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,VirtualMode
USART1.Mode=MODE_TX_RX
@ -449,8 +563,12 @@ USART6.Parity=PARITY_NONE
USART6.StopBits=STOPBITS_1
USART6.VirtualMode=VM_ASYNC
USART6.WordLength=WORDLENGTH_8B
USB_OTG_FS.IPParameters=VirtualMode
USB_OTG_FS.VirtualMode=Device_Only
VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC
VP_FATFS_VS_SDIO.Mode=SDIO
VP_FATFS_VS_SDIO.Signal=FATFS_VS_SDIO
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom