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Attila Body 2020-12-06 00:29:45 +01:00
parent 09263346a5
commit 7672e157a0
27 changed files with 3761 additions and 91 deletions
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@ -17,13 +17,13 @@
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.853080140" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug"> <configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.853080140" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
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<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.305934056" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/> <option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.305934056" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.163659404" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32F103C8Tx" valueType="string"/> <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.163659404" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="true" value="STM32F103C8Tx" valueType="string"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.162671610" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/> <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.162671610" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
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<builder buildPath="${workspace_loc:/NeoPixelF103MVP}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1086059078" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/> <builder buildPath="${workspace_loc:/NeoPixelF103MVP}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1086059078" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.130003299" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler"> <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.130003299" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
@ -71,7 +71,7 @@
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy"/> <listOptionValue builtIn="false" value="../components/"/>
</option> </option>
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<listOptionValue builtIn="false" value="VDD_VALUE=3300"/> <listOptionValue builtIn="false" value="VDD_VALUE=3300"/>
@ -118,6 +118,7 @@
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="components"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
</sourceEntries> </sourceEntries>
</configuration> </configuration>
@ -140,13 +141,13 @@
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.427092296" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/> <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.427092296" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1897240971" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F103C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Inc | ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy | ../Drivers/STM32F1xx_HAL_Driver/Inc | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3 || || || VDD_VALUE=3300 | HSE_VALUE=8000000 | STM32F103xB | LSI_VALUE=40000 | HSI_VALUE=8000000 | HSE_STARTUP_TIMEOUT=100 | USE_FULL_LL_DRIVER | LSE_STARTUP_TIMEOUT=5000 | LSE_VALUE=32768 | PREFETCH_ENABLE=1 || || Drivers | Src | Middlewares | Startup || || || ${workspace_loc:/${ProjName}/STM32F103C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || " valueType="string"/> <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1897240971" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F103C8Tx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Inc | ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Drivers/STM32F1xx_HAL_Driver/Inc | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3 || || || VDD_VALUE=3300 | HSE_VALUE=8000000 | STM32F103xB | LSI_VALUE=40000 | HSI_VALUE=8000000 | HSE_STARTUP_TIMEOUT=100 | USE_FULL_LL_DRIVER | LSE_STARTUP_TIMEOUT=5000 | LSE_VALUE=32768 | PREFETCH_ENABLE=1 || || Drivers | Src | Middlewares | Startup || || || ${workspace_loc:/${ProjName}/STM32F103C8TX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || " valueType="string"/>
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<builder buildPath="${workspace_loc:/NeoPixelF103MVP}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1500348018" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/> <builder buildPath="${workspace_loc:/NeoPixelF103MVP}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1500348018" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2006730064" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler"> <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.2006730064" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
@ -178,7 +179,6 @@
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/include"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy"/>
</option> </option>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.935831936" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/> <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.935831936" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
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@ -194,7 +194,7 @@
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<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/> <listOptionValue builtIn="false" value="../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy"/> <listOptionValue builtIn="false" value="../components/"/>
</option> </option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols.1623578821" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols"> <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols.1623578821" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
<listOptionValue builtIn="false" value="VDD_VALUE=3300"/> <listOptionValue builtIn="false" value="VDD_VALUE=3300"/>
@ -241,6 +241,7 @@
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="components"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
</sourceEntries> </sourceEntries>
</configuration> </configuration>

8
.mxproject
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File diff suppressed because one or more lines are too long

2569
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h Normal file
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File diff suppressed because it is too large Load diff

446
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c Normal file
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@ -0,0 +1,446 @@
/**
******************************************************************************
* @file stm32f1xx_ll_usart.c
* @author MCD Application Team
* @brief USART LL module driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_usart.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_bus.h"
#ifdef USE_FULL_ASSERT
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif
/** @addtogroup STM32F1xx_LL_Driver
* @{
*/
#if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
/** @addtogroup USART_LL
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Macros
* @{
*/
/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
* divided by the smallest oversampling used on the USART (i.e. 8) */
#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4500000U)
/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
/* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
#define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
|| ((__VALUE__) == LL_USART_DIRECTION_RX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
|| ((__VALUE__) == LL_USART_PARITY_EVEN) \
|| ((__VALUE__) == LL_USART_PARITY_ODD))
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
|| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
|| ((__VALUE__) == LL_USART_PHASE_2EDGE))
#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
|| ((__VALUE__) == LL_USART_POLARITY_HIGH))
#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
|| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_1) \
|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_2))
#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup USART_LL_Exported_Functions
* @{
*/
/** @addtogroup USART_LL_EF_Init
* @{
*/
/**
* @brief De-initialize USART registers (Registers restored to their default values).
* @param USARTx USART Instance
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are de-initialized
* - ERROR: USART registers are not de-initialized
*/
ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
{
ErrorStatus status = SUCCESS;
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
if (USARTx == USART1)
{
/* Force reset of USART clock */
LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
/* Release reset of USART clock */
LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
}
else if (USARTx == USART2)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
}
#if defined(USART3)
else if (USARTx == USART3)
{
/* Force reset of USART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
/* Release reset of USART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
}
#endif /* USART3 */
#if defined(UART4)
else if (USARTx == UART4)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
}
#endif /* UART4 */
#if defined(UART5)
else if (USARTx == UART5)
{
/* Force reset of UART clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
/* Release reset of UART clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
}
#endif /* UART5 */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Initialize USART registers according to the specified
* parameters in USART_InitStruct.
* @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
* USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
* @param USARTx USART Instance
* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
* that contains the configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers are initialized according to USART_InitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
{
ErrorStatus status = ERROR;
uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
LL_RCC_ClocksTypeDef rcc_clocks;
/* Check the parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
#if defined(USART_CR1_OVER8)
assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
#endif /* USART_OverSampling_Feature */
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/*---------------------------- USART CR1 Configuration -----------------------
* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
*/
#if defined(USART_CR1_OVER8)
MODIFY_REG(USARTx->CR1,
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
#else
MODIFY_REG(USARTx->CR1,
(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
USART_CR1_TE | USART_CR1_RE),
(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
USART_InitStruct->TransferDirection));
#endif /* USART_OverSampling_Feature */
/*---------------------------- USART CR2 Configuration -----------------------
* Configure USARTx CR2 (Stop bits) with parameters:
* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
*/
LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
/*---------------------------- USART CR3 Configuration -----------------------
* Configure USARTx CR3 (Hardware Flow Control) with parameters:
* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
*/
LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
/*---------------------------- USART BRR Configuration -----------------------
* Retrieve Clock frequency used for USART Peripheral
*/
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
if (USARTx == USART1)
{
periphclk = rcc_clocks.PCLK2_Frequency;
}
else if (USARTx == USART2)
{
periphclk = rcc_clocks.PCLK1_Frequency;
}
#if defined(USART3)
else if (USARTx == USART3)
{
periphclk = rcc_clocks.PCLK1_Frequency;
}
#endif /* USART3 */
#if defined(UART4)
else if (USARTx == UART4)
{
periphclk = rcc_clocks.PCLK1_Frequency;
}
#endif /* UART4 */
#if defined(UART5)
else if (USARTx == UART5)
{
periphclk = rcc_clocks.PCLK1_Frequency;
}
#endif /* UART5 */
else
{
/* Nothing to do, as error code is already assigned to ERROR value */
}
/* Configure the USART Baud Rate :
- valid baud rate value (different from 0) is required
- Peripheral clock as returned by RCC service, should be valid (different from 0).
*/
if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
&& (USART_InitStruct->BaudRate != 0U))
{
status = SUCCESS;
#if defined(USART_CR1_OVER8)
LL_USART_SetBaudRate(USARTx,
periphclk,
USART_InitStruct->OverSampling,
USART_InitStruct->BaudRate);
#else
LL_USART_SetBaudRate(USARTx,
periphclk,
USART_InitStruct->BaudRate);
#endif /* USART_OverSampling_Feature */
/* Check BRR is greater than or equal to 16d */
assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
/* Check BRR is greater than or equal to 16d */
assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
}
}
/* Endif (=> USART not in Disabled state => return ERROR) */
return (status);
}
/**
* @brief Set each @ref LL_USART_InitTypeDef field to default value.
* @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
{
/* Set USART_InitStruct fields to default values */
USART_InitStruct->BaudRate = 9600U;
USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
#if defined(USART_CR1_OVER8)
USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
#endif /* USART_OverSampling_Feature */
}
/**
* @brief Initialize USART Clock related settings according to the
* specified parameters in the USART_ClockInitStruct.
* @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
* USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
* @param USARTx USART Instance
* @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
* that contains the Clock configuration information for the specified USART peripheral.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
* - ERROR: Problem occurred during USART Registers initialization
*/
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
ErrorStatus status = SUCCESS;
/* Check USART Instance and Clock signal output parameters */
assert_param(IS_UART_INSTANCE(USARTx));
assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
/* USART needs to be in disabled state, in order to be able to configure some bits in
CRx registers */
if (LL_USART_IsEnabled(USARTx) == 0U)
{
/*---------------------------- USART CR2 Configuration -----------------------*/
/* If Clock signal has to be output */
if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
{
/* Deactivate Clock signal delivery :
* - Disable Clock Output: USART_CR2_CLKEN cleared
*/
LL_USART_DisableSCLKOutput(USARTx);
}
else
{
/* Ensure USART instance is USART capable */
assert_param(IS_USART_INSTANCE(USARTx));
/* Check clock related parameters */
assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
/*---------------------------- USART CR2 Configuration -----------------------
* Configure USARTx CR2 (Clock signal related bits) with parameters:
* - Enable Clock Output: USART_CR2_CLKEN set
* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
*/
MODIFY_REG(USARTx->CR2,
USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
}
}
/* Else (USART not in Disabled state => return ERROR */
else
{
status = ERROR;
}
return (status);
}
/**
* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
* @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
* whose fields will be set to default values.
* @retval None
*/
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
{
/* Set LL_USART_ClockInitStruct fields with default values */
USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Inc/dma.h
View file

@ -1,7 +1,7 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : dma.h * @file dma.h
* Description : This file contains all the function prototypes for * @brief This file contains all the function prototypes for
* the dma.c file * the dma.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -17,8 +17,8 @@
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __dma_H #ifndef __DMA_H__
#define __dma_H #define __DMA_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -47,10 +47,6 @@ void MX_DMA_Init(void);
} }
#endif #endif
#endif /* __dma_H */ #endif /* __DMA_H__ */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

22
Inc/gpio.h
View file

@ -1,8 +1,8 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : gpio.h * @file gpio.h
* Description : This file contains all the functions prototypes for * @brief This file contains all the function prototypes for
* the gpio * the gpio.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
@ -16,10 +16,10 @@
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __gpio_H #ifndef __GPIO_H__
#define __gpio_H #define __GPIO_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@ -44,14 +44,6 @@ void MX_GPIO_Init(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__ pinoutConfig_H */ #endif /*__ GPIO_H__ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

2
Inc/main.h
View file

@ -37,6 +37,8 @@ extern "C" {
#include "stm32f1xx_ll_utils.h" #include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_pwr.h" #include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_spi.h" #include "stm32f1xx_ll_spi.h"
#include "stm32f1xx_ll_usart.h"
#include "stm32f1xx.h"
#include "stm32f1xx_ll_gpio.h" #include "stm32f1xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT) #if defined(USE_FULL_ASSERT)

20
Inc/spi.h
View file

@ -1,8 +1,8 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : SPI.h * @file spi.h
* Description : This file provides code for the configuration * @brief This file contains all the function prototypes for
* of the SPI instances. * the spi.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
@ -17,8 +17,9 @@
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __spi_H #ifndef __SPI_H__
#define __spi_H #define __SPI_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@ -43,14 +44,7 @@ void MX_SPI1_Init(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__ spi_H */
/** #endif /* __SPI_H__ */
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

50
Inc/usart.h Normal file
View file

@ -0,0 +1,50 @@
/**
******************************************************************************
* @file usart.h
* @brief This file contains all the function prototypes for
* the usart.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USART_H__
#define __USART_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_USART1_UART_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __USART_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

37
NeoPixelF103MVP.ioc
View file

@ -27,27 +27,30 @@ Mcu.IP2=NVIC
Mcu.IP3=RCC Mcu.IP3=RCC
Mcu.IP4=SPI1 Mcu.IP4=SPI1
Mcu.IP5=SYS Mcu.IP5=SYS
Mcu.IPNb=6 Mcu.IP6=USART1
Mcu.IPNb=7
Mcu.Name=STM32F103C(8-B)Tx Mcu.Name=STM32F103C(8-B)Tx
Mcu.Package=LQFP48 Mcu.Package=LQFP48
Mcu.Pin0=PC13-TAMPER-RTC Mcu.Pin0=PC13-TAMPER-RTC
Mcu.Pin1=PC14-OSC32_IN Mcu.Pin1=PC14-OSC32_IN
Mcu.Pin10=VP_FREERTOS_VS_CMSIS_V1 Mcu.Pin10=PA13
Mcu.Pin11=VP_SYS_VS_Systick Mcu.Pin11=PA14
Mcu.Pin12=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin13=VP_SYS_VS_Systick
Mcu.Pin2=PC15-OSC32_OUT Mcu.Pin2=PC15-OSC32_OUT
Mcu.Pin3=PD0-OSC_IN Mcu.Pin3=PD0-OSC_IN
Mcu.Pin4=PD1-OSC_OUT Mcu.Pin4=PD1-OSC_OUT
Mcu.Pin5=PA0-WKUP Mcu.Pin5=PA0-WKUP
Mcu.Pin6=PA5 Mcu.Pin6=PA5
Mcu.Pin7=PA7 Mcu.Pin7=PA7
Mcu.Pin8=PA13 Mcu.Pin8=PA9
Mcu.Pin9=PA14 Mcu.Pin9=PA10
Mcu.PinsNb=12 Mcu.PinsNb=14
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F103C8Tx Mcu.UserName=STM32F103C8Tx
MxCube.Version=6.0.1 MxCube.Version=6.1.0
MxDb.Version=DB.6.0.0 MxDb.Version=DB.6.0.10
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA1_Channel3_IRQn=true\:1\:0\:true\:false\:false\:false\:false\:false NVIC.DMA1_Channel3_IRQn=true\:1\:0\:true\:false\:false\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@ -55,14 +58,20 @@ NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
NVIC.SavedPendsvIrqHandlerGenerated=true NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA0-WKUP.GPIOParameters=GPIO_Speed
PA0-WKUP.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM
PA0-WKUP.Locked=true
PA0-WKUP.Signal=GPIO_Output
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire PA14.Mode=Serial_Wire
@ -71,6 +80,10 @@ PA5.Mode=TX_Only_Simplex_Unidirect_Master
PA5.Signal=SPI1_SCK PA5.Signal=SPI1_SCK
PA7.Mode=TX_Only_Simplex_Unidirect_Master PA7.Mode=TX_Only_Simplex_Unidirect_Master
PA7.Signal=SPI1_MOSI PA7.Signal=SPI1_MOSI
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PC13-TAMPER-RTC.GPIOParameters=GPIO_Speed
PC13-TAMPER-RTC.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM
PC13-TAMPER-RTC.Locked=true PC13-TAMPER-RTC.Locked=true
PC13-TAMPER-RTC.Signal=GPIO_Output PC13-TAMPER-RTC.Signal=GPIO_Output
PC14-OSC32_IN.Mode=LSE-External-Oscillator PC14-OSC32_IN.Mode=LSE-External-Oscillator
@ -109,7 +122,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation= ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-MX_DMA_Init-DMA-false-LL-true,3-SystemClock_Config-RCC-false-LL-false,4-MX_SPI1_Init-SPI1-false-LL-true ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-MX_DMA_Init-DMA-false-LL-true,3-SystemClock_Config-RCC-false-LL-false,4-MX_SPI1_Init-SPI1-false-LL-true,5-MX_USART1_UART_Init-USART1-false-LL-true
RCC.ADCFreqValue=36000000 RCC.ADCFreqValue=36000000
RCC.AHBFreq_Value=72000000 RCC.AHBFreq_Value=72000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2 RCC.APB1CLKDivider=RCC_HCLK_DIV2
@ -137,6 +150,8 @@ SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
SPI1.Mode=SPI_MODE_MASTER SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER SPI1.VirtualType=VM_MASTER
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Mode=SysTick

12
Src/dma.c
View file

@ -1,7 +1,7 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : dma.c * @file dma.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers. * of all the requested memory to memory DMA transfers.
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -53,12 +53,4 @@ void MX_DMA_Init(void)
/* USER CODE END 2 */ /* USER CODE END 2 */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

17
Src/gpio.c
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@ -1,7 +1,7 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : gpio.c * @file gpio.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of all used GPIO pins. * of all used GPIO pins.
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -19,6 +19,7 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "gpio.h" #include "gpio.h"
/* USER CODE BEGIN 0 */ /* USER CODE BEGIN 0 */
/* USER CODE END 0 */ /* USER CODE END 0 */
@ -50,13 +51,23 @@ void MX_GPIO_Init(void)
/**/ /**/
LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_13); LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_13);
/**/
LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_0);
/**/ /**/
GPIO_InitStruct.Pin = LL_GPIO_PIN_13; GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct); LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/**/
GPIO_InitStruct.Pin = LL_GPIO_PIN_0;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
} }
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */

6
Src/main.c
View file

@ -22,6 +22,7 @@
#include "cmsis_os.h" #include "cmsis_os.h"
#include "dma.h" #include "dma.h"
#include "spi.h" #include "spi.h"
#include "usart.h"
#include "gpio.h" #include "gpio.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
@ -84,6 +85,10 @@ int main(void)
NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
/* System interrupt init*/ /* System interrupt init*/
/* PendSV_IRQn interrupt configuration */
NVIC_SetPriority(PendSV_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));
/* SysTick_IRQn interrupt configuration */
NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/ */
@ -104,6 +109,7 @@ int main(void)
MX_GPIO_Init(); MX_GPIO_Init();
MX_DMA_Init(); MX_DMA_Init();
MX_SPI1_Init(); MX_SPI1_Init();
MX_USART1_UART_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
LL_SYSTICK_EnableIT(); LL_SYSTICK_EnableIT();

4
Src/spi.c
View file

@ -1,7 +1,7 @@
/** /**
****************************************************************************** ******************************************************************************
* File Name : SPI.c * @file spi.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of the SPI instances. * of the SPI instances.
****************************************************************************** ******************************************************************************
* @attention * @attention

70
Src/usart.c Normal file
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@ -0,0 +1,70 @@
/**
******************************************************************************
* @file usart.c
* @brief This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* USART1 init function */
void MX_USART1_UART_Init(void)
{
LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
USART_InitStruct.BaudRate = 115200;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART1, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART1);
LL_USART_Enable(USART1);
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

42
components/f1ll/consolehandler.cpp Normal file
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@ -0,0 +1,42 @@
/*
* ll_consolehandler.cpp
*
* Created on: Nov 7, 2019
* Author: abody
*/
#include <string.h>
#include "f1ll/consolehandler.h"
namespace f1ll {
ConsoleHandler::ConsoleHandler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t channelTx)
: UsartCore(usart, dma, channelRx, channelTx)
{
}
void ConsoleHandler::ReceiverIdle(void) {}
void ConsoleHandler::TransmissionComplete(void) {}
void ConsoleHandler::FramingError(void) {}
void ConsoleHandler::Overrun(void) {}
void ConsoleHandler::RxDmaTransferComplete(void) {}
void ConsoleHandler::RxDmaHalfTransfer(void) {}
void ConsoleHandler::RxDmaError(void) {}
void ConsoleHandler::TxDmaTransferComplete(void)
{
LL_USART_EnableIT_TC(m_usart);
LL_DMA_DisableChannel(m_txDma.GetDma(), m_txDma.GetChannel());
}
void ConsoleHandler::TxDmaHalfTransfer(void) {}
void ConsoleHandler::TxDmaError(void) {}
void ConsoleHandler::Print(char const *s)
{
size_t len = strlen(s);
strncpy(m_buffer, s, sizeof( m_buffer));
SetupTransmit(m_buffer, len > sizeof(m_buffer) ? sizeof(m_buffer) : len);
}
} /* namespace f4ll */

45
components/f1ll/consolehandler.h Normal file
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@ -0,0 +1,45 @@
/*
* ll_consolehandler.h
*
* Created on: Nov 7, 2019
* Author: abody
*/
#ifndef LL_CONSOLEHANDLER_H_
#define LL_CONSOLEHANDLER_H_
#include "f1ll/usartcore.h"
#include "singleton.h"
namespace f1ll {
class ConsoleHandler: public UsartCore, public Singleton<ConsoleHandler>
{
friend class Singleton<ConsoleHandler>;
public:
void Print(char const *s);
private:
ConsoleHandler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t channelTx);
// LL_UsartCore pure virtual function implementations
virtual void ReceiverIdle(void);
virtual void TransmissionComplete(void);
virtual void FramingError(void);
virtual void Overrun(void);
virtual void RxDmaTransferComplete(void);
virtual void RxDmaHalfTransfer(void);
virtual void RxDmaError(void);
virtual void TxDmaTransferComplete(void);
virtual void TxDmaHalfTransfer(void);
virtual void TxDmaError(void);
char m_buffer[128];
uint16_t m_used = 0;
};
} /* namespace f4ll */
#endif /* LL_CONSOLEHANDLER_H_ */

30
components/f1ll/dmahelper.cpp Normal file
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@ -0,0 +1,30 @@
/*
q * ll_dmahelper.cpp
*
* Created on: Oct 25, 2019
* Author: abody
*/
#include "f1ll/dmahelper.h"
namespace f1ll {
const uint32_t DmaHelper::m_TEMasks[7] = {DMA_ISR_TEIF1, DMA_ISR_TEIF2, DMA_ISR_TEIF3, DMA_ISR_TEIF4, DMA_ISR_TEIF5, DMA_ISR_TEIF6, DMA_ISR_TEIF7};
const uint32_t DmaHelper::m_HTMasks[7] = {DMA_ISR_HTIF1, DMA_ISR_HTIF2, DMA_ISR_HTIF3, DMA_ISR_HTIF4, DMA_ISR_HTIF5, DMA_ISR_HTIF6, DMA_ISR_HTIF7};
const uint32_t DmaHelper::m_TCMasks[7] = {DMA_ISR_TCIF1, DMA_ISR_TCIF2, DMA_ISR_TCIF3, DMA_ISR_TCIF4, DMA_ISR_TCIF5, DMA_ISR_TCIF6, DMA_ISR_TCIF7};
const uint32_t DmaHelper::m_GIMasks[7] = {DMA_ISR_GIF1, DMA_ISR_GIF2, DMA_ISR_GIF3, DMA_ISR_GIF4, DMA_ISR_GIF5, DMA_ISR_GIF6, DMA_ISR_GIF7};
DmaHelper::DmaHelper(DMA_TypeDef *dma, uint32_t channel)
: m_dma(dma)
, m_channel(channel)
#ifdef DMA2
, m_isReg(dma == DMA1 ? &DMA1->ISR : &DMA2->ISR)
, m_ifcReg(dma == DMA1 ? &DMA1->IFCR : &DMA2->IFCR)
#else
, m_isReg(&DMA1->ISR)
, m_ifcReg(&DMA1->IFCR)
#endif
{
}
} /* namespace f4ll */

49
components/f1ll/dmahelper.h Normal file
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@ -0,0 +1,49 @@
/*
* ll_dmahelper.h
*
* Created on: Oct 25, 2019
* Author: abody
*/
#ifndef LL_DMAHELPER_H_
#define LL_DMAHELPER_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
namespace f1ll {
class DmaHelper {
public:
DmaHelper(DMA_TypeDef *dma, uint32_t channel);
DmaHelper(DmaHelper const &base) = default;
inline DMA_TypeDef* GetDma() const { return m_dma; }
inline uint32_t GetChannel() const { return m_channel; }
inline volatile uint32_t* GetIsReg() const { return m_isReg; }
inline volatile uint32_t* GetIfcReg() const { return m_ifcReg; }
inline uint32_t GetTeMask() const { return m_TEMasks[m_channel - 1]; }
inline uint32_t GetHtMask() const { return m_HTMasks[m_channel - 1]; }
inline uint32_t GetTcMask() const { return m_TCMasks[m_channel - 1]; }
inline uint32_t GetGiMask() const { return m_GIMasks[m_channel - 1]; }
inline bool IsEnabledIt_TE() { return LL_DMA_IsEnabledIT_TE(m_dma, m_channel) != 0; }
inline bool IsEnabledIt_HT() { return LL_DMA_IsEnabledIT_HT(m_dma, m_channel) != 0; }
inline bool IsEnabledIt_TC() { return LL_DMA_IsEnabledIT_TC(m_dma, m_channel) != 0; }
private:
DMA_TypeDef *m_dma;
uint32_t m_channel;
volatile uint32_t *m_isReg;
volatile uint32_t *m_ifcReg;
static const uint32_t m_TEMasks[7];
static const uint32_t m_HTMasks[7];
static const uint32_t m_TCMasks[7];
static const uint32_t m_GIMasks[7];
};
} /* namespace f4ll */
#endif /* LL_DMAHELPER_H_ */

26
components/f1ll/singleton.h Normal file
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@ -0,0 +1,26 @@
#ifndef SINGLETON_H_
#define SINGLETON_H_
#include <utility>
template<typename T> class Singleton {
public:
static T &Instance() { return *m_instance; }
template<typename ... Args>
static T &Init(Args &&... args)
{
static T instance{ std::forward<Args>(args)... };
m_instance = &instance;
return instance;
}
protected:
Singleton() = default;
Singleton(const Singleton &) = delete;
Singleton &operator=(const Singleton &) = delete;
static T *m_instance;
};
template<typename T> T* Singleton<T>::m_instance = nullptr;
#endif /* SINGLETON_H_ */

110
components/f1ll/strutil.cpp Normal file
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@ -0,0 +1,110 @@
#include <stdint.h>
#include "f1ll/strutil.h"
//////////////////////////////////////////////////////////////////////////////
size_t strcpy_ex(char *dst, char const *src)
{
size_t ret = 0;
do {
*dst++ = *src;
++ret;
} while(*src++);
return ret - 1;
}
//////////////////////////////////////////////////////////////////////////////
void strrev(char *first, char *last)
{
char tmp;
while(last > first) {
tmp = *first;
*first++ = *last;
*last-- = tmp;
}
}
//////////////////////////////////////////////////////////////////////////////
char tochr(const uint8_t in, const uint8_t upper)
{
return in + ((in < 10) ? '0' : (upper ? 'A' : 'a') - 10);
}
//////////////////////////////////////////////////////////////////////////////
size_t uitodec(char* buffer, uint32_t data)
{
char *b2 = buffer;
if(!data) {
*b2++ = '0';
*b2 = '\0';
return 1;
}
while(data) {
*b2++ = (data % 10) + '0';
data /= 10;
}
size_t ret = b2 - buffer;
*b2-- = 0;
strrev(buffer, b2);
return ret;
}
//////////////////////////////////////////////////////////////////////////////
size_t uitohex(char* buffer, uint32_t data, uint8_t chars)
{
char *b2 = buffer;
size_t ret = 0;
if(chars == 0xff || !chars)
{
if(!data) {
*b2++ = '0';
*b2 = '\0';
return 1;
}
while(data) {
uint8_t curval = data & 0x0f;
*b2++ = tochr(curval, 1);
data >>= 4;
}
ret = b2 - buffer;
}
else
{
ret = chars;
for(uint8_t pos = 0; pos < (uint8_t)ret; ++pos) {
*b2++ = tochr(data & 0x0f, 1);
data >>= 4;
}
}
*b2-- = 0;
strrev(buffer, b2);
return ret;
}
//////////////////////////////////////////////////////////////////////////////
size_t itodec(char* buffer, int data)
{
if(data < 0) {
*buffer++ = '-';
return uitodec(buffer, -data) + 1;
}
return uitodec(buffer, data);
}
//////////////////////////////////////////////////////////////////////////////
size_t itohex(char* buffer, int data)
{
if(data < 0) {
*buffer++ = '-';
return uitohex(buffer, -data, 0) + 1;
}
return uitohex(buffer, data, 0);
}

31
components/f1ll/strutil.h Normal file
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@ -0,0 +1,31 @@
/*
* strutil.h
*
* Created on: Feb 11, 2017
* Author: compi
*/
#ifndef _STM32PLUS_STRUTIL_H_
#define _STM32PLUS_STRUTIL_H_
#include <stddef.h>
#include <inttypes.h>
#ifdef __cplusplus
extern "C" {
#endif
//////////////////////////////////////////////////////////////////////////////
size_t strcpy_ex(char *dst, char const *src);
size_t uitodec(char* buffer, uint32_t data);
size_t uitohex(char* buffer, uint32_t data, uint8_t chars);
size_t itodec(char* buffer, int data);
size_t itohex(char* buffer, int data);
void strrev(char *first, char *last);
char tochr(const uint8_t in, const uint8_t upper);
#ifdef __cplusplus
}
#endif
#endif /* _STM32PLUS_STRUTIL_H_ */

120
components/f1ll/usartcore.cpp Normal file
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@ -0,0 +1,120 @@
/*
* ll_dmadrivenusartcore.cpp
*
* Created on: Nov 4, 2019
* Author: abody
*/
#include "f1ll/usartcore.h"
namespace f1ll {
UsartCore::UsartCore(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t channelTx)
: m_usart(usart)
, m_rxDma(dma, channelRx)
, m_txDma(dma, channelTx)
{
uint32_t status = usart->SR;
volatile uint32_t tmpreg = usart->DR; // clearing some of the error/status bits in the USART
(void) tmpreg;
(void) status;
*m_txDma.GetIfcReg() =
m_txDma.GetGiMask();
*m_rxDma.GetIfcReg() =
m_rxDma.GetGiMask();
LL_DMA_EnableIT_HT(dma, channelRx);
LL_DMA_EnableIT_TC(dma, channelRx);
LL_DMA_EnableIT_TE(dma, channelRx);
LL_DMA_EnableIT_HT(dma, channelTx);
LL_DMA_EnableIT_TC(dma, channelTx);
LL_DMA_EnableIT_TE(dma, channelTx);
}
void UsartCore::UsartIsr()
{
uint32_t status = m_usart->SR;
volatile uint32_t tmpreg = m_usart->DR; // clearing some of the error/status bits in the HW
(void) tmpreg;
if(LL_USART_IsEnabledIT_TC(m_usart) && LL_USART_IsActiveFlag_TC(m_usart)) { // transmission complete
LL_USART_DisableIT_TC(m_usart);
TransmissionComplete();
}
if(LL_USART_IsEnabledIT_IDLE(m_usart) && (status & USART_SR_IDLE)) {
ReceiverIdle();
}
if(LL_USART_IsEnabledIT_ERROR(m_usart)) {
if(status & USART_SR_FE) {
FramingError();
}
if(status & USART_SR_ORE) {
Overrun();
}
}
}
void UsartCore::RxDmaIsr()
{
if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
*m_rxDma.GetIfcReg() = m_rxDma.GetTcMask();
if(m_rxDma.IsEnabledIt_TC())
RxDmaTransferComplete();
}
if(*m_rxDma.GetIsReg() & m_rxDma.GetHtMask()) {
*m_rxDma.GetIfcReg() = m_rxDma.GetHtMask();
if(m_rxDma.IsEnabledIt_HT())
RxDmaHalfTransfer();
}
if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
*m_rxDma.GetIfcReg() = m_rxDma.GetTeMask();
if(m_rxDma.IsEnabledIt_TE())
RxDmaError();
}
}
void UsartCore::TxDmaIsr()
{
if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
*m_txDma.GetIfcReg() = m_txDma.GetTcMask();
if(m_txDma.IsEnabledIt_TC())
TxDmaTransferComplete();
}
if(*m_txDma.GetIsReg() & m_txDma.GetHtMask()) {
*m_txDma.GetIfcReg() = m_txDma.GetHtMask();
if(m_txDma.IsEnabledIt_HT())
TxDmaHalfTransfer();
}
if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
*m_txDma.GetIfcReg() = m_txDma.GetTeMask();
if(m_txDma.IsEnabledIt_TE())
TxDmaError();
}
}
void UsartCore::SetupTransmit(void const *buffer, uint16_t length)
{
LL_DMA_ConfigAddresses(m_txDma.GetDma(), m_txDma.GetChannel(), reinterpret_cast<uint32_t>(buffer),
LL_USART_DMA_GetRegAddr(m_usart), LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
LL_DMA_SetDataLength(m_txDma.GetDma(), m_txDma.GetChannel(), length);
LL_USART_EnableDMAReq_TX(m_usart);
LL_DMA_EnableChannel(m_txDma.GetDma(), m_txDma.GetChannel());
}
void UsartCore::SetupReceive(void *buffer, uint16_t length)
{
LL_DMA_ConfigAddresses(m_rxDma.GetDma(), m_rxDma.GetChannel(), LL_USART_DMA_GetRegAddr(m_usart),
reinterpret_cast<uint32_t>(buffer), LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
LL_DMA_SetDataLength(m_rxDma.GetDma(), m_rxDma.GetChannel(), length);
LL_USART_EnableDMAReq_RX(m_usart);
LL_USART_ClearFlag_ORE(m_usart);
LL_DMA_EnableChannel(m_rxDma.GetDma(), m_rxDma.GetChannel());
}
} /* namespace f4ll */

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components/f1ll/usartcore.h Normal file
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/*
* ll_dmadrivenusartcore.h
*
* Created on: Nov 4, 2019
* Author: abody
*/
#ifndef LL_USARTCORE_H_
#define LL_USARTCORE_H_
#include <platform/usart_ll.h>
#include "f1ll/dmahelper.h"
namespace f1ll {
class UsartCore
{
public:
static inline void HandleUsartIrq(UsartCore *_this) { _this->UsartIsr(); }
static inline void HandleRxDmaIrq(UsartCore *_this) { _this->RxDmaIsr(); }
static inline void HandleTxDmaIrq(UsartCore *_this) { _this->TxDmaIsr(); }
void SetupTransmit(void const *buffer, uint16_t length);
void SetupReceive(void *buffer, uint16_t length);
protected:
UsartCore(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t streamTx);
USART_TypeDef *m_usart;
DmaHelper m_rxDma;
DmaHelper m_txDma;
private:
virtual void ReceiverIdle(void) = 0;
virtual void TransmissionComplete(void) = 0;
virtual void FramingError(void) = 0;
virtual void Overrun(void) = 0;
virtual void RxDmaTransferComplete(void) = 0;
virtual void RxDmaHalfTransfer(void) = 0;
virtual void RxDmaError(void) = 0;
virtual void TxDmaTransferComplete(void) = 0;
virtual void TxDmaHalfTransfer(void) = 0;
virtual void TxDmaError(void) = 0;
void UsartIsr();
void RxDmaIsr();
void TxDmaIsr();
};
} /* namespace f4ll */
#endif /* LL_USARTCORE_H_ */

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#ifndef __PLATFORM_CRC_LL_H_INCLUDED
#define __PLATFORM_CRC_LL_H_INCLUDED
#include "crc.h"
#endif // __PLATFORM_CRC_LL_H_INCLUDED

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#ifndef __PLATFORM_DMA_LL_H_INCLUDED
#define __PLATFORM_DMA_LL_H_INCLUDED
#include "stm32f1xx_ll_dma.h"
#endif // __PLATFORM_DMA_LL_H_INCLUDED

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#ifndef __PLATFORM_USART_LL_H_INCLUDED
#define __PLATFORM_USART_LL_H_INCLUDED
#include <stm32f1xx_ll_usart.h>
#endif // __PLATFORM_USART_LL_H_INCLUDED