WIP - ready to debug

This commit is contained in:
Attila Body 2019-10-31 14:01:38 +01:00
parent 663d68baf1
commit 9670e6d397
14 changed files with 893 additions and 52 deletions

15
lib/StaticList.h Normal file
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/*
* StaticList.h
*
* Created on: Oct 29, 2019
* Author: abody
*/
#ifndef STATICLIST_H_
#define STATICLIST_H_
#endif /* STATICLIST_H_ */

156
lib/ll_crchandler.cpp Normal file
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/*
* ll_crchandler.cpp
*
* Created on: Oct 26, 2019
* Author: compi
*/
#include "ll_crchandler.h"
namespace f4ll {
LL_CrcHandler::LL_CrcHandler(DMA_TypeDef *dma, uint32_t stream)
: m_dma(dma, stream)
{
LL_DMA_EnableIT_TC(dma, stream);
LL_DMA_EnableIT_TE(dma, stream);
LL_DMA_SetM2MDstAddress(dma, stream, (uint32_t)&CRC->DR);
}
void LL_CrcHandler::AttachSlot(Slot &slot)
{
for(unsigned int i = 0; i < slot.m_taskCount; ++i ) {
auto &task(slot.m_tasks[i]);
task.m_address = nullptr;
task.m_wordCount = 0;
task.m_callback = nullptr;
task.m_callbackParam = 0;
}
slot.m_next = m_firstSlot;
uint32_t prim = __get_PRIMASK();
__disable_irq();
m_firstSlot = &slot;
__set_PRIMASK(prim);
}
bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam)
{
uint32_t prim = __get_PRIMASK();
bool immediate;
// TODO: do we need sanity check here? (is slot attached, is prio in range, etc...?)
while(IsActive(slot,prio));
__disable_irq();
immediate = m_activeSlot == nullptr;
slot.m_tasks[prio].m_address = (!immediate) ? address : nullptr;
slot.m_tasks[prio].m_wordCount = (len+3)/4;
slot.m_tasks[prio].m_callback = cb;
slot.m_tasks[prio].m_callbackParam = cbParam;
if(immediate) {
m_activeSlot = &slot;
m_activePrio = prio;
}
__set_PRIMASK(prim);
if(immediate) {
CRC->CR = 1;
LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), (uint32_t)address);
LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), (len+3)/4);
LL_DMA_EnableStream(m_dma.GetDma(), m_dma.GetStream());
}
return immediate;
}
bool LL_CrcHandler::IsActive(Slot &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount != 0;
}
bool LL_CrcHandler::IsQueued(Slot &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_address != nullptr;
}
bool LL_CrcHandler::IsRunning(Slot &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount && ! slot.m_tasks[prio].m_address;
}
void LL_CrcHandler::DmaTransferCompleted(void)
{
if(* m_dma.GetIsReg() & m_dma.GetTcMask()) { // DMA transfer complete
* m_dma.GetIcfReg() = m_dma.GetTcMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcSucceeded(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = CRC->DR;
}
}
else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
*m_dma.GetIcfReg() = m_dma.GetTeMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcFailed(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = -1;
}
}
m_activeSlot->m_tasks[m_activePrio].m_callback = nullptr;
m_activeSlot->m_tasks[m_activePrio].m_callbackParam = 0;
m_activeSlot->m_tasks[m_activePrio].m_wordCount = 0;
StartNextTask();
}
void LL_CrcHandler::StartNextTask(void)
{
bool stillMore;
int index = 0;
do {
Slot *slot = m_firstSlot;
stillMore = false;
while(slot) {
if(index < slot->m_taskCount) {
if(slot->m_tasks[index].m_address) {
m_activeSlot = slot;
m_activePrio = index;
CRC->CR = 1;
LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), reinterpret_cast<uint32_t>(slot->m_tasks[index].m_address));
LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), slot->m_tasks[index].m_wordCount);
LL_DMA_EnableStream(m_dma.GetDma(), m_dma.GetStream());
slot->m_tasks[index].m_address = nullptr; // marking as started
return;
}
if(index + 1 < slot->m_taskCount)
stillMore = true;
}
slot = slot->m_next;
}
++index;
} while(stillMore);
m_activeSlot = nullptr;
}
void LL_CrcHandler::WaitResults(Slot &slot, uint8_t prio) const
{
while(IsQueued(slot, prio));
while(IsActive(slot, prio));
}
uint32_t LL_CrcHandler::Compute(
Slot &slot, uint8_t prio, void const *address, uint16_t len)
{
uint32_t result;
Enqueue(slot, prio, address, len, nullptr, reinterpret_cast<uintptr_t>(&result));
while(IsActive(slot, prio));
return result;
}
} // namespace f4ll

87
lib/ll_crchandler.h Normal file
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/*
* ll_crchandler.h
*
* Created on: Oct 26, 2019
* Author: compi
*/
#ifndef LL_CRCHANDLER_H_
#define LL_CRCHANDLER_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
#include "ll_dmahelper.h"
#include "singleton.h"
extern "C" void _HandleCrcDmaIrq(void);
namespace f4ll {
class LL_CrcHandler : public Singleton<LL_CrcHandler>
{
friend class Singleton<LL_CrcHandler>;
public:
struct ICallback
{
virtual void CrcSucceeded(uintptr_t callbackParam, uint32_t crc, int prio) = 0;
virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio) = 0;
};
class Slot
{
friend class LL_CrcHandler;
public:
struct CrcTask {
void const * volatile m_address; // changed to nullptr when execution starts
uint16_t volatile m_wordCount;
LL_CrcHandler::ICallback *m_callback;
uintptr_t m_callbackParam;
};
private:
Slot *m_next = nullptr;
uint8_t m_taskCount;
CrcTask m_tasks[1];
protected:
Slot(unsigned int taskCount) : m_taskCount(taskCount) {}
Slot() = delete;
Slot(Slot const &other) = delete;
};
// DON't try this at home! we "extend" LL_CrcHandler::m_tasks this way
template <uint8_t n> class TSlot : public Slot
{
public:
TSlot() : Slot(n) {}
private:
TSlot::CrcTask _m_tasks[n-1];
};
void AttachSlot(Slot &slot);
bool Enqueue(Slot &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam);
uint32_t Compute(Slot &slot, uint8_t prio, void const *address, uint16_t len);
bool IsActive(Slot &slot, uint8_t prio) const;
bool IsQueued(Slot &slot, uint8_t prio) const;
bool IsRunning(Slot &slot, uint8_t prio) const;
private:
LL_CrcHandler(DMA_TypeDef *dma, uint32_t stream);
friend void ::_HandleCrcDmaIrq(void);
void DmaTransferCompleted(void);
void StartNextTask(void);
void WaitResults(Slot &slot, uint8_t prio) const;
LL_DmaHelper m_dma;
Slot * volatile m_firstSlot = nullptr;
Slot * volatile m_activeSlot = nullptr;
int volatile m_activePrio;
};
} // namespace f4ll
#endif /* LL_CRCHANDLER_H_ */

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@ -1,5 +1,5 @@
/*
* ll_dmahelper.cpp
q * ll_dmahelper.cpp
*
* Created on: Oct 25, 2019
* Author: abody
@ -9,11 +9,11 @@
namespace f4ll {
static const uint32_t m_FEMasks[8] = {DMA_LISR_FEIF0, DMA_LISR_FEIF1, DMA_LISR_FEIF2, DMA_LISR_FEIF3, DMA_HISR_FEIF4, DMA_HISR_FEIF5, DMA_HISR_FEIF6, DMA_HISR_FEIF7};
static const uint32_t m_DMEMasks[8] = {DMA_LISR_DMEIF0, DMA_LISR_DMEIF1, DMA_LISR_DMEIF2, DMA_LISR_DMEIF3, DMA_HISR_DMEIF4, DMA_HISR_DMEIF5, DMA_HISR_DMEIF6, DMA_HISR_DMEIF7};
static const uint32_t m_TEMasks[8] = {DMA_LISR_TEIF0, DMA_LISR_TEIF1, DMA_LISR_TEIF2, DMA_LISR_TEIF3, DMA_HISR_TEIF4, DMA_HISR_TEIF5, DMA_HISR_TEIF6, DMA_HISR_TEIF7};
static const uint32_t m_HTMasks[8] = {DMA_LISR_HTIF0, DMA_LISR_HTIF1, DMA_LISR_HTIF2, DMA_LISR_HTIF3, DMA_HISR_HTIF4, DMA_HISR_HTIF5, DMA_HISR_HTIF6, DMA_HISR_HTIF7};
static const uint32_t m_TCMasks[8] = {DMA_LISR_TCIF0, DMA_LISR_TCIF1, DMA_LISR_TCIF2, DMA_LISR_TCIF3, DMA_HISR_TCIF4, DMA_HISR_TCIF5, DMA_HISR_TCIF6, DMA_HISR_TCIF7};
const uint32_t LL_DmaHelper::m_FEMasks[8] = {DMA_LISR_FEIF0, DMA_LISR_FEIF1, DMA_LISR_FEIF2, DMA_LISR_FEIF3, DMA_HISR_FEIF4, DMA_HISR_FEIF5, DMA_HISR_FEIF6, DMA_HISR_FEIF7};
const uint32_t LL_DmaHelper::m_DMEMasks[8] = {DMA_LISR_DMEIF0, DMA_LISR_DMEIF1, DMA_LISR_DMEIF2, DMA_LISR_DMEIF3, DMA_HISR_DMEIF4, DMA_HISR_DMEIF5, DMA_HISR_DMEIF6, DMA_HISR_DMEIF7};
const uint32_t LL_DmaHelper::m_TEMasks[8] = {DMA_LISR_TEIF0, DMA_LISR_TEIF1, DMA_LISR_TEIF2, DMA_LISR_TEIF3, DMA_HISR_TEIF4, DMA_HISR_TEIF5, DMA_HISR_TEIF6, DMA_HISR_TEIF7};
const uint32_t LL_DmaHelper::m_HTMasks[8] = {DMA_LISR_HTIF0, DMA_LISR_HTIF1, DMA_LISR_HTIF2, DMA_LISR_HTIF3, DMA_HISR_HTIF4, DMA_HISR_HTIF5, DMA_HISR_HTIF6, DMA_HISR_HTIF7};
const uint32_t LL_DmaHelper::m_TCMasks[8] = {DMA_LISR_TCIF0, DMA_LISR_TCIF1, DMA_LISR_TCIF2, DMA_LISR_TCIF3, DMA_HISR_TCIF4, DMA_HISR_TCIF5, DMA_HISR_TCIF6, DMA_HISR_TCIF7};
LL_DmaHelper::LL_DmaHelper(DMA_TypeDef *dma, uint32_t stream)
: m_dma(dma)

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@ -16,17 +16,17 @@ namespace f4ll {
class LL_DmaHelper {
public:
LL_DmaHelper(DMA_TypeDef *dma, uint32_t stream);
~LL_DmaHelper() = delete;
LL_DmaHelper(LL_DmaHelper const &base) = default;
inline DMA_TypeDef* GetDMA() { return m_dma; }
inline uint32_t GetStream() { return m_stream; }
inline volatile uint32_t* GetIsReg() { return m_isReg; }
inline volatile uint32_t* GetIcfReg() { return m_ifcReg; }
inline uint32_t GetFeMask() { return m_FEMasks[m_stream]; }
inline uint32_t GetDmeMask() { return m_DMEMasks[m_stream]; }
inline uint32_t GetTeMask() { return m_TEMasks[m_stream]; }
inline uint32_t GetHtMask() { return m_HTMasks[m_stream]; }
inline uint32_t GetTcMask() { return m_TCMasks[m_stream]; }
inline DMA_TypeDef* GetDma() const { return m_dma; }
inline uint32_t GetStream() const { return m_stream; }
inline volatile uint32_t* GetIsReg() const { return m_isReg; }
inline volatile uint32_t* GetIcfReg() const { return m_ifcReg; }
inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; }
inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; }
inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; }
inline uint32_t GetHtMask() const { return m_HTMasks[m_stream]; }
inline uint32_t GetTcMask() const { return m_TCMasks[m_stream]; }
private:
DMA_TypeDef *m_dma;
@ -34,11 +34,11 @@ private:
volatile uint32_t *m_isReg;
volatile uint32_t *m_ifcReg;
static const uint32_t m_FEMasks[8];
static const uint32_t m_DMEMasks[8];
static const uint32_t m_TEMasks[8];
static const uint32_t m_HTMasks[8];
static const uint32_t m_TCMasks[8];
static const uint32_t m_FEMasks[8];
static const uint32_t m_DMEMasks[8];
static const uint32_t m_TEMasks[8];
static const uint32_t m_HTMasks[8];
static const uint32_t m_TCMasks[8];
};
} /* namespace f4ll */

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lib/ll_hsusart.cpp Normal file
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/*
* ll_hsusart_impl.h
*
* Created on: Oct 29, 2019
* Author: abody
*/
#include <string.h>
#include "ll_hsusart.h"
namespace f4ll {
template<typename T> static inline T RoundUpTo4(T input)
{
return (input + 3) & (((T)-1) - 3);
}
LL_HsUsart::LL_HsUsart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx, uint32_t streamTx)
: m_usart(usart)
, m_rxDma(dma, streamRx)
, m_txDma(dma, streamTx)
{
LL_CrcHandler::Instance().AttachSlot(m_crcSlot);
LL_DMA_EnableIT_TC(dma, streamRx);
LL_DMA_EnableIT_TE(dma, streamRx);
LL_DMA_EnableIT_TC(dma, streamTx);
LL_DMA_EnableIT_TE(dma, streamTx);
LL_USART_EnableIT_IDLE(usart);
memset(&m_stats, 0, sizeof(m_stats));
}
uint8_t *LL_HsUsart::GetTxPacketBuffer(void)
{
return m_txBuffer.packet.payload;
}
USART_TypeDef* LL_HsUsart::GetUsart(void)
{
return m_usart;
}
LL_HsUsart::Stats const & LL_HsUsart::GetStats(void)
{
return m_stats;
}
bool LL_HsUsart::IsTxBusy()
{
return m_txBuffer.busy;
}
bool LL_HsUsart::IsTxFailed()
{
return m_txBuffer.error;
}
bool LL_HsUsart::IsRxBusy(bool second)
{
return m_rxBuffers[second].busy;
}
bool LL_HsUsart::IsRxFailed(bool second)
{
return m_rxBuffers[second].error;
}
void LL_HsUsart::RxProcessed(bool second)
{
m_rxBuffers[second].busy = false;
m_rxBuffers[second].error = false;
}
void LL_HsUsart::SetCallback(IHsUsartCallback *callback, uintptr_t callbackParam)
{
m_userCallback = callback;
m_userCallbackParam = callbackParam;
}
void LL_HsUsart::BuildHeader(Packet &packet, uint8_t serialNo, uint8_t length)
{
uint8_t hash = STARTMARKER;
packet.header.startByte = STARTMARKER;
packet.header.serial = serialNo;
hash ^= serialNo;
packet.header.payloadLength = length;
hash ^= length;
packet.header.hash = hash;
}
bool LL_HsUsart::CheckHeader(PacketHeader &header)
{
return header.startByte == STARTMARKER && (header.startByte ^ header.serial ^ header.payloadLength) == header.hash;
}
void LL_HsUsart::PostPacket(uint8_t const *payload, uint8_t length, bool waitForCrcQueue)
{
uint16_t payloadLength = RoundUpTo4((uint16_t)length);
BuildHeader(m_txBuffer.packet, m_txSerialNo++, length);
if(payload)
memcpy(m_txBuffer.packet.payload, payload, length);
m_txBuffer.requestedLength = sizeof(m_txBuffer.packet.header) + payloadLength + sizeof(uint32_t);
m_txBuffer.busy = true;
m_txBuffer.error = false;
LL_CrcHandler::Instance().Enqueue(m_crcSlot, 0, &m_txBuffer.packet, sizeof(PacketHeader) + payloadLength,
nullptr, reinterpret_cast<uintptr_t>(m_txBuffer.packet.payload + payloadLength));
while(waitForCrcQueue && LL_CrcHandler::Instance().IsQueued(m_crcSlot, 0));
LL_DMA_ConfigAddresses(m_txDma.GetDma(), m_txDma.GetStream(), reinterpret_cast<uint32_t>(&m_txBuffer.packet),
LL_USART_DMA_GetRegAddr(m_usart), LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
LL_DMA_SetDataLength(m_txDma.GetDma(), m_txDma.GetStream(), m_txBuffer.requestedLength);
LL_USART_EnableDMAReq_TX(m_usart);
LL_DMA_EnableStream(m_txDma.GetDma(), m_txDma.GetStream());
++m_stats.sent;
}
void LL_HsUsart::SetupReceive()
{
int packetIndex = m_rxBufferSelector;
LL_DMA_ConfigAddresses(m_rxDma.GetDma(), m_rxDma.GetStream(), LL_USART_DMA_GetRegAddr(m_usart),
reinterpret_cast<uint32_t>(&m_rxBuffers[packetIndex]), LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
m_rxBuffers[packetIndex].requestedLength = sizeof(m_rxBuffers[packetIndex].packet);
LL_DMA_SetDataLength(m_rxDma.GetDma(), m_rxDma.GetStream(), m_rxBuffers[packetIndex].requestedLength); // payload already have extra room for hash
LL_USART_EnableDMAReq_RX(m_usart);
LL_USART_ClearFlag_ORE(m_usart);
LL_DMA_EnableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
}
void LL_HsUsart::UsartIrq(void)
{
if(LL_USART_IsActiveFlag_IDLE(m_usart) && LL_USART_IsEnabledIT_IDLE(m_usart)) { // receiver idle
LL_USART_ClearFlag_IDLE(m_usart);
uint16_t rcvdLen = m_rxBuffers[m_rxBufferSelector].requestedLength - LL_DMA_GetDataLength(m_rxDma.GetDma(), m_rxDma.GetStream());
if(rcvdLen >= sizeof(PacketHeader)) {
if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header)) {
if(rcvdLen >= sizeof(PacketHeader) +
RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength)
+ sizeof(uint32_t))
LL_DMA_DisableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
else
++m_stats.premature_payload;
} else {
m_rxBuffers[m_rxBufferSelector].error = 1;
LL_DMA_DisableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
}
} else
++m_stats.premature_hdr;
}
else if(LL_USART_IsActiveFlag_TC(m_usart) && LL_USART_IsEnabledIT_TC(m_usart)) { // transmission complete
LL_USART_DisableIT_TC(m_usart);
LL_USART_DisableDirectionTx(m_usart); // enforcing an idle frame
LL_USART_EnableDirectionTx(m_usart);
m_txBuffer.busy = 0;
}
}
void LL_HsUsart::RxDmaIrq()
{
++m_stats.rcvd;
if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
*m_rxDma.GetIcfReg() = m_rxDma.GetTcMask();
if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
&m_rxBuffers[m_rxBufferSelector].packet,
sizeof(PacketHeader) + RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength),
this, m_rxBufferSelector);
else {
++m_stats.hdrError;
m_rxBuffers[m_rxBufferSelector].error = true;
}
} else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
*m_rxDma.GetIcfReg() = m_rxDma.GetTeMask();
m_rxBuffers[m_rxBufferSelector].error = 1;
++m_stats.dmaError;
}
m_rxBufferSelector = !m_rxBufferSelector;
if(m_rxBuffers[m_rxBufferSelector].busy)
++m_stats.overrun;
SetupReceive();
}
void LL_HsUsart::CrcSucceeded(uintptr_t callbackParam, uint32_t crc, int prio)
{
Buffer &buf(m_rxBuffers[static_cast<int>(callbackParam)]);
buf.busy = 1;
if(*(uint32_t*) (buf.packet.payload + RoundUpTo4((uint16_t)buf.packet.header.payloadLength)) != crc) {
buf.error = 1;
buf.errorInfo = crc;
++m_stats.payloadErrror;
}
if(m_userCallback)
buf.busy = !m_userCallback->PacketReceived(this, m_userCallbackParam, buf.packet);
}
void LL_HsUsart::CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio)
{
Buffer &buf(m_rxBuffers[static_cast<int>(callbackParam)]);
buf.busy = buf.error = true;
buf.errorInfo = 0;
++m_stats.payloadErrror;
if(m_userCallback)
buf.busy = !m_userCallback->PacketReceived(this, m_userCallbackParam, buf.packet);
}
void LL_HsUsart::TxDmaIrq()
{
if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
*m_txDma.GetIcfReg() = m_txDma.GetTcMask();
LL_USART_EnableIT_TC(m_usart);
LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
}
else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
*m_txDma.GetIcfReg() = m_txDma.GetTeMask();
m_txBuffer.error = 1;
++m_stats.dmaError;
}
if(*m_txDma.GetIsReg() & m_txDma.GetFeMask())
*m_txDma.GetIcfReg() = m_txDma.GetFeMask();
if(*m_txDma.GetIsReg() & m_txDma.GetHtMask())
*m_txDma.GetIcfReg() = m_txDma.GetHtMask();
if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask())
*m_txDma.GetIcfReg() = m_txDma.GetDmeMask();
}
} // namespace f4ll

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lib/ll_hsusart.h Normal file
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/*
* ll_HsUsart.h
*
* Created on: Oct 29, 2019
* Author: abody
*/
#ifndef LL_HSUSART_H_
#define LL_HSUSART_H_
#include <platform/usart_ll.h>
#include <ll_crchandler.h>
namespace f4ll {
struct DMAINFO;
class LL_HsUsart : public LL_CrcHandler::ICallback
{
public:
LL_HsUsart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream_rx, uint32_t stream_tx);
struct PacketHeader { // !!! size should be multiple of 4 !!!
uint8_t startByte;
uint8_t serial;
uint8_t payloadLength;
uint8_t hash;
};
struct Packet {
PacketHeader header;
uint8_t payload[256+sizeof(uint32_t)]; // extra room for crc32
} __attribute__((aligned));
struct Stats {
uint32_t overrun;
uint32_t hdrError;
uint32_t payloadErrror;
uint32_t pep1, pep2;
uint32_t dmaError;
uint32_t rcvd;
uint32_t premature_hdr;
uint32_t premature_payload;
uint32_t sent;
uint32_t skiped;
};
struct IHsUsartCallback {
virtual bool PacketReceived(LL_HsUsart *caller, uintptr_t userParam, Packet const &packet) = 0;
};
//LL_CRCHandler::ICallback interface functions
virtual void CrcSucceeded(uintptr_t callbackParam, uint32_t crc, int prio);
virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio);
void PostPacket(uint8_t const *payload, uint8_t length, bool waitForCrcQueue = true);
void SetupReceive(void);
void RxProcessed(bool second);
uint8_t* GetTxPacketBuffer(void);
USART_TypeDef* GetUsart(void);
Stats const & GetStats();
bool IsTxBusy();
bool IsTxFailed();
bool IsRxBusy(bool second);
bool IsRxFailed(bool second);
void SetCallback(IHsUsartCallback* callback, uintptr_t callbackParam);
static inline void HandleUsartIrq(LL_HsUsart *obj) {
obj->UsartIrq();
}
static inline void HandleRxDmaIrq(LL_HsUsart *obj) {
obj->RxDmaIrq();
}
static inline void HandleTxDmaIrq(LL_HsUsart *obj) {
obj->TxDmaIrq();
}
private:
void BuildHeader(Packet &packet, uint8_t serialNo, uint8_t length);
bool CheckHeader(PacketHeader &header);
void UsartIrq(void);
void RxDmaIrq(void);
void TxDmaIrq(void);
struct Buffer {
Packet packet;
//transfer area ends here
volatile bool busy = 0;
volatile bool error = 0;
uint16_t requestedLength = 0;
uint32_t errorInfo = 0;
};
static const uint8_t STARTMARKER = 0x95;
USART_TypeDef *m_usart;
LL_DmaHelper m_rxDma;
LL_DmaHelper m_txDma;
uint8_t m_rxSerialNo = -1;
uint8_t m_txSerialNo = -1;
Stats m_stats;
bool m_rxBufferSelector = false;
LL_CrcHandler::TSlot<2> m_crcSlot;
IHsUsartCallback *m_userCallback = nullptr;
uintptr_t m_userCallbackParam = 0;
Buffer m_txBuffer;
Buffer m_rxBuffers[2];
};
}
#endif /* LL_HSUSART_H_ */

27
lib/singleton.h Normal file
View file

@ -0,0 +1,27 @@
#ifndef SINGLETON_H_
#define SINGLETON_H_
#include <utility>
template<typename T> class Singleton {
public:
static T &Instance() { return *m_instance; }
template<typename ... Args>
static T &Init(Args &&... args)
{
static T instance{ std::forward<Args>(args)... };
if(!m_instance)
m_instance = &instance;
return instance;
}
protected:
Singleton() = default;
Singleton(const Singleton &) = delete;
Singleton &operator=(const Singleton &) = delete;
static T *m_instance;
};
template<typename T> T* Singleton<T>::m_instance = nullptr;
#endif /* SINGLETON_H_ */

View file

@ -86,7 +86,8 @@ static inline void BuildHeader(struct usart_buffer *buffer, uint8_t serial, uint
buffer->packet.header.hash = hash;
}
static inline uint8_t CheckHeader(USARTPACKET *packet) {
static inline uint8_t CheckHeader(USARTPACKET *packet)
{
return packet->header.startByte == STARTMARKER && (packet->header.startByte ^ packet->header.serial ^ packet->header.payloadLength) == packet->header.hash;
}
@ -166,7 +167,7 @@ void RxCrcComputedCallback(void *callbackParm, uint32_t calculatedCrc, uint8_t s
struct usart_buffer *ub = (struct usart_buffer*) callbackParm;
if(!success)
ub->error = 1;
else if(*(uint32_t*) (ub->packet.payload + RoundUpTo4(ub->packet.header.payloadLength + 1)))
else if(*(uint32_t*) (ub->packet.payload + RoundUpTo4(ub->packet.header.payloadLength + 1)) == calculatedCrc)
ub->busy = 1;
else {
ub->error = ub->busy = 1;