This commit is contained in:
Attila Body 2025-06-08 21:25:05 +02:00
parent a4e25d702b
commit 66c9d451ab
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
14 changed files with 147 additions and 151 deletions

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@ -18,10 +18,10 @@ class console_handler : public usart_core, public singleton<console_handler>
friend class singleton<console_handler>;
public:
void PrintStats(uint8_t id, PacketUsart &usart);
void PrintStats(uint8_t id, packet_usart &usart);
private:
console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx, uint32_t streamTx);
console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream_rx, uint32_t stream_tx);
// LL_UsartCore pure virtual function implementations
virtual void receiver_idle(void);

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@ -84,7 +84,7 @@ private:
dma_helper m_dma;
slot_base volatile *m_first_slot = nullptr;
slot_base volatile *m_active_slot = nullptr;
int volatile m_activeTask;
int volatile m_active_task;
};
} // namespace f4ll

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@ -43,11 +43,16 @@ private:
volatile uint32_t *m_is_reg;
volatile uint32_t *m_ifc_reg;
static const uint32_t m_fe_masks[8];
static const uint32_t m_dme_masks[8];
static const uint32_t m_te_masks[8];
static const uint32_t m_ht_masks[8];
static const uint32_t m_tc_masks[8];
static constexpr uint32_t const m_fe_masks[8] = {DMA_LISR_FEIF0, DMA_LISR_FEIF1, DMA_LISR_FEIF2, DMA_LISR_FEIF3,
DMA_HISR_FEIF4, DMA_HISR_FEIF5, DMA_HISR_FEIF6, DMA_HISR_FEIF7};
static constexpr uint32_t const m_dme_masks[8] = {DMA_LISR_DMEIF0, DMA_LISR_DMEIF1, DMA_LISR_DMEIF2, DMA_LISR_DMEIF3,
DMA_HISR_DMEIF4, DMA_HISR_DMEIF5, DMA_HISR_DMEIF6, DMA_HISR_DMEIF7};
static constexpr uint32_t const m_te_masks[8] = {DMA_LISR_TEIF0, DMA_LISR_TEIF1, DMA_LISR_TEIF2, DMA_LISR_TEIF3,
DMA_HISR_TEIF4, DMA_HISR_TEIF5, DMA_HISR_TEIF6, DMA_HISR_TEIF7};
static constexpr uint32_t const m_ht_masks[8] = {DMA_LISR_HTIF0, DMA_LISR_HTIF1, DMA_LISR_HTIF2, DMA_LISR_HTIF3,
DMA_HISR_HTIF4, DMA_HISR_HTIF5, DMA_HISR_HTIF6, DMA_HISR_HTIF7};
static constexpr uint32_t const m_tc_masks[8] = {DMA_LISR_TCIF0, DMA_LISR_TCIF1, DMA_LISR_TCIF2, DMA_LISR_TCIF3,
DMA_HISR_TCIF4, DMA_HISR_TCIF5, DMA_HISR_TCIF6, DMA_HISR_TCIF7};
};
} /* namespace f4ll */

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@ -10,7 +10,35 @@
extern "C" {
#endif
typedef struct
{
uint32_t R0;
uint32_t R1;
uint32_t R2;
uint32_t R3;
uint32_t R4;
uint32_t R5;
uint32_t R6;
uint32_t R7;
uint32_t R8;
uint32_t R9;
uint32_t R10;
uint32_t R11;
uint32_t R12;
uint32_t SP;
uint32_t LR;
uint32_t PC;
uint32_t xPSR;
uint32_t PSP;
uint32_t MSP;
uint32_t EXC_RETURN;
uint32_t CONTROL;
} fault_context_t;
extern fault_context_t g_fault_context;
void app_fault_callback(uint32_t reason);
__attribute__((noreturn)) void fault_handler(uint32_t type, fault_context_t *context);
#ifdef __cplusplus
}

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@ -6,22 +6,21 @@
namespace f4ll {
class IrqLock {
class irq_lock
{
public:
inline IrqLock() : m_primask(__get_PRIMASK()) {
__disable_irq();
}
inline void Release() {
__set_PRIMASK(m_primask);
}
inline irq_lock()
: m_primask(__get_PRIMASK())
{
__disable_irq();
}
inline void release() { __set_PRIMASK(m_primask); }
inline ~irq_lock() { __set_PRIMASK(m_primask); }
inline ~IrqLock() {
__set_PRIMASK(m_primask);
}
private:
uint32_t m_primask;
};
}
#endif // _IRQLOCK_H_INCLUDED

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@ -15,23 +15,23 @@ namespace f4ll {
struct DMAINFO;
class PacketUsart : public crc_handler::icallback, public usart_core
class packet_usart : public crc_handler::icallback, public usart_core
{
// friend class UsartCore;
public:
PacketUsart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream_rx, uint32_t stream_tx);
packet_usart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream_rx, uint32_t stream_tx);
struct PacketHeader
struct packet_header
{ // !!! size should be multiple of 4 !!!
uint8_t startByte;
uint8_t start_byte;
uint8_t serial;
uint8_t payloadLength;
uint8_t payload_length;
uint8_t hash;
};
struct Packet
{
PacketHeader header;
packet_header header;
uint8_t payload[256 + sizeof(uint32_t)]; // extra room for crc32
} __attribute__((aligned));
@ -53,14 +53,14 @@ public:
struct IHsUsartCallback
{
virtual bool PacketReceived(PacketUsart *caller, uintptr_t userParam, Packet const &packet) = 0;
virtual bool PacketReceived(packet_usart *caller, uintptr_t userParam, Packet const &packet) = 0;
};
// crc_handler::ICallback interface functions
virtual void crc_succeeded(uintptr_t callbackParam, uint32_t crc, uint8_t task);
virtual void crc_failed(uintptr_t callbackParam, uint32_t crc, uint8_t task);
void PostPacket(uint8_t const *payload, uint8_t length, bool waitForCrcQueue = true);
void PostPacket(uint8_t const *payload, uint8_t length, bool wait_for_crc_queue = true);
void SetupReceive(void);
void RxProcessed(bool second);
@ -79,7 +79,7 @@ public:
private:
void BuildHeader(Packet &packet, uint8_t serialNo, uint8_t length);
bool CheckHeader(PacketHeader &header);
bool CheckHeader(packet_header &header);
void SwitchRxBuffers(void);
// UsartCore pure virtual function implementations