- Python 100%
12d8fca2fb* Add CI linter for .kicad_dru files
Adds tools/lint_dru.py (no dependencies, Python 3.8+) and a GitHub Actions
workflow that runs it on any change to a .kicad_dru file. The linter catches
the mistake classes that have actually reached this repo before:
- unbalanced parentheses / malformed s-expressions
- missing or wrong (version 1) header
- a rule with no name or no constraint
- duplicate rule names
- rule names not prefixed with the fab name
- lowercase item-type literals ('track'/'via'/'pad'...) that KiCad expects in
PascalCase and that otherwise silently never match
Both existing rule files pass.
* Add JLCPCB slot-width and NPTH-to-copper rules
JLCPCB.kicad_dru quoted these three specs in TODO comments but never
implemented them, while the refactored PCBWay file now has equivalents.
Implements them from JLCPCB's own quoted capabilities and removes the TODOs:
- JLCPCB: Plated Slot Width (min 0.5mm)
- JLCPCB: Non-Plated Slot Width (min 1.0mm)
- JLCPCB: NPTH to Copper (non-Track) (min 0.2mm)
Brings the two fab rule sets to structural parity.
* README: reflect current KiCad versions and document validation
- Note the rules are authored for KiCad 8 syntax and forward-compatible with
KiCad 9 and 10 (all tokens unchanged; 9/10 only add constraints).
- Add a Validation section covering tools/lint_dru.py and headless
kicad-cli pcb drc, and link the KiCad CLI reference.
---------
Co-authored-by: Cimos <simon@cubepilot.com>
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|---|---|---|
| .github | ||
| JLCPCB | ||
| PCBWay | ||
| tools | ||
| .gitignore | ||
| CONTRIBUTING.md | ||
| LICENSE | ||
| README.md | ||
KiCad Custom Design Rules
Custom design rules for KiCad that match the manufacturing capabilities of common PCB fab houses. Rules are stored in .kicad_dru files and validated against a paired test board (.kicad_pcb) so each rule has at least one footprint that passes or fails as expected.
The rules are authored against the KiCad 8 custom-rules syntax and are forward-compatible with KiCad 9 and 10 — every token used here is unchanged across those releases (KiCad 9/10 only add new constraints on top). If you're on KiCad 8, 9, or 10, they just work.
Maintained fork of labtroll/KiCad-DesignRules, which has been inactive since November 2024.
Supported fabs
| Fab | Folder | Source of capabilities |
|---|---|---|
| JLCPCB | JLCPCB/ |
https://jlcpcb.com/capabilities/pcb-capabilities |
| PCBWay | PCBWay/ |
https://www.pcbway.com/capabilities.html |
Each folder contains:
<FAB>.kicad_dru— the rule file you copy into your project<FAB>.kicad_pcb,.kicad_sch,.kicad_pro— a small test board exercising the rules
Use in your project
- Copy the relevant
.kicad_drufromJLCPCB/orPCBWay/into your KiCad project folder. - Rename it to match your project:
your-project.kicad_dru. - KiCad picks it up automatically. View under
File > Board Setup > Design Rules > Custom Rules. - Run
Inspect > Design Rules Checker(or press F8) to apply.
Many rules have alternates commented out for different layer counts or copper weights. Read the comments at the top of each rule and uncomment the variant that matches what you're ordering.
Validation
Every .kicad_dru file is checked in CI by a small linter (tools/lint_dru.py, no dependencies) that catches malformed s-expressions, missing (version 1) headers, rules with no constraint, duplicate names, wrong fab prefixes, and lowercase item-type literals ('track'/'via'/'pad') that KiCad silently never matches. Run it locally with:
python3 tools/lint_dru.py
The linter is a fast syntax/consistency gate — KiCad has no standalone .kicad_dru validator. For a full electrical DRC, KiCad 8+ can run the rules headlessly against the paired test board:
kicad-cli pcb drc --exit-code-violations --severity-error JLCPCB/JLCPCB.kicad_pcb
KiCad documentation
- Custom Design Rules (8.0) — the syntax these rules are written against
- Design Rules Check (8.0)
- KiCad CLI reference —
kicad-cli pcb drcfor headless checking
Contributing
Bug reports, capability updates, and PRs are welcome. See CONTRIBUTING.md for the conventions used in this repo.