Make it work

Use #pragma once instead of guard definitions in every header

.clang-format

@@ -14,6 +14,10 @@ FixNamespaceComments: false
 PackConstructorInitializers: Never
 AlignAfterOpenBracket: AlwaysBreak
 InsertBraces: true
+SpaceBeforeParens: Custom
+SpaceBeforeParensOptions:
+  AfterControlStatements: true
+  AfterFunctionDefinitionName: false
 BraceWrapping:
   AfterClass: true # false
   AfterControlStatement: false

.vscode/extensions.json

@@ -0,0 +1,19 @@
+{
+    "recommendations": [
+        "ms-vscode.cpptools",                   // (dependencies to ms-vscode.cpptools-extension-pack)
+        "ms-vscode.cpptools-themes",            // (dependencies to ms-vscode.cpptools-extension-pack)
+        "ms-vscode.cmake-tools",                // (dependencies to ms-vscode.cpptools-extension-pack)
+        "twxs.cmake",				            // (dependencies to ms-vscode.cpptools-extension-pack)
+        "ms-vscode.cpptools-extension-pack",    // Provides CMake and C++ file coloring, completion & support
+        "dan-c-underwood.arm",		            // Provides syntax highlighting for the Arm Assembly language
+        "zixuanwang.linkerscript",	            // Provides syntax highlighting for linker scripts
+        "ms-vscode.hexeditor",                  // Provides hex editor fo viewing & anipulating files in their raw hexadecimal representation
+        "trond-snekvik.gnu-mapfiles",           // Provides syntax highlighting and symbol listing for GNU linker .map files
+        "jeff-hykin.better-cpp-syntax",         // Provides syntax highlighting for C++
+        "marus25.cortex-debug",		            // Provides debug support on Arm Cortex-M
+        "mcu-debug.debug-tracker-vscode",       // Dependencies to "marus25.cortex-debug"
+        "mcu-debug.memory-view",                // Dependencies to "marus25.cortex-debug"
+        "mcu-debug.peripheral-viewer",          // Dependencies to "marus25.cortex-debug"
+        "mcu-debug.rtos-views"                  // Dependencies to "marus25.cortex-debug"
+    ]
+}

.vscode/launch.json

@@ -0,0 +1,61 @@
+{
+    // Use IntelliSense to learn about possible attributes.
+    // Hover to view descriptions of existing attributes.
+    // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
+    "version": "0.2.0",
+    "configurations": [
+        {
+            "name": "Build & Debug Microcontroller - ST-Link",
+            "cwd": "${workspaceFolder}",
+            "type": "cortex-debug",
+            "executable": "${command:cmake.launchTargetPath}",
+            // Let CMake extension decide executable: "${command:cmake.launchTargetPath}"
+            // Or fixed file path: "${workspaceFolder}/path/to/filename.elf"
+            "request": "launch",
+            "servertype": "stlink",
+            "device": "STM32F446RETx", //MCU used
+            "interface": "swd",
+            "serialNumber": "",        //Set ST-Link ID if you use multiple at the same time
+            "runToEntryPoint": "main",
+            "svdFile": "${config:STM32VSCodeExtension.cubeCLT.path}/STMicroelectronics_CMSIS_SVD/STM32F446.svd",
+            "v1": false,               //Change it depending on ST Link version
+            "serverpath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
+            "stm32cubeprogrammer":"${config:STM32VSCodeExtension.cubeCLT.path}/STM32CubeProgrammer/bin",
+            "stlinkPath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",   
+            "armToolchainPath": "${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin",
+            "gdbPath":"${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin/arm-none-eabi-gdb",            
+            "serverArgs": [
+                "-m","0",
+            ],
+            //"preLaunchTask": "Build + Flash"
+            /* If you use external loader, add additional arguments */
+            //"serverArgs": ["--extload", "path/to/ext/loader.stldr"],
+        },
+        {
+            "name": "Attach to Microcontroller - ST-Link",
+            "cwd": "${workspaceFolder}",
+            "type": "cortex-debug",
+            "executable": "${command:cmake.launchTargetPath}",
+            // Let CMake extension decide executable: "${command:cmake.launchTargetPath}"
+            // Or fixed file path: "${workspaceFolder}/path/to/filename.elf"
+            "request": "attach",
+            "servertype": "stlink",
+            "device": "STM32F446RETx", //MCU used
+            "interface": "swd",
+            "serialNumber": "",        //Set ST-Link ID if you use multiple at the same time
+            "runToEntryPoint": "main",
+            "svdFile": "${config:STM32VSCodeExtension.cubeCLT.path}/STMicroelectronics_CMSIS_SVD/STM32F446.svd",
+            "v1": false,               //Change it depending on ST Link version
+            "serverpath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
+            "stm32cubeprogrammer":"${config:STM32VSCodeExtension.cubeCLT.path}/STM32CubeProgrammer/bin",
+            "stlinkPath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",   
+            "armToolchainPath": "${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin",
+            "gdbPath":"${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin/arm-none-eabi-gdb",            
+            "serverArgs": [
+                "-m","0",
+            ],
+            /* If you use external loader, add additional arguments */
+            //"serverArgs": ["--extload", "path/to/ext/loader.stldr"],
+        }
+            ]
+}

.vscode/tasks.json

@@ -0,0 +1,62 @@
+{
+    "version": "2.0.0",
+    "windows": {
+        "options": {
+            "shell": {
+                "executable": "cmd.exe",
+                "args": ["/d", "/c"]
+            }
+        }
+    },
+    "tasks": [
+        {
+            "type": "shell",
+            "label": "CubeProg: Flash project (SWD)",
+            "command": "STM32_Programmer_CLI",
+            "args": [
+                "--connect",
+                "port=swd",
+                "--download",
+                "${command:cmake.launchTargetPath}",
+                // Let CMake extension decide executable: "${command:cmake.launchTargetPath}",
+                "-hardRst", // Hardware reset - if rst pin is connected
+                "-rst", // Software reset (backup)
+                "--start" // Start execution
+            ],
+            "options": {
+                "cwd": "${workspaceFolder}"
+            },
+            "problemMatcher": []
+        },
+        {
+            "label": "Build + Flash",
+            "dependsOrder": "sequence",
+            "dependsOn": [
+                "CMake: clean rebuild",
+                "CubeProg: Flash project (SWD)",
+            ]
+        },
+                {
+            "type": "cmake",
+            "label": "CMake: clean rebuild",
+            "command": "cleanRebuild",
+            "targets": [
+                "all"
+            ],
+            "preset": "${command:cmake.activeBuildPresetName}",
+            "group": "build",
+            "problemMatcher": [],
+            "detail": "CMake template clean rebuild task"
+        },
+        {
+            "type": "shell",
+            "label": "CubeProg: List all available communication interfaces",
+            "command": "STM32_Programmer_CLI",
+            "args": ["--list"],
+            "options": {
+                "cwd": "${workspaceFolder}"
+            },
+            "problemMatcher": []
+        }
+    ]
+}

CMakeLists.txt

@@ -32,7 +32,7 @@ project(${CMAKE_PROJECT_NAME})
 message("Build type: " ${CMAKE_BUILD_TYPE})
 
 # Enable CMake support for ASM and C languages
-enable_language(C ASM)
+enable_language(C CXX ASM)
 
 # Create an executable object type
 add_executable(${CMAKE_PROJECT_NAME})
@@ -40,6 +40,10 @@ add_executable(${CMAKE_PROJECT_NAME})
 # Add STM32CubeMX generated sources
 add_subdirectory(cmake/stm32cubemx)
 
+add_subdirectory(components/platform)
+add_subdirectory(components/f4ll)
+add_subdirectory(components/app)
+
 # Link directories setup
 target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
     # Add user defined library search paths
@@ -65,4 +69,8 @@ target_link_libraries(${CMAKE_PROJECT_NAME}
     stm32cubemx
 
     # Add user defined libraries
+    app
 )
+
+# Poor quality LL code from ST
+target_compile_options(stm32cubemx INTERFACE -Wno-unused-parameter)

Core/Inc/dma.h

@@ -0,0 +1,52 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    dma.h
+  * @brief   This file contains all the function prototypes for
+  *          the dma.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __DMA_H__
+#define __DMA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* DMA memory to memory transfer handles -------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_DMA_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_H__ */
+

Core/Inc/gpio.h

@@ -0,0 +1,49 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.h
+  * @brief   This file contains all the function prototypes for
+  *          the gpio.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_GPIO_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ GPIO_H__ */
+

Core/Inc/main.h

@@ -28,6 +28,7 @@ extern "C" {
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f4xx_hal.h"
+
 #include "stm32f4xx_ll_usart.h"
 #include "stm32f4xx_ll_rcc.h"
 #include "stm32f4xx_ll_system.h"

Core/Inc/stm32f4xx_it.h

@@ -55,6 +55,9 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
+void DMA1_Stream5_IRQHandler(void);
+void DMA1_Stream6_IRQHandler(void);
+void USART2_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */

Core/Inc/usart.h

@@ -0,0 +1,50 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.h
+  * @brief   This file contains all the function prototypes for
+  *          the usart.c file
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USART_H__
+#define __USART_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_USART2_UART_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USART_H__ */
+

Core/Src/dma.c

@@ -0,0 +1,58 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    dma.c
+  * @brief   This file provides code for the configuration
+  *          of all the requested memory to memory DMA transfers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "dma.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure DMA                                                              */
+/*----------------------------------------------------------------------------*/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/**
+  * Enable DMA controller clock
+  */
+void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Stream5_IRQn interrupt configuration */
+  NVIC_SetPriority(DMA1_Stream5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+  NVIC_EnableIRQ(DMA1_Stream5_IRQn);
+  /* DMA1_Stream6_IRQn interrupt configuration */
+  NVIC_SetPriority(DMA1_Stream6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+  NVIC_EnableIRQ(DMA1_Stream6_IRQn);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */
+

Core/Src/gpio.c

@@ -0,0 +1,85 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    gpio.c
+  * @brief   This file provides code for the configuration
+  *          of all used GPIO pins.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gpio.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/*----------------------------------------------------------------------------*/
+/* Configure GPIO                                                             */
+/*----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/** Configure pins as
+        * Analog
+        * Input
+        * Output
+        * EVENT_OUT
+        * EXTI
+*/
+void MX_GPIO_Init(void)
+{
+
+  LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* GPIO Ports Clock Enable */
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOH);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
+
+  /**/
+  LL_GPIO_ResetOutputPin(LD2_GPIO_Port, LD2_Pin);
+
+  /**/
+  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
+
+  /**/
+  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
+  EXTI_InitStruct.LineCommand = ENABLE;
+  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
+  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
+  LL_EXTI_Init(&EXTI_InitStruct);
+
+  /**/
+  LL_GPIO_SetPinPull(B1_GPIO_Port, B1_Pin, LL_GPIO_PULL_NO);
+
+  /**/
+  LL_GPIO_SetPinMode(B1_GPIO_Port, B1_Pin, LL_GPIO_MODE_INPUT);
+
+  /**/
+  GPIO_InitStruct.Pin = LD2_Pin;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  LL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
+
+}
+
+/* USER CODE BEGIN 2 */
+
+/* USER CODE END 2 */

Core/Src/main.c

@@ -18,9 +18,13 @@
 /* USER CODE END Header */
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
+#include "dma.h"
+#include "usart.h"
+#include "gpio.h"
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
+#include <app.h>
 
 /* USER CODE END Includes */
 
@@ -47,8 +51,6 @@
 
 /* Private function prototypes -----------------------------------------------*/
 void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_USART2_UART_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -87,9 +89,10 @@ int main(void)
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
+  MX_DMA_Init();
   MX_USART2_UART_Init();
   /* USER CODE BEGIN 2 */
-
+  app_main();
   /* USER CODE END 2 */
 
   /* Infinite loop */
@@ -115,7 +118,7 @@ void SystemClock_Config(void)
   /** Configure the main internal regulator output voltage
   */
   __HAL_RCC_PWR_CLK_ENABLE();
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
 
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
@@ -126,7 +129,7 @@ void SystemClock_Config(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
   RCC_OscInitStruct.PLL.PLLM = 8;
-  RCC_OscInitStruct.PLL.PLLN = 180;
+  RCC_OscInitStruct.PLL.PLLN = 84;
   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
   RCC_OscInitStruct.PLL.PLLQ = 2;
   RCC_OscInitStruct.PLL.PLLR = 2;
@@ -135,130 +138,21 @@ void SystemClock_Config(void)
     Error_Handler();
   }
 
-  /** Activate the Over-Drive mode
-  */
-  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
-  {
-    Error_Handler();
-  }
-
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
 
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
   {
     Error_Handler();
   }
 }
 
-/**
-  * @brief USART2 Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_USART2_UART_Init(void)
-{
-
-  /* USER CODE BEGIN USART2_Init 0 */
-
-  /* USER CODE END USART2_Init 0 */
-
-  LL_USART_InitTypeDef USART_InitStruct = {0};
-
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
-  /* Peripheral clock enable */
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
-
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-  /**USART2 GPIO Configuration
-  PA2   ------> USART2_TX
-  PA3   ------> USART2_RX
-  */
-  GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-  GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
-  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN USART2_Init 1 */
-
-  /* USER CODE END USART2_Init 1 */
-  USART_InitStruct.BaudRate = 115200;
-  USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
-  USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
-  USART_InitStruct.Parity = LL_USART_PARITY_NONE;
-  USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
-  USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
-  USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
-  LL_USART_Init(USART2, &USART_InitStruct);
-  LL_USART_ConfigAsyncMode(USART2);
-  LL_USART_Enable(USART2);
-  /* USER CODE BEGIN USART2_Init 2 */
-
-  /* USER CODE END USART2_Init 2 */
-
-}
-
-/**
-  * @brief GPIO Initialization Function
-  * @param None
-  * @retval None
-  */
-static void MX_GPIO_Init(void)
-{
-  LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
-  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-  /* USER CODE BEGIN MX_GPIO_Init_1 */
-
-  /* USER CODE END MX_GPIO_Init_1 */
-
-  /* GPIO Ports Clock Enable */
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOH);
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
-
-  /**/
-  LL_GPIO_ResetOutputPin(LD2_GPIO_Port, LD2_Pin);
-
-  /**/
-  LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);
-
-  /**/
-  EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;
-  EXTI_InitStruct.LineCommand = ENABLE;
-  EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
-  EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;
-  LL_EXTI_Init(&EXTI_InitStruct);
-
-  /**/
-  LL_GPIO_SetPinPull(B1_GPIO_Port, B1_Pin, LL_GPIO_PULL_NO);
-
-  /**/
-  LL_GPIO_SetPinMode(B1_GPIO_Port, B1_Pin, LL_GPIO_MODE_INPUT);
-
-  /**/
-  GPIO_InitStruct.Pin = LD2_Pin;
-  GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
-  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-  LL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
-
-  /* USER CODE BEGIN MX_GPIO_Init_2 */
-
-  /* USER CODE END MX_GPIO_Init_2 */
-}
-
 /* USER CODE BEGIN 4 */
 
 /* USER CODE END 4 */

Core/Src/stm32f4xx_it.c

@@ -22,6 +22,8 @@
 #include "stm32f4xx_it.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
+#include <irq_bridge.h>
+
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -198,6 +200,48 @@ void SysTick_Handler(void)
 /* please refer to the startup file (startup_stm32f4xx.s).                    */
 /******************************************************************************/
 
+/**
+  * @brief This function handles DMA1 stream5 global interrupt.
+  */
+void DMA1_Stream5_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
+  usart2_rx_dma_isr();
+
+  /* USER CODE END DMA1_Stream5_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream5_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA1 stream6 global interrupt.
+  */
+void DMA1_Stream6_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
+  usart2_tx_dma_isr();
+
+  /* USER CODE END DMA1_Stream6_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream6_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USART2 global interrupt.
+  */
+void USART2_IRQHandler(void)
+{
+  /* USER CODE BEGIN USART2_IRQn 0 */
+  usart2_isr();
+
+  /* USER CODE END USART2_IRQn 0 */
+  /* USER CODE BEGIN USART2_IRQn 1 */
+
+  /* USER CODE END USART2_IRQn 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */

Core/Src/usart.c

@@ -0,0 +1,121 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    usart.c
+  * @brief   This file provides code for the configuration
+  *          of the USART instances.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "usart.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* USART2 init function */
+
+void MX_USART2_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART2_Init 0 */
+
+  /* USER CODE END USART2_Init 0 */
+
+  LL_USART_InitTypeDef USART_InitStruct = {0};
+
+  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+  /* Peripheral clock enable */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
+
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+  /**USART2 GPIO Configuration
+  PA2   ------> USART2_TX
+  PA3   ------> USART2_RX
+  */
+  GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+  GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USART2 DMA Init */
+
+  /* USART2_RX Init */
+  LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_5, LL_DMA_CHANNEL_4);
+
+  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
+
+  LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_5, LL_DMA_PRIORITY_LOW);
+
+  LL_DMA_SetMode(DMA1, LL_DMA_STREAM_5, LL_DMA_MODE_NORMAL);
+
+  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_5, LL_DMA_PERIPH_NOINCREMENT);
+
+  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_5, LL_DMA_MEMORY_INCREMENT);
+
+  LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_5, LL_DMA_PDATAALIGN_BYTE);
+
+  LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_5, LL_DMA_MDATAALIGN_BYTE);
+
+  LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_5);
+
+  /* USART2_TX Init */
+  LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_6, LL_DMA_CHANNEL_4);
+
+  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_6, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
+
+  LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_6, LL_DMA_PRIORITY_LOW);
+
+  LL_DMA_SetMode(DMA1, LL_DMA_STREAM_6, LL_DMA_MODE_NORMAL);
+
+  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_6, LL_DMA_PERIPH_NOINCREMENT);
+
+  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_6, LL_DMA_MEMORY_INCREMENT);
+
+  LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_6, LL_DMA_PDATAALIGN_BYTE);
+
+  LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_6, LL_DMA_MDATAALIGN_BYTE);
+
+  LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_6);
+
+  /* USART2 interrupt Init */
+  NVIC_SetPriority(USART2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+  NVIC_EnableIRQ(USART2_IRQn);
+
+  /* USER CODE BEGIN USART2_Init 1 */
+
+  /* USER CODE END USART2_Init 1 */
+  USART_InitStruct.BaudRate = 115200;
+  USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+  USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+  USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+  USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+  USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+  USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+  LL_USART_Init(USART2, &USART_InitStruct);
+  LL_USART_ConfigAsyncMode(USART2);
+  LL_USART_Enable(USART2);
+  /* USER CODE BEGIN USART2_Init 2 */
+
+  /* USER CODE END USART2_Init 2 */
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

cmake/stm32cubemx/CMakeLists.txt

@@ -21,6 +21,9 @@ set(MX_Include_Dirs
 # STM32CubeMX generated application sources
 set(MX_Application_Src
     ${CMAKE_SOURCE_DIR}/Core/Src/main.c
+    ${CMAKE_SOURCE_DIR}/Core/Src/gpio.c
+    ${CMAKE_SOURCE_DIR}/Core/Src/dma.c
+    ${CMAKE_SOURCE_DIR}/Core/Src/usart.c
     ${CMAKE_SOURCE_DIR}/Core/Src/stm32f4xx_it.c
     ${CMAKE_SOURCE_DIR}/Core/Src/stm32f4xx_hal_msp.c
     ${CMAKE_SOURCE_DIR}/Core/Src/sysmem.c

components/app/CMakeLists.txt

@@ -0,0 +1,10 @@
+add_library(app STATIC
+    src/app.cpp
+    src/irq_bridge.cpp
+)
+
+target_include_directories(app PUBLIC
+    ${CMAKE_CURRENT_SOURCE_DIR}/inc
+)
+
+target_link_libraries(app PUBLIC stm32cubemx platform f4ll)

components/app/inc/app.h

@@ -14,7 +14,7 @@
 extern "C" {
 #endif
 
-void MainLoop(void) __attribute__((noreturn));
+void app_main(void) __attribute__((noreturn));
 
 #ifdef __cplusplus
 } //	extern "C" {

components/app/inc/irq_bridge.h

@@ -0,0 +1,13 @@
+#pragma once
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+void usart2_rx_dma_isr(void);
+void usart2_tx_dma_isr(void);
+void usart2_isr(void);
+
+#if defined(__cplusplus)
+}
+#endif

components/app/src/app.cpp

@@ -0,0 +1,26 @@
+/*
+ * ll_testbed.cpp
+ *
+ *  Created on: Oct 28, 2019
+ *      Author: abody
+ */
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx_ll_gpio.h"
+#include <main.h>
+
+#include <f4ll/console_handler.h>
+
+#include <stdlib.h>
+#include <string.h>
+
+#include <app.h>
+
+void app_main()
+{
+    f4ll::console_handler &con = f4ll::console_handler::init(USART2, DMA1, LL_DMA_STREAM_5, LL_DMA_STREAM_6);
+    while (true) {
+        con.print("Hello woooooooooooooooooooooooooooooooorld!\n");
+        HAL_Delay(500);
+        LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin);
+    }
+}

components/app/src/application.cpp

@@ -1,22 +0,0 @@
-/*
- * ll_testbed.cpp
- *
- *  Created on: Oct 28, 2019
- *      Author: abody
- */
-#include "f4ll/console_handler.h"
-#include "f4ll/crc_handler.h"
-#include "f4ll/irq_lock.h"
-#include "f4ll/memcpy_dma.h"
-#include "f4ll/packet_usart.h"
-#include "f4ll/str_util.h"
-#include <stdlib.h>
-#include <string.h>
-
-#include <main.h>
-
-void MainLoop()
-{
-    while (true)
-        ;
-}

components/app/src/irq_bridge.cpp

@@ -0,0 +1,18 @@
+#include <f4ll/console_handler.h>
+
+#include <irq_bridge.h>
+
+void usart2_rx_dma_isr(void)
+{
+    f4ll::console_handler::instance().rx_dma_isr();
+}
+
+void usart2_tx_dma_isr(void)
+{
+    f4ll::console_handler::instance().tx_dma_isr();
+}
+
+void usart2_isr(void)
+{
+    f4ll::console_handler::instance().usart_isr();
+}

components/f4ll/.clang-format

@@ -14,6 +14,10 @@ FixNamespaceComments: false
 PackConstructorInitializers: Never
 AlignAfterOpenBracket: AlwaysBreak
 InsertBraces: true
+SpaceBeforeParens: Custom
+SpaceBeforeParensOptions:
+  AfterControlStatements: true
+  AfterFunctionDefinitionName: false
 BraceWrapping:
   AfterClass: true # false
   AfterControlStatement: false

components/f4ll/inc/f4ll/console_handler.h

@@ -7,15 +7,15 @@
 
 #pragma once
 
+#include <f4ll/initialized_singleton.h>
 #include <f4ll/packet_usart.h>
 #include <f4ll/ringbuffer.h>
-#include <f4ll/singleton.h>
 
 namespace f4ll {
 
-class console_handler : public usart_core, public singleton<console_handler>
+class console_handler : public usart_core, public initialized_singleton<console_handler>
 {
-    friend class singleton<console_handler>;
+    friend class initialized_singleton<console_handler>;
 
 public:
     void print(char const *s);

components/f4ll/inc/f4ll/crc_handler.h

@@ -7,15 +7,15 @@
 #pragma once
 
 #include <f4ll/dma_helper.h>
-#include <f4ll/singleton.h>
+#include <f4ll/initialized_singleton.h>
 #include <inttypes.h>
 #include <platform/dma_ll.h>
 
 namespace f4ll {
 
-class crc_handler : public singleton<crc_handler>
+class crc_handler : public initialized_singleton<crc_handler>
 {
-    friend class singleton<crc_handler>;
+    friend class initialized_singleton<crc_handler>;
 
 public:
     struct icallback

components/f4ll/inc/f4ll/dma_helper.h

@@ -5,8 +5,7 @@
  *      Author: abody
  */
 
-#ifndef LL_DMAHELPER_H_
+#pragma once
-#define LL_DMAHELPER_H_
 
 #include <inttypes.h>
 #include <platform/dma_ll.h>
@@ -56,5 +55,3 @@ private:
 };
 
 } /* namespace f4ll */
-
-#endif /* LL_DMAHELPER_H_ */

components/f4ll/inc/f4ll/fault.h

@@ -1,10 +1,9 @@
-#ifndef __FAULT_H
+#pragma once
-#define __FAULT_H
 
-#define FAULT_REASON_HARD_FAULT       1
+#define FAULT_REASON_HARD_FAULT 1
-#define FAULT_REASON_MEMMANAGE_FAULT  2
+#define FAULT_REASON_MEMMANAGE_FAULT 2
-#define FAULT_REASON_BUS_FAULT        3
+#define FAULT_REASON_BUS_FAULT 3
-#define FAULT_REASON_USAGE_FAULT      4
+#define FAULT_REASON_USAGE_FAULT 4
 
 #ifdef __cplusplus
 extern "C" {
@@ -43,5 +42,3 @@ __attribute__((noreturn)) void fault_handler(uint32_t type, fault_context_t *con
 #ifdef __cplusplus
 }
 #endif
-
-#endif  /* __FAULT_H */

components/f4ll/inc/f4ll/initialized_singleton.h

@@ -0,0 +1,27 @@
+#pragma once
+
+#include <utility>
+
+namespace f4ll {
+
+template <typename T> class initialized_singleton
+{
+public:
+    static T &instance() { return *m_instance; }
+    template <typename... args_t> static T &init(args_t &&...args)
+    {
+        static T instance{std::forward<args_t>(args)...};
+        m_instance = &instance;
+        return instance;
+    }
+
+protected:
+    initialized_singleton() = default;
+    initialized_singleton(const initialized_singleton &) = delete;
+    initialized_singleton &operator=(const initialized_singleton &) = delete;
+    static T *m_instance;
+};
+
+template <typename T> T *initialized_singleton<T>::m_instance = nullptr;
+
+} //  namespace f1ll {

components/f4ll/inc/f4ll/irq_lock.h

@@ -1,5 +1,4 @@
-#ifndef _IRQLOCK_H_INCLUDED
+#pragma once
-#define _IRQLOCK_H_INCLUDED
 
 #include <inttypes.h>
 #include <stm32f4xx.h>
@@ -19,8 +18,6 @@ public:
     inline ~irq_lock() { __set_PRIMASK(m_primask); }
 
 private:
-	uint32_t m_primask;
+    uint32_t m_primask;
 };
 }
-
-#endif	//	_IRQLOCK_H_INCLUDED

components/f4ll/inc/f4ll/memcpy_dma.h

@@ -7,13 +7,13 @@
 #pragma once
 
 #include <f4ll/dma_helper.h>
-#include <f4ll/singleton.h>
+#include <f4ll/initialized_singleton.h>
 
 namespace f4ll {
 
-class memcpy_dma : public singleton<memcpy_dma>, private dma_helper
+class memcpy_dma : public initialized_singleton<memcpy_dma>, private dma_helper
 {
-    friend class singleton<memcpy_dma>;
+    friend class initialized_singleton<memcpy_dma>;
 
 public:
     void *copy(void *dst, void const *src, uint16_t length);
@@ -24,4 +24,4 @@ private:
     bool volatile m_busy = false;
 };
 
-} /* namespace f4ll */
+} // namespace f4ll

components/f4ll/inc/f4ll/packet_usart.h

@@ -5,11 +5,12 @@
  *      Author: abody
  */
 
-#ifndef LL_HSUSART_H_
+#pragma once
-#define LL_HSUSART_H_
+
+#include <platform/usart_ll.h>
+
 #include <f4ll/crc_handler.h>
 #include <f4ll/usart_core.h>
-#include <platform/usart_ll.h>
 
 namespace f4ll {
 
@@ -119,4 +120,3 @@ private:
 };
 
 }
-#endif /* LL_HSUSART_H_ */

components/f4ll/inc/f4ll/singleton.h

@@ -1,33 +0,0 @@
-#ifndef SINGLETON_H_
-#define SINGLETON_H_
-
-#include <utility>
-
-namespace f4ll {
-
-template <typename T> class singleton
-{
-public:
-    static T &instance()
-    {
-        return *m_instance;
-    }
-    template <typename... args_t> static T &init(args_t &&...args)
-    {
-        static T instance{std::forward<args_t>(args)...};
-        m_instance = &instance;
-        return instance;
-    }
-
-protected:
-    singleton() = default;
-    singleton(const singleton &) = delete;
-    singleton &operator=(const singleton &) = delete;
-    static T *m_instance;
-};
-
-template <typename T> T *singleton<T>::m_instance = nullptr;
-
-} //  namespace f1ll {
-
-#endif /* SINGLETON_H_ */

components/f4ll/inc/f4ll/str_util.h

@@ -5,8 +5,7 @@
  *      Author: compi
  */
 
-#ifndef _STM32PLUS_STRUTIL_H_
+#pragma once
-#define _STM32PLUS_STRUTIL_H_
 
 #include <stddef.h>
 #include <inttypes.h>
@@ -27,5 +26,3 @@ char tochr(const uint8_t in, const uint8_t upper);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* _STM32PLUS_STRUTIL_H_ */

components/f4ll/inc/f4ll/usart_core.h

@@ -5,8 +5,8 @@
  *      Author: abody
  */
 
-#ifndef LL_USARTCORE_H_
+#pragma once
-#define LL_USARTCORE_H_
+
 #include <platform/usart_ll.h>
 
 #include <f4ll/dma_helper.h>
@@ -44,11 +44,10 @@ private:
     virtual void tx_dma_half_transfer(void) = 0;
     virtual void tx_dma_error(dma_helper::dma_error_type reason) = 0;
 
+public:
     void usart_isr();
     void rx_dma_isr();
     void tx_dma_isr();
 };
 
 } /* namespace f4ll */
-
-#endif /* LL_USARTCORE_H_ */

components/f4ll/src/console_handler.cpp

@@ -71,19 +71,15 @@ size_t console_handler::append(char const *s)
 
 void console_handler::flush()
 {
-    bool busy;
-
     if (!m_tx_buffer.uncommited()) {
         return;
     }
     m_tx_buffer.commit();
-    {
+
-        irq_lock l;
+    if (m_in_flight_size) {
-        busy = m_in_flight_size != 0;
-    }
-    if (busy) {
         return;
     }
+
     uint8_t const *chunk;
     m_tx_buffer.get_chunk(m_tx_buffer.size(), chunk, m_in_flight_size);
     if (m_in_flight_size) {

components/f4ll/src/crc_handler.cpp

@@ -4,6 +4,7 @@
  *  Created on: Oct 26, 2019
  *      Author: compi
  */
+
 #include <f4ll/crc_handler.h>
 
 namespace f4ll {

components/f4ll/src/fault.cpp

@@ -6,7 +6,7 @@
  *      -c "tpiu config internal <logfile_full_path> uart off <cpufreq>"
  */
 #include <inttypes.h>
-//#include <core_cm4.h>
+// #include <core_cm4.h>
 #include <f4ll/fault.h>
 #include <f4ll/str_util.h>
 #include <stm32f4xx.h>
@@ -24,39 +24,40 @@ void __attribute__((weak)) app_fault_callback(uint32_t reason)
 
 void swo_send_str(char const *str, uint8_t len, uint8_t port)
 {
-	while(len) {
+    while (len) {
-		if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      // ITM enabled
+        if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && // ITM enabled
-		    ((ITM->TER & (1UL << port)     ) != 0UL)   )     // ITM Port enabled
+            ((ITM->TER & (1UL << port)) != 0UL))        // ITM Port enabled
-		{
+        {
-			// Wait until shift register is free
+            // Wait until shift register is free
-			while (ITM->PORT[port].u32 == 0UL) {
+            while (ITM->PORT[port].u32 == 0UL) {
-				__ASM volatile ("nop");
+                __ASM volatile("nop");
-			}
+            }
-			if(len >= 4) {
+            if (len >= 4) {
-				ITM->PORT[port].u32 = *(uint32_t*)(str);
+                ITM->PORT[port].u32 = *(uint32_t *)(str);
-				str += 4;
+                str += 4;
-				len -= 4;
+                len -= 4;
-			} else if(len >= 2) {
+            } else if (len >= 2) {
-				ITM->PORT[port].u16 = *(uint16_t*)(str);
+                ITM->PORT[port].u16 = *(uint16_t *)(str);
-				str += 2;
+                str += 2;
-				len -= 2;
+                len -= 2;
-			} else {
+            } else {
-				ITM->PORT[port].u8 = *(uint8_t*)(str);
+                ITM->PORT[port].u8 = *(uint8_t *)(str);
-				++str;
+                ++str;
-				--len;
+                --len;
-			}
+            }
-		} else
+        } else {
-			break;
+            break;
-	}
+        }
+    }
 }
 
 void fault_print_str(char const *fmtstr, uint32_t *values)
 {
-	char hex_str[9]={0};
+    char hex_str[9] = {0};
     char const *next_chunk = fmtstr;
 
-    while(*fmtstr) {
+    while (*fmtstr) {
-		if(*fmtstr == '%') {
+        if (*fmtstr == '%') {
             swo_send_str(next_chunk, fmtstr - next_chunk, 0);
             uitohex(hex_str, *values++, 8);
             swo_send_str(hex_str, 8, 0);
@@ -71,80 +72,71 @@ void fault_print_str(char const *fmtstr, uint32_t *values)
 
 void fault_handler(uint32_t type, fault_context_t *context)
 {
-	uint32_t FSR[9] = {
+    uint32_t FSR[9] = {
-		SCB->HFSR,
+        SCB->HFSR,  0xff & SCB->CFSR, (0xff00 & SCB->CFSR) >> 8, (0xffff0000 & SCB->CFSR) >> 16, SCB->DFSR, SCB->AFSR, SCB->SHCSR,
-		0xff & SCB->CFSR,
+        SCB->MMFAR, SCB->BFAR};
-		(0xff00 & SCB->CFSR) >> 8,
-		(0xffff0000 & SCB->CFSR) >> 16,
-		SCB->DFSR,
-		SCB->AFSR,
-		SCB->SHCSR,
-		SCB->MMFAR,
-		SCB->BFAR
-	};
 
-	while(1) {
+    while (1) {
-		fault_print_str("\n++ Fault Handler ++\n\nFaultType: ",NULL);
+        fault_print_str("\n++ Fault Handler ++\n\nFaultType: ", NULL);
-		switch( type ) {
+        switch (type) {
-		case FAULT_REASON_HARD_FAULT:
+            case FAULT_REASON_HARD_FAULT:
-			fault_print_str("HardFault",NULL);
+                fault_print_str("HardFault", NULL);
-			break;
+                break;
-		case FAULT_REASON_MEMMANAGE_FAULT:
+            case FAULT_REASON_MEMMANAGE_FAULT:
-			fault_print_str("MemManageFault",NULL);
+                fault_print_str("MemManageFault", NULL);
-			break;
+                break;
-		case FAULT_REASON_BUS_FAULT:
+            case FAULT_REASON_BUS_FAULT:
-			fault_print_str("BusFault",NULL);
+                fault_print_str("BusFault", NULL);
-			break;
+                break;
-		case FAULT_REASON_USAGE_FAULT:
+            case FAULT_REASON_USAGE_FAULT:
-			fault_print_str("UsageFault",NULL);
+                fault_print_str("UsageFault", NULL);
-			break;
+                break;
-		default:
+            default:
-			fault_print_str("Unknown Fault",NULL);
+                fault_print_str("Unknown Fault", NULL);
-			break;
+                break;
-		}
+        }
 
-		fault_print_str("\n\nContext:",NULL);
+        fault_print_str("\n\nContext:", NULL);
 
-		fault_print_str(
+        fault_print_str(
-			"\nR0   : %"
+            "\nR0   : %"
-			"\nR1   : %"
+            "\nR1   : %"
-			"\nR2   : %"
+            "\nR2   : %"
-			"\nR3   : %"
+            "\nR3   : %"
-			"\nR4   : %"
+            "\nR4   : %"
-			"\nR5   : %"
+            "\nR5   : %"
-			"\nR6   : %"
+            "\nR6   : %"
-			"\nR7   : %"
+            "\nR7   : %"
-			"\nR8   : %"
+            "\nR8   : %"
-			"\nR9   : %"
+            "\nR9   : %"
-			"\nR10  : %"
+            "\nR10  : %"
-			"\nR11  : %"
+            "\nR11  : %"
-			"\nR12  : %"
+            "\nR12  : %"
-			"\nSP   : %"
+            "\nSP   : %"
-			"\nLR   : %"
+            "\nLR   : %"
-			"\nPC   : %"
+            "\nPC   : %"
-			"\nxPSR : %"
+            "\nxPSR : %"
-			"\nPSP  : %"
+            "\nPSP  : %"
-			"\nMSP  : %",
+            "\nMSP  : %",
-			(uint32_t *)context);
+            (uint32_t *)context);
 
-		//Capture CPUID to get core/cpu info
+        // Capture CPUID to get core/cpu info
-		fault_print_str("\nCPUID: %",(uint32_t *)&SCB->CPUID);
+        fault_print_str("\nCPUID: %", (uint32_t *)&SCB->CPUID);
 
-		fault_print_str(
+        fault_print_str(
-			"\nHFSR : %"
+            "\nHFSR : %"
-			"\nMMFSR: %"
+            "\nMMFSR: %"
-			"\nBFSR : %"
+            "\nBFSR : %"
-			"\nUFSR : %"
+            "\nUFSR : %"
-			"\nDFSR : %"
+            "\nDFSR : %"
-			"\nAFSR : %"
+            "\nAFSR : %"
-			"\nSHCSR: %",
+            "\nSHCSR: %",
-			FSR);
+            FSR);
 
-		app_fault_callback(type);
+        app_fault_callback(type);
-	}
+    }
 }
 
 #ifdef __cplusplus
 }
 #endif
-

components/f4ll/src/packet_usart.cpp

@@ -5,7 +5,8 @@
  *      Author: abody
  */
 #include <f4ll/packet_usart.h>
-#include <string.h>
+
+#include <cstring>
 
 namespace f4ll {
 

components/f4ll/src/str_util.cpp

@@ -1,5 +1,6 @@
 #include <f4ll/str_util.h>
-#include <stdint.h>
+
+#include <cstdint>
 
 //////////////////////////////////////////////////////////////////////////////
 size_t strcpy_ex(char *dst, char const *src)

components/platform/platform/usart_ll.h

@@ -1,6 +1,6 @@
 #ifndef __PLATFORM_USART_LL_H_INCLUDED
 #define __PLATFORM_USART_LL_H_INCLUDED
 
-#include "usart.h"
+#include <usart.h>
 
 #endif  //  __PLATFORM_USART_LL_H_INCLUDED

nucleo_f446re_playground.ioc

@@ -2,15 +2,39 @@
 CAD.formats=
 CAD.pinconfig=
 CAD.provider=
+Dma.Request0=USART2_RX
+Dma.Request1=USART2_TX
+Dma.RequestsNb=2
+Dma.USART2_RX.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART2_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART2_RX.0.Instance=DMA1_Stream5
+Dma.USART2_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_RX.0.MemInc=DMA_MINC_ENABLE
+Dma.USART2_RX.0.Mode=DMA_NORMAL
+Dma.USART2_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_RX.0.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_RX.0.Priority=DMA_PRIORITY_LOW
+Dma.USART2_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART2_TX.1.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART2_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART2_TX.1.Instance=DMA1_Stream6
+Dma.USART2_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_TX.1.MemInc=DMA_MINC_ENABLE
+Dma.USART2_TX.1.Mode=DMA_NORMAL
+Dma.USART2_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_TX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_TX.1.Priority=DMA_PRIORITY_LOW
+Dma.USART2_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
 File.Version=6
 KeepUserPlacement=false
 Mcu.CPN=STM32F446RET6
 Mcu.Family=STM32F4
-Mcu.IP0=NVIC
+Mcu.IP0=DMA
-Mcu.IP1=RCC
+Mcu.IP1=NVIC
-Mcu.IP2=SYS
+Mcu.IP2=RCC
-Mcu.IP3=USART2
+Mcu.IP3=SYS
-Mcu.IPNb=4
+Mcu.IP4=USART2
+Mcu.IPNb=5
 Mcu.Name=STM32F446R(C-E)Tx
 Mcu.Package=LQFP64
 Mcu.Pin0=PC13
@@ -32,6 +56,8 @@ Mcu.UserName=STM32F446RETx
 MxCube.Version=6.14.1
 MxDb.Version=DB.6.0.141
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
@@ -41,6 +67,7 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true\:false
+NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 PA13.GPIOParameters=GPIO_Label
 PA13.GPIO_Label=TMS
@@ -94,7 +121,7 @@ ProjectManager.BackupPrevious=false
 ProjectManager.CompilerLinker=GCC
 ProjectManager.CompilerOptimize=6
 ProjectManager.ComputerToolchain=false
-ProjectManager.CoupleFile=false
+ProjectManager.CoupleFile=true
 ProjectManager.CustomerFirmwarePackage=
 ProjectManager.DefaultFWLocation=true
 ProjectManager.DeletePrevious=true
@@ -120,54 +147,54 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_USART2_UART_Init-USART2-false-LL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-LL-true
 RCC.48MHZClocksFreq_Value=84000000
-RCC.AHBFreq_Value=180000000
+RCC.AHBFreq_Value=84000000
-RCC.APB1CLKDivider=RCC_HCLK_DIV4
+RCC.APB1CLKDivider=RCC_HCLK_DIV2
-RCC.APB1Freq_Value=45000000
+RCC.APB1Freq_Value=42000000
-RCC.APB1TimFreq_Value=90000000
+RCC.APB1TimFreq_Value=84000000
 RCC.APB2CLKDivider=RCC_HCLK_DIV2
-RCC.APB2Freq_Value=90000000
+RCC.APB2Freq_Value=42000000
-RCC.APB2TimFreq_Value=180000000
+RCC.APB2TimFreq_Value=84000000
 RCC.CECFreq_Value=32786.88524590164
-RCC.CortexFreq_Value=180000000
+RCC.CortexFreq_Value=84000000
 RCC.EthernetFreq_Value=84000000
-RCC.FCLKCortexFreq_Value=180000000
+RCC.FCLKCortexFreq_Value=84000000
-RCC.FLatency-AdvancedSettings=FLASH_LATENCY_5
+RCC.FLatency-AdvancedSettings=FLASH_LATENCY_2
-RCC.FMPI2C1Freq_Value=45000000
+RCC.FMPI2C1Freq_Value=42000000
 RCC.FamilyName=M
-RCC.HCLKFreq_Value=180000000
+RCC.HCLKFreq_Value=84000000
 RCC.HSE_VALUE=8000000
 RCC.HSI_VALUE=16000000
 RCC.I2SClocksFreq_Value=96000000
 RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FMPI2C1Freq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLRCLKFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PWRFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAIAFreq_Value,SAIBFreq_Value,SDIOFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USBFreq_Value,VCOI2SInputFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutputFreq_Value,VCOSAIInputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S
 RCC.LSI_VALUE=32000
-RCC.MCO2PinFreq_Value=180000000
+RCC.MCO2PinFreq_Value=84000000
-RCC.PLLCLKFreq_Value=180000000
+RCC.PLLCLKFreq_Value=84000000
 RCC.PLLI2SPCLKFreq_Value=96000000
 RCC.PLLI2SQCLKFreq_Value=96000000
 RCC.PLLI2SRCLKFreq_Value=96000000
 RCC.PLLM=8
-RCC.PLLN=180
+RCC.PLLN=84
-RCC.PLLQCLKFreq_Value=180000000
+RCC.PLLQCLKFreq_Value=84000000
-RCC.PLLRCLKFreq_Value=180000000
+RCC.PLLRCLKFreq_Value=84000000
 RCC.PLLSAIPCLKFreq_Value=96000000
 RCC.PLLSAIQCLKFreq_Value=96000000
-RCC.PWRFreq_Value=180000000
+RCC.PWRFreq_Value=84000000
 RCC.RTCFreq_Value=32000
 RCC.RTCHSEDivFreq_Value=4000000
 RCC.SAIAFreq_Value=96000000
 RCC.SAIBFreq_Value=96000000
-RCC.SDIOFreq_Value=180000000
+RCC.SDIOFreq_Value=84000000
-RCC.SPDIFRXFreq_Value=180000000
+RCC.SPDIFRXFreq_Value=84000000
-RCC.SYSCLKFreq_VALUE=180000000
+RCC.SYSCLKFreq_VALUE=84000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.USBFreq_Value=180000000
+RCC.USBFreq_Value=84000000
 RCC.VCOI2SInputFreq_Value=1000000
 RCC.VCOI2SOutputFreq_Value=192000000
 RCC.VCOInputFreq_Value=2000000
 RCC.VCOInputMFreq_Value=1000000
-RCC.VCOOutputFreq_Value=360000000
+RCC.VCOOutputFreq_Value=168000000
 RCC.VCOSAIInputFreq_Value=1000000
 RCC.VCOSAIOutputFreq_Value=192000000
 RCC.VcooutputI2S=96000000