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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#------------------------------------------------------------------------------
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armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
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armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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#------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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||||
#------------------------------------------------------------------------------
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armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
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||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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#------------------------------------------------------------------------------
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# Parameters:
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||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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||||
#------------------------------------------------------------------------------
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||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
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||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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||||
#------------------------------------------------------------------------------
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# Parameters:
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||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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||||
#------------------------------------------------------------------------------
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||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
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||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
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cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
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cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
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cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
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cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
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#
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cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
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cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
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cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
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cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
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cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
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#------------------------------------------------------------------------------
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# Parameters:
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# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
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#------------------------------------------------------------------------------
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||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
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armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
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armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
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||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
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||||
#------------------------------------------------------------------------------
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CMSIS DSP_Lib example arm_class_marks_example
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The example is available for different targets:
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Cortex-M0
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Cortex-M3
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Cortex-M4 with FPU
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Cortex-M7 with single precision FPU
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Cortex-M55 with double precision FPU, Integer + Floating Point MVE
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The example is configured for Models Debugger
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cmake_minimum_required (VERSION 3.14)
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project (arm_bayes_example VERSION 0.1)
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# Needed to include the configBoot module
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# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
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set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
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set(DSP ${ROOT}/CMSIS/DSP)
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# Add DSP folder to module path
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list(APPEND CMAKE_MODULE_PATH ${DSP})
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###################################
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#
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||||
# LIBRARIES
|
||||
#
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###################################
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||||
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||||
###########
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||||
#
|
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# CMSIS DSP
|
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#
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||||
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add_subdirectory(../../../Source bin_dsp)
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||||
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||||
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###################################
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#
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# TEST APPLICATION
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||||
#
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###################################
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||||
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add_executable(arm_bayes_example)
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|
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include(config)
|
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configApp(arm_bayes_example ${ROOT})
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||||
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target_sources(arm_bayes_example PRIVATE arm_bayes_example_f32.c)
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|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_bayes_example PRIVATE CMSISDSP)
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/******************************************************************************
|
||||
* @file startup_ARMCM0.c
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* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
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* @version V2.0.2
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* @date 15. November 2019
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******************************************************************************/
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||||
/*
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||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
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||||
*
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||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
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||||
|
||||
#include "ARMCM0.h"
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||||
|
||||
/*----------------------------------------------------------------------------
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||||
External References
|
||||
*----------------------------------------------------------------------------*/
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||||
extern uint32_t __INITIAL_SP;
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extern __NO_RETURN void __PROGRAM_START(void);
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||||
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||||
/*----------------------------------------------------------------------------
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||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
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||||
void __NO_RETURN Default_Handler(void);
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void __NO_RETURN Reset_Handler (void);
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||||
|
||||
/*----------------------------------------------------------------------------
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||||
Exception / Interrupt Handler
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||||
*----------------------------------------------------------------------------*/
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||||
/* Exceptions */
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||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void HardFault_Handler (void) __attribute__ ((weak));
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void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
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||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
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||||
|
||||
#if defined ( __GNUC__ )
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||||
#pragma GCC diagnostic push
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||||
#pragma GCC diagnostic ignored "-Wpedantic"
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||||
#endif
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extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
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const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
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(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
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Reset_Handler, /* Reset Handler */
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NMI_Handler, /* -14 NMI Handler */
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HardFault_Handler, /* -13 Hard Fault Handler */
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0, /* Reserved */
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||||
0, /* Reserved */
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||||
0, /* Reserved */
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||||
0, /* Reserved */
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0, /* Reserved */
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||||
0, /* Reserved */
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||||
0, /* Reserved */
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||||
SVC_Handler, /* -5 SVCall Handler */
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0, /* Reserved */
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0, /* Reserved */
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||||
PendSV_Handler, /* -2 PendSV Handler */
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SysTick_Handler, /* -1 SysTick Handler */
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/* Interrupts */
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Interrupt0_Handler, /* 0 Interrupt 0 */
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Interrupt1_Handler, /* 1 Interrupt 1 */
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Interrupt2_Handler, /* 2 Interrupt 2 */
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Interrupt3_Handler, /* 3 Interrupt 3 */
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Interrupt4_Handler, /* 4 Interrupt 4 */
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Interrupt5_Handler, /* 5 Interrupt 5 */
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Interrupt6_Handler, /* 6 Interrupt 6 */
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Interrupt7_Handler, /* 7 Interrupt 7 */
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Interrupt8_Handler, /* 8 Interrupt 8 */
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Interrupt9_Handler /* 9 Interrupt 9 */
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/* Interrupts 10..31 are left out */
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};
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#if defined ( __GNUC__ )
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#pragma GCC diagnostic pop
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#endif
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/*----------------------------------------------------------------------------
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Reset Handler called on controller reset
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*----------------------------------------------------------------------------*/
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__NO_RETURN void Reset_Handler(void)
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{
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SystemInit(); /* CMSIS System Initialization */
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__PROGRAM_START(); /* Enter PreMain (C library entry point) */
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}
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|
||||
/*----------------------------------------------------------------------------
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Hard Fault Handler
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*----------------------------------------------------------------------------*/
|
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void HardFault_Handler(void)
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{
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while(1);
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}
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|
||||
/*----------------------------------------------------------------------------
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||||
Default Handler for Exceptions / Interrupts
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*----------------------------------------------------------------------------*/
|
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void Default_Handler(void)
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{
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while(1);
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}
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/**************************************************************************//**
|
||||
* @file system_ARMCM0.c
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* @brief CMSIS Device System Source File for
|
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* ARMCM0 Device
|
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* @version V5.3.1
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||||
* @date 09. July 2018
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||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
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||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM3.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void) ;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Default_Handler(void);
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM3.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM3 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM4.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM4.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM4 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM55.c
|
||||
* @brief CMSIS Core Device Startup File for ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 31. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
extern uint32_t __STACK_LIMIT;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
void Default_Handler(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 480 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic push
|
||||
#pragma clang diagnostic ignored "-Wmissing-noreturn"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic pop
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM55.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 23. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include "partition_ARMCM55.h"
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (5U * XTAL)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||
(defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
TZ_SAU_Setup();
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM7.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM7.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM7 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2019-2020 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 09. December 2019
|
||||
* $Revision: V1.0.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_bayes_example_f32.c
|
||||
*
|
||||
* Description: Example code demonstrating how to use Bayes functions.
|
||||
*
|
||||
* Target Processor: Cortex-M/Cortex-A
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup BayesExample Bayes Example
|
||||
*
|
||||
* \par Description:
|
||||
* \par
|
||||
* Demonstrates the use of Bayesian classifier functions. It is complementing the tutorial
|
||||
* about classical ML with CMSIS-DSP and python scikit-learn:
|
||||
* https://developer.arm.com/solutions/machine-learning-on-arm/developer-material/how-to-guides/implement-classical-ml-with-arm-cmsis-dsp-libraries
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/** \example arm_bayes_example_f32.c
|
||||
*/
|
||||
|
||||
#include <math.h>
|
||||
#include <stdio.h>
|
||||
#include "arm_math.h"
|
||||
|
||||
/*
|
||||
Those parameters can be generated with the python library scikit-learn.
|
||||
*/
|
||||
arm_gaussian_naive_bayes_instance_f32 S;
|
||||
|
||||
#define NB_OF_CLASSES 3
|
||||
#define VECTOR_DIMENSION 2
|
||||
|
||||
const float32_t theta[NB_OF_CLASSES*VECTOR_DIMENSION] = {
|
||||
1.4539529436590528f, 0.8722776016801852f,
|
||||
-1.5267934452462473f, 0.903204577814203f,
|
||||
-0.15338006360932258f, -2.9997913665803964f
|
||||
}; /**< Mean values for the Gaussians */
|
||||
|
||||
const float32_t sigma[NB_OF_CLASSES*VECTOR_DIMENSION] = {
|
||||
1.0063470889514925f, 0.9038018246524426f,
|
||||
1.0224479953244736f, 0.7768764290432544f,
|
||||
1.1217662403241206f, 1.2303890106020325f
|
||||
}; /**< Variances for the Gaussians */
|
||||
|
||||
const float32_t classPriors[NB_OF_CLASSES] = {
|
||||
0.3333333333333333f, 0.3333333333333333f, 0.3333333333333333f
|
||||
}; /**< Class prior probabilities */
|
||||
|
||||
int32_t main(void)
|
||||
{
|
||||
/* Array of input data */
|
||||
float32_t in[2];
|
||||
|
||||
/* Result of the classifier */
|
||||
float32_t result[NB_OF_CLASSES];
|
||||
float32_t temp[NB_OF_CLASSES];
|
||||
float32_t maxProba;
|
||||
uint32_t index;
|
||||
|
||||
S.vectorDimension = VECTOR_DIMENSION;
|
||||
S.numberOfClasses = NB_OF_CLASSES;
|
||||
S.theta = theta;
|
||||
S.sigma = sigma;
|
||||
S.classPriors = classPriors;
|
||||
S.epsilon=4.328939296523643e-09f;
|
||||
|
||||
in[0] = 1.5f;
|
||||
in[1] = 1.0f;
|
||||
|
||||
index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp);
|
||||
|
||||
maxProba = result[index];
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
printf("Class = %d\n", index);
|
||||
#endif
|
||||
|
||||
in[0] = -1.5f;
|
||||
in[1] = 1.0f;
|
||||
|
||||
index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp);
|
||||
|
||||
maxProba = result[index];
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
printf("Class = %d\n", index);
|
||||
#endif
|
||||
|
||||
in[0] = 0.0f;
|
||||
in[1] = -3.0f;
|
||||
|
||||
index = arm_gaussian_naive_bayes_predict_f32(&S, in, result,temp);
|
||||
|
||||
maxProba = result[index];
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
printf("Class = %d\n", index);
|
||||
#endif
|
||||
|
||||
#if !defined(SEMIHOSTING)
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#
|
||||
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
CMSIS DSP_Lib example arm_class_marks_example
|
||||
|
||||
The example is available for different targets:
|
||||
Cortex-M0
|
||||
Cortex-M3
|
||||
Cortex-M4 with FPU
|
||||
Cortex-M7 with single precision FPU
|
||||
Cortex-M55 with double precision FPU, Integer + Floating Point MVE
|
||||
|
||||
The example is configured for Models Debugger
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
cmake_minimum_required (VERSION 3.14)
|
||||
project (arm_class_marks_example VERSION 0.1)
|
||||
|
||||
|
||||
# Needed to include the configBoot module
|
||||
# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
|
||||
set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
|
||||
set(DSP ${ROOT}/CMSIS/DSP)
|
||||
|
||||
# Add DSP folder to module path
|
||||
list(APPEND CMAKE_MODULE_PATH ${DSP})
|
||||
|
||||
###################################
|
||||
#
|
||||
# LIBRARIES
|
||||
#
|
||||
###################################
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(../../../Source bin_dsp)
|
||||
|
||||
|
||||
###################################
|
||||
#
|
||||
# TEST APPLICATION
|
||||
#
|
||||
###################################
|
||||
|
||||
|
||||
add_executable(arm_class_marks_example)
|
||||
|
||||
|
||||
include(config)
|
||||
configApp(arm_class_marks_example ${ROOT})
|
||||
|
||||
target_sources(arm_class_marks_example PRIVATE arm_class_marks_example_f32.c)
|
||||
|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_class_marks_example PRIVATE CMSISDSP)
|
||||
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM0.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10..31 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM0.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM0 Device
|
||||
* @version V5.3.1
|
||||
* @date 09. July 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM3.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void) ;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Default_Handler(void);
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM3.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM3 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM4.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM4.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM4 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM55.c
|
||||
* @brief CMSIS Core Device Startup File for ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 31. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
extern uint32_t __STACK_LIMIT;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
void Default_Handler(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 480 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic push
|
||||
#pragma clang diagnostic ignored "-Wmissing-noreturn"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic pop
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM55.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 23. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include "partition_ARMCM55.h"
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (5U * XTAL)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||
(defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
TZ_SAU_Setup();
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM7.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM7.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM7 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,221 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_class_marks_example_f32.c
|
||||
*
|
||||
* Description: Example code to calculate Minimum, Maximum
|
||||
* Mean, std and variance of marks obtained in a class
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ClassMarks Class Marks Example
|
||||
*
|
||||
* \par Description:
|
||||
* \par
|
||||
* Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance
|
||||
* and Matrix functions to calculate statistical values of marks obtained in a class.
|
||||
*
|
||||
* \note This example also demonstrates the usage of static initialization.
|
||||
*
|
||||
* \par Variables Description:
|
||||
* \par
|
||||
* \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects
|
||||
* \li \c max_marks Maximum of all marks
|
||||
* \li \c min_marks Minimum of all marks
|
||||
* \li \c mean Mean of all marks
|
||||
* \li \c var Variance of the marks
|
||||
* \li \c std Standard deviation of the marks
|
||||
* \li \c numStudents Total number of students in the class
|
||||
*
|
||||
* \par CMSIS DSP Software Library Functions Used:
|
||||
* \par
|
||||
* - arm_mat_init_f32()
|
||||
* - arm_mat_mult_f32()
|
||||
* - arm_max_f32()
|
||||
* - arm_min_f32()
|
||||
* - arm_mean_f32()
|
||||
* - arm_std_f32()
|
||||
* - arm_var_f32()
|
||||
*
|
||||
* <b> Refer </b>
|
||||
* \link arm_class_marks_example_f32.c \endlink
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/** \example arm_class_marks_example_f32.c
|
||||
*/
|
||||
#include "arm_math.h"
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
|
||||
#define USE_STATIC_INIT
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Global defines
|
||||
** ------------------------------------------------------------------- */
|
||||
|
||||
#define TEST_LENGTH_SAMPLES (20*4)
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** List of Marks scored by 20 students for 4 subjects
|
||||
** ------------------------------------------------------------------- */
|
||||
const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
|
||||
{
|
||||
42.000000, 37.000000, 81.000000, 28.000000,
|
||||
83.000000, 72.000000, 36.000000, 38.000000,
|
||||
32.000000, 51.000000, 63.000000, 64.000000,
|
||||
97.000000, 82.000000, 95.000000, 90.000000,
|
||||
66.000000, 51.000000, 54.000000, 42.000000,
|
||||
67.000000, 56.000000, 45.000000, 57.000000,
|
||||
67.000000, 69.000000, 35.000000, 52.000000,
|
||||
29.000000, 81.000000, 58.000000, 47.000000,
|
||||
38.000000, 76.000000, 100.000000, 29.000000,
|
||||
33.000000, 47.000000, 29.000000, 50.000000,
|
||||
34.000000, 41.000000, 61.000000, 46.000000,
|
||||
52.000000, 50.000000, 48.000000, 36.000000,
|
||||
47.000000, 55.000000, 44.000000, 40.000000,
|
||||
100.000000, 94.000000, 84.000000, 37.000000,
|
||||
32.000000, 71.000000, 47.000000, 77.000000,
|
||||
31.000000, 50.000000, 49.000000, 35.000000,
|
||||
63.000000, 67.000000, 40.000000, 31.000000,
|
||||
29.000000, 68.000000, 61.000000, 38.000000,
|
||||
31.000000, 28.000000, 28.000000, 76.000000,
|
||||
55.000000, 33.000000, 29.000000, 39.000000
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Number of subjects X 1
|
||||
* ------------------------------------------------------------------- */
|
||||
const float32_t testUnity_f32[4] =
|
||||
{
|
||||
1.000, 1.000, 1.000, 1.000
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** f32 Output buffer
|
||||
** ------------------------------------------------------------------- */
|
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES];
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global defines
|
||||
*------------------------------------------------------------------- */
|
||||
#define NUMSTUDENTS 20
|
||||
#define NUMSUBJECTS 4
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables
|
||||
*------------------------------------------------------------------- */
|
||||
|
||||
uint32_t numStudents = 20;
|
||||
uint32_t numSubjects = 4;
|
||||
float32_t max_marks, min_marks, mean, std, var;
|
||||
uint32_t student_num;
|
||||
|
||||
/* ----------------------------------------------------------------------------------
|
||||
* Main f32 test function. It returns maximum marks secured and student number
|
||||
* ------------------------------------------------------------------------------- */
|
||||
|
||||
int32_t main()
|
||||
{
|
||||
|
||||
#ifndef USE_STATIC_INIT
|
||||
|
||||
arm_matrix_instance_f32 srcA;
|
||||
arm_matrix_instance_f32 srcB;
|
||||
arm_matrix_instance_f32 dstC;
|
||||
|
||||
/* Input and output matrices initializations */
|
||||
arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
|
||||
arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
|
||||
arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
|
||||
|
||||
#else
|
||||
|
||||
/* Static Initializations of Input and output matrix sizes and array */
|
||||
arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
|
||||
arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
|
||||
arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
*Call the Matrix multiplication process function
|
||||
* ------------------------------------------------------------------- */
|
||||
arm_mat_mult_f32(&srcA, &srcB, &dstC);
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Max function to calculate max marks among numStudents
|
||||
** ------------------------------------------------------------------- */
|
||||
arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Min function to calculate min marks among numStudents
|
||||
** ------------------------------------------------------------------- */
|
||||
arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the Mean function to calculate mean
|
||||
** ------------------------------------------------------------------- */
|
||||
arm_mean_f32(testOutput, numStudents, &mean);
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the std function to calculate standard deviation
|
||||
** ------------------------------------------------------------------- */
|
||||
arm_std_f32(testOutput, numStudents, &std);
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Call the var function to calculate variance
|
||||
** ------------------------------------------------------------------- */
|
||||
arm_var_f32(testOutput, numStudents, &var);
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
printf("mean = %f, std = %f\n",mean,std);
|
||||
#endif
|
||||
|
||||
#if !defined(SEMIHOSTING)
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#
|
||||
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
CMSIS DSP_Lib example arm_convolution_example.
|
||||
|
||||
The example is available for different targets:
|
||||
Cortex-M0
|
||||
Cortex-M3
|
||||
Cortex-M4 with FPU
|
||||
Cortex-M7 with single precision FPU
|
||||
Cortex-M55 with double precision FPU, Integer + Floating Point MVE
|
||||
|
||||
The example is configured for Models Debugger
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
cmake_minimum_required (VERSION 3.14)
|
||||
project (arm_convolution_example VERSION 0.1)
|
||||
|
||||
|
||||
# Needed to include the configBoot module
|
||||
# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
|
||||
set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
|
||||
set(DSP ${ROOT}/CMSIS/DSP)
|
||||
|
||||
# Add DSP folder to module path
|
||||
list(APPEND CMAKE_MODULE_PATH ${DSP})
|
||||
|
||||
###################################
|
||||
#
|
||||
# LIBRARIES
|
||||
#
|
||||
###################################
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(../../../Source bin_dsp)
|
||||
|
||||
|
||||
###################################
|
||||
#
|
||||
# TEST APPLICATION
|
||||
#
|
||||
###################################
|
||||
|
||||
|
||||
add_executable(arm_convolution_example)
|
||||
|
||||
|
||||
include(config)
|
||||
configApp(arm_convolution_example ${ROOT})
|
||||
|
||||
target_sources(arm_convolution_example PRIVATE arm_convolution_example_f32.c math_helper.c)
|
||||
|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_convolution_example PRIVATE CMSISDSP)
|
||||
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM0.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10..31 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM0.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM0 Device
|
||||
* @version V5.3.1
|
||||
* @date 09. July 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM3.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void) ;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Default_Handler(void);
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM3.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM3 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM4.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM4.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM4 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM55.c
|
||||
* @brief CMSIS Core Device Startup File for ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 31. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
extern uint32_t __STACK_LIMIT;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
void Default_Handler(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 480 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic push
|
||||
#pragma clang diagnostic ignored "-Wmissing-noreturn"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic pop
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM55.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 23. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include "partition_ARMCM55.h"
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (5U * XTAL)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||
(defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
TZ_SAU_Setup();
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM7.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM7.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM7 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,263 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_convolution_example_f32.c
|
||||
*
|
||||
* Description: Example code demonstrating Convolution of two input signals using fft.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ConvolutionExample Convolution Example
|
||||
*
|
||||
* \par Description:
|
||||
* \par
|
||||
* Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex
|
||||
* Multiplication, and Support Functions.
|
||||
*
|
||||
* \par Algorithm:
|
||||
* \par
|
||||
* The convolution theorem states that convolution in the time domain corresponds to
|
||||
* multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of
|
||||
* two signals is equal to the product of their individual Fourier transforms.
|
||||
* The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
|
||||
* \par
|
||||
* Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively,
|
||||
* are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code>
|
||||
* and is a power of 4 as FFT implementation is radix-4.
|
||||
* The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input
|
||||
* signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of
|
||||
* the multiplied result.
|
||||
* \par
|
||||
* This is denoted by the following equations:
|
||||
* <pre> A[k] = FFT(a[n],N)
|
||||
* B[k] = FFT(b[n],N)
|
||||
* conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre>
|
||||
* where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code>
|
||||
* and <code>b[n]</code> respectively.
|
||||
* The length of the convolved signal is <code>(n1+n2-1)</code>.
|
||||
*
|
||||
* \par Block Diagram:
|
||||
* \par
|
||||
* \image html Convolution.gif
|
||||
*
|
||||
* \par Variables Description:
|
||||
* \par
|
||||
* \li \c testInputA_f32 points to the first input sequence
|
||||
* \li \c srcALen length of the first input sequence
|
||||
* \li \c testInputB_f32 points to the second input sequence
|
||||
* \li \c srcBLen length of the second input sequence
|
||||
* \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code>
|
||||
* \li \c AxB points to the output array where the product of individual FFTs of inputs is stored.
|
||||
*
|
||||
* \par CMSIS DSP Software Library Functions Used:
|
||||
* \par
|
||||
* - arm_fill_f32()
|
||||
* - arm_copy_f32()
|
||||
* - arm_cfft_radix4_init_f32()
|
||||
* - arm_cfft_radix4_f32()
|
||||
* - arm_cmplx_mult_cmplx_f32()
|
||||
*
|
||||
* <b> Refer </b>
|
||||
* \link arm_convolution_example_f32.c \endlink
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/** \example arm_convolution_example_f32.c
|
||||
*/
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "math_helper.h"
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed
|
||||
* ------------------------------------------------------------------- */
|
||||
#define MAX_BLOCKSIZE 128
|
||||
#define DELTA (0.000001f)
|
||||
#define SNR_THRESHOLD 90
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare I/O buffers
|
||||
* ------------------------------------------------------------------- */
|
||||
float32_t Ak[MAX_BLOCKSIZE]; /* Input A */
|
||||
float32_t Bk[MAX_BLOCKSIZE]; /* Input B */
|
||||
float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Convolution example for 32-blockSize
|
||||
* Generated by the MATLAB randn() function
|
||||
* ------------------------------------------------------------------- */
|
||||
float32_t testInputA_f32[64] =
|
||||
{
|
||||
-0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285,
|
||||
1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579,
|
||||
-0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377,
|
||||
-2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827,
|
||||
-0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938,
|
||||
-0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619,
|
||||
0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222,
|
||||
-0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249,
|
||||
-1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355,
|
||||
-1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090,
|
||||
-0.161050, -0.940794, 0.367961, 0.291907
|
||||
|
||||
};
|
||||
|
||||
float32_t testInputB_f32[64] =
|
||||
{
|
||||
0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885,
|
||||
0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493,
|
||||
-0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692,
|
||||
-0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962,
|
||||
0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397,
|
||||
1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399,
|
||||
-1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011,
|
||||
0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456,
|
||||
0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182,
|
||||
-1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952,
|
||||
0.635474, -0.970468, 1.334057, -0.111370
|
||||
};
|
||||
|
||||
const float testRefOutput_f32[127] =
|
||||
{
|
||||
-0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656,
|
||||
5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012,
|
||||
-1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236,
|
||||
-7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508,
|
||||
-1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267,
|
||||
11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552,
|
||||
1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344,
|
||||
-0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488,
|
||||
-13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415,
|
||||
-0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462,
|
||||
8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280,
|
||||
7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073,
|
||||
-2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291,
|
||||
1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885,
|
||||
8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417,
|
||||
8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678,
|
||||
-6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410,
|
||||
-2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013,
|
||||
-3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358,
|
||||
-4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638,
|
||||
1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440, 0
|
||||
};
|
||||
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables
|
||||
* ------------------------------------------------------------------- */
|
||||
uint32_t srcALen = 64; /* Length of Input A */
|
||||
uint32_t srcBLen = 64; /* Length of Input B */
|
||||
uint32_t outLen; /* Length of convolution output */
|
||||
float32_t snr; /* output SNR */
|
||||
|
||||
int32_t main(void)
|
||||
{
|
||||
arm_status status; /* Status of the example */
|
||||
arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
printf("START\n");
|
||||
#endif
|
||||
|
||||
/* CFFT Structure instance pointer */
|
||||
arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
|
||||
(arm_cfft_radix4_instance_f32*) &cfft_instance;
|
||||
|
||||
/* output length of convolution */
|
||||
outLen = srcALen + srcBLen - 1;
|
||||
|
||||
/* Initialise the fft input buffers with all zeros */
|
||||
arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE);
|
||||
arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE);
|
||||
|
||||
/* Copy the input values to the fft input buffers */
|
||||
arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2);
|
||||
arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2);
|
||||
|
||||
/* Initialize the CFFT function to compute 64 point fft */
|
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
|
||||
|
||||
/* Transform input a[n] from time domain to frequency domain A[k] */
|
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
|
||||
/* Transform input b[n] from time domain to frequency domain B[k] */
|
||||
arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
|
||||
|
||||
/* Complex Multiplication of the two input buffers in frequency domain */
|
||||
arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
|
||||
|
||||
/* Initialize the CIFFT function to compute 64 point ifft */
|
||||
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
|
||||
|
||||
/* Transform the multiplication output from frequency domain to time domain,
|
||||
that gives the convolved output. */
|
||||
arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
|
||||
|
||||
/* SNR Calculation */
|
||||
snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
|
||||
|
||||
/* Compare the SNR with threshold to test whether the
|
||||
computed output is matched with the reference output values. */
|
||||
status = (snr <= SNR_THRESHOLD) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS;
|
||||
|
||||
if (status != ARM_MATH_SUCCESS)
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("FAILURE\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("SUCCESS\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** \endlink */
|
||||
|
|
@ -0,0 +1,474 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0 b
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
*
|
||||
* Title: math_helper.c
|
||||
*
|
||||
* Description: Definition of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include standard header files
|
||||
* -------------------------------------------------------------------- */
|
||||
#include<math.h>
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Include project header files
|
||||
* -------------------------------------------------------------------- */
|
||||
#include "math_helper.h"
|
||||
|
||||
/**
|
||||
* @brief Caluclation of SNR
|
||||
* @param[in] pRef Pointer to the reference buffer
|
||||
* @param[in] pTest Pointer to the test buffer
|
||||
* @param[in] buffSize total number of samples
|
||||
* @return SNR
|
||||
* The function Caluclates signal to noise ratio for the reference output
|
||||
* and test output
|
||||
*/
|
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
|
||||
{
|
||||
float EnergySignal = 0.0, EnergyError = 0.0;
|
||||
uint32_t i;
|
||||
float SNR;
|
||||
int temp;
|
||||
int *test;
|
||||
|
||||
for (i = 0; i < buffSize; i++)
|
||||
{
|
||||
/* Checking for a NAN value in pRef array */
|
||||
test = (int *)(&pRef[i]);
|
||||
temp = *test;
|
||||
|
||||
if (temp == 0x7FC00000)
|
||||
{
|
||||
return(0);
|
||||
}
|
||||
|
||||
/* Checking for a NAN value in pTest array */
|
||||
test = (int *)(&pTest[i]);
|
||||
temp = *test;
|
||||
|
||||
if (temp == 0x7FC00000)
|
||||
{
|
||||
return(0);
|
||||
}
|
||||
EnergySignal += pRef[i] * pRef[i];
|
||||
EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
|
||||
}
|
||||
|
||||
/* Checking for a NAN value in EnergyError */
|
||||
test = (int *)(&EnergyError);
|
||||
temp = *test;
|
||||
|
||||
if (temp == 0x7FC00000)
|
||||
{
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
SNR = 10 * log10 (EnergySignal / EnergyError);
|
||||
|
||||
return (SNR);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer
|
||||
* @param[in,out] input_buf Pointer to input buffer
|
||||
* @param[in] blockSize block Size
|
||||
* @param[in] guard_bits guard bits
|
||||
* @return none
|
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/
|
||||
|
||||
void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
|
||||
uint32_t guard_bits)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < blockSize; i++)
|
||||
{
|
||||
input_buf[i] = input_buf[i] >> guard_bits;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed in q12.20 format
|
||||
* @param[in] pIn pointer to input buffer
|
||||
* @param[out] pOut pointer to outputbuffer
|
||||
* @param[in] numSamples number of samples in the input buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point(q12.20) values
|
||||
*/
|
||||
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
/* 1048576.0f corresponds to pow(2, 20) */
|
||||
pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
|
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
|
||||
|
||||
if (pIn[i] == (float) 1.0)
|
||||
{
|
||||
pOut[i] = 0x000FFFFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output
|
||||
* @param[in] pIn Pointer to Ref buffer
|
||||
* @param[in] pOut Pointer to Test buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return maximum difference
|
||||
*/
|
||||
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t *pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0;
|
||||
uint32_t maxDiff = 0;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (diff > 0) ? diff : -diff;
|
||||
|
||||
if (diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
}
|
||||
|
||||
return(maxDiff);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Compare MATLAB Reference Output and ARM Test output
|
||||
* @param[in] pIn Pointer to Ref buffer
|
||||
* @param[in] pOut Pointer to Test buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return maximum difference
|
||||
*/
|
||||
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
int32_t diff, diffCrnt = 0;
|
||||
uint32_t maxDiff = 0;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
diff = pIn[i] - pOut[i];
|
||||
diffCrnt = (diff > 0) ? diff : -diff;
|
||||
|
||||
if (diffCrnt > maxDiff)
|
||||
{
|
||||
maxDiff = diffCrnt;
|
||||
}
|
||||
}
|
||||
|
||||
return(maxDiff);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer
|
||||
* @param[in,out] input_buf Pointer to input buffer
|
||||
* @param[in] blockSize block Size
|
||||
* @param[in] guard_bits guard bits
|
||||
* @return none
|
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/
|
||||
|
||||
void arm_provide_guard_bits_q31 (q31_t * input_buf,
|
||||
uint32_t blockSize,
|
||||
uint32_t guard_bits)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < blockSize; i++)
|
||||
{
|
||||
input_buf[i] = input_buf[i] >> guard_bits;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Provide guard bits for Input buffer
|
||||
* @param[in,out] input_buf Pointer to input buffer
|
||||
* @param[in] blockSize block Size
|
||||
* @param[in] guard_bits guard bits
|
||||
* @return none
|
||||
* The function Provides the guard bits for the buffer
|
||||
* to avoid overflow
|
||||
*/
|
||||
|
||||
void arm_provide_guard_bits_q7 (q7_t * input_buf,
|
||||
uint32_t blockSize,
|
||||
uint32_t guard_bits)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < blockSize; i++)
|
||||
{
|
||||
input_buf[i] = input_buf[i] >> guard_bits;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Caluclates number of guard bits
|
||||
* @param[in] num_adds number of additions
|
||||
* @return guard bits
|
||||
* The function Caluclates the number of guard bits
|
||||
* depending on the numtaps
|
||||
*/
|
||||
|
||||
uint32_t arm_calc_guard_bits (uint32_t num_adds)
|
||||
{
|
||||
uint32_t i = 1, j = 0;
|
||||
|
||||
if (num_adds == 1)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
while (i < num_adds)
|
||||
{
|
||||
i = i * 2;
|
||||
j++;
|
||||
}
|
||||
|
||||
return (j);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Apply guard bits to buffer
|
||||
* @param[in,out] pIn pointer to input buffer
|
||||
* @param[in] numSamples number of samples in the input buffer
|
||||
* @param[in] guard_bits guard bits
|
||||
* @return none
|
||||
*/
|
||||
|
||||
void arm_apply_guard_bits (float32_t *pIn,
|
||||
uint32_t numSamples,
|
||||
uint32_t guard_bits)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Calculates pow(2, numShifts)
|
||||
* @param[in] numShifts number of shifts
|
||||
* @return pow(2, numShifts)
|
||||
*/
|
||||
uint32_t arm_calc_2pow(uint32_t numShifts)
|
||||
{
|
||||
|
||||
uint32_t i, val = 1;
|
||||
|
||||
for (i = 0; i < numShifts; i++)
|
||||
{
|
||||
val = val * 2;
|
||||
}
|
||||
|
||||
return(val);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q14
|
||||
* @param[in] pIn pointer to input buffer
|
||||
* @param[out] pOut pointer to output buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point values
|
||||
*/
|
||||
|
||||
void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
/* 16384.0f corresponds to pow(2, 14) */
|
||||
pOut[i] = (q15_t) (pIn[i] * 16384.0f);
|
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
|
||||
|
||||
if (pIn[i] == (float) 2.0)
|
||||
{
|
||||
pOut[i] = 0x7FFF;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format
|
||||
* @param[in] pIn pointer to input buffer
|
||||
* @param[out] pOut pointer to output buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point values
|
||||
*/
|
||||
|
||||
void arm_float_to_q30 (float *pIn, q31_t * pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
/* 1073741824.0f corresponds to pow(2, 30) */
|
||||
pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
|
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
|
||||
|
||||
if (pIn[i] == (float) 2.0)
|
||||
{
|
||||
pOut[i] = 0x7FFFFFFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q30 format
|
||||
* @param[in] pIn pointer to input buffer
|
||||
* @param[out] pOut pointer to output buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point values
|
||||
*/
|
||||
|
||||
void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
/* 1073741824.0f corresponds to pow(2, 30) */
|
||||
pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
|
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
|
||||
|
||||
if (pIn[i] == (float) 4.0)
|
||||
{
|
||||
pOut[i] = 0x7FFFFFFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Converts float to fixed q28 format
|
||||
* @param[in] pIn pointer to input buffer
|
||||
* @param[out] pOut pointer to output buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point values
|
||||
*/
|
||||
|
||||
void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
/* 268435456.0f corresponds to pow(2, 28) */
|
||||
pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
|
||||
|
||||
pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
|
||||
|
||||
if (pIn[i] == (float) 8.0)
|
||||
{
|
||||
pOut[i] = 0x7FFFFFFF;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
|
||||
Conflicting with the new clip functions in CMSIS-DSP and not used
|
||||
in the examples.
|
||||
|
||||
*/
|
||||
#if 0
|
||||
/**
|
||||
* @brief Clip the float values to +/- 1
|
||||
* @param[in,out] pIn input buffer
|
||||
* @param[in] numSamples number of samples in the buffer
|
||||
* @return none
|
||||
* The function converts floating point values to fixed point values
|
||||
*/
|
||||
|
||||
void arm_clip_f32 (float *pIn, uint32_t numSamples)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < numSamples; i++)
|
||||
{
|
||||
if (pIn[i] > 1.0f)
|
||||
{
|
||||
pIn[i] = 1.0;
|
||||
}
|
||||
else if ( pIn[i] < -1.0f)
|
||||
{
|
||||
pIn[i] = -1.0;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
*
|
||||
* Title: math_helper.h
|
||||
*
|
||||
* Description: Prototypes of all helper functions required.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
#ifndef MATH_HELPER_H
|
||||
#define MATH_HELPER_H
|
||||
|
||||
float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize);
|
||||
void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
|
||||
void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
|
||||
void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
|
||||
void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
|
||||
void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
|
||||
void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
|
||||
void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
|
||||
uint32_t arm_calc_guard_bits(uint32_t num_adds);
|
||||
void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
|
||||
uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
|
||||
uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
|
||||
uint32_t arm_calc_2pow(uint32_t guard_bits);
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#
|
||||
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
CMSIS DSP_Lib example arm_dotproduct_example.
|
||||
|
||||
The example is available for different targets:
|
||||
Cortex-M0
|
||||
Cortex-M3
|
||||
Cortex-M4 with FPU
|
||||
Cortex-M7 with single precision FPU
|
||||
Cortex-M55 with double precision FPU, Integer + Floating Point MVE
|
||||
|
||||
The example is configured for Models Debugger
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
cmake_minimum_required (VERSION 3.14)
|
||||
project (arm_dotproduct_example VERSION 0.1)
|
||||
|
||||
|
||||
# Needed to include the configBoot module
|
||||
# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
|
||||
set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
|
||||
set(DSP ${ROOT}/CMSIS/DSP)
|
||||
|
||||
# Add DSP folder to module path
|
||||
list(APPEND CMAKE_MODULE_PATH ${DSP})
|
||||
|
||||
###################################
|
||||
#
|
||||
# LIBRARIES
|
||||
#
|
||||
###################################
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(../../../Source bin_dsp)
|
||||
|
||||
|
||||
###################################
|
||||
#
|
||||
# TEST APPLICATION
|
||||
#
|
||||
###################################
|
||||
|
||||
|
||||
add_executable(arm_dotproduct_example)
|
||||
|
||||
|
||||
include(config)
|
||||
configApp(arm_dotproduct_example ${ROOT})
|
||||
|
||||
target_sources(arm_dotproduct_example PRIVATE arm_dotproduct_example_f32.c)
|
||||
|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_dotproduct_example PRIVATE CMSISDSP)
|
||||
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM0.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10..31 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM0.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM0 Device
|
||||
* @version V5.3.1
|
||||
* @date 09. July 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM3.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void) ;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Default_Handler(void);
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM3.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM3 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM4.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM4.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM4 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM55.c
|
||||
* @brief CMSIS Core Device Startup File for ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 31. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
extern uint32_t __STACK_LIMIT;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
void Default_Handler(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 480 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic push
|
||||
#pragma clang diagnostic ignored "-Wmissing-noreturn"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic pop
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM55.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 23. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include "partition_ARMCM55.h"
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (5U * XTAL)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||
(defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
TZ_SAU_Setup();
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM7.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM7.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM7 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,189 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_dotproduct_example_f32.c
|
||||
*
|
||||
* Description: Example code computing dot product of two vectors.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup DotproductExample Dot Product Example
|
||||
*
|
||||
* \par Description:
|
||||
* \par
|
||||
* Demonstrates the use of the Multiply and Add functions to perform the dot product.
|
||||
* The dot product of two vectors is obtained by multiplying corresponding elements
|
||||
* and summing the products.
|
||||
|
||||
* \par Algorithm:
|
||||
* \par
|
||||
* The two input vectors \c A and \c B with length \c n, are multiplied element-by-element
|
||||
* and then added to obtain dot product.
|
||||
* \par
|
||||
* This is denoted by the following equation:
|
||||
* <pre> dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre>
|
||||
*
|
||||
* \par Block Diagram:
|
||||
* \par
|
||||
* \image html dotProduct.gif
|
||||
*
|
||||
* \par Variables Description:
|
||||
* \par
|
||||
* \li \c srcA_buf_f32 points to first input vector
|
||||
* \li \c srcB_buf_f32 points to second input vector
|
||||
* \li \c testOutput stores dot product of the two input vectors.
|
||||
*
|
||||
* \par CMSIS DSP Software Library Functions Used:
|
||||
* \par
|
||||
* - arm_mult_f32()
|
||||
* - arm_add_f32()
|
||||
*
|
||||
* <b> Refer </b>
|
||||
* \link arm_dotproduct_example_f32.c \endlink
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/** \example arm_dotproduct_example_f32.c
|
||||
*/
|
||||
|
||||
#include <math.h>
|
||||
#include "arm_math.h"
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Defines each of the tests performed
|
||||
* ------------------------------------------------------------------- */
|
||||
#define MAX_BLOCKSIZE 32
|
||||
#define DELTA (0.000001f)
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Test input data for Floating point Dot Product example for 32-blockSize
|
||||
* Generated by the MATLAB randn() function
|
||||
* ------------------------------------------------------------------- */
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcA for blockSize 32
|
||||
** ------------------------------------------------------------------- */
|
||||
float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
|
||||
{
|
||||
-0.4325648115282207, -1.6655843782380970, 0.1253323064748307,
|
||||
0.2876764203585489, -1.1464713506814637, 1.1909154656429988,
|
||||
1.1891642016521031, -0.0376332765933176, 0.3272923614086541,
|
||||
0.1746391428209245, -0.1867085776814394, 0.7257905482933027,
|
||||
-0.5883165430141887, 2.1831858181971011, -0.1363958830865957,
|
||||
0.1139313135208096, 1.0667682113591888, 0.0592814605236053,
|
||||
-0.0956484054836690, -0.8323494636500225, 0.2944108163926404,
|
||||
-1.3361818579378040, 0.7143245518189522, 1.6235620644462707,
|
||||
-0.6917757017022868, 0.8579966728282626, 1.2540014216025324,
|
||||
-1.5937295764474768, -1.4409644319010200, 0.5711476236581780,
|
||||
-0.3998855777153632, 0.6899973754643451
|
||||
};
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
** Test input data of srcB for blockSize 32
|
||||
** ------------------------------------------------------------------- */
|
||||
float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
|
||||
{
|
||||
1.7491401329284098, 0.1325982188803279, 0.3252281811989881,
|
||||
-0.7938091410349637, 0.3149236145048914, -0.5272704888029532,
|
||||
0.9322666565031119, 1.1646643544607362, -2.0456694357357357,
|
||||
-0.6443728590041911, 1.7410657940825480, 0.4867684246821860,
|
||||
1.0488288293660140, 1.4885752747099299, 1.2705014969484090,
|
||||
-1.8561241921210170, 2.1343209047321410, 1.4358467535865909,
|
||||
-0.9173023332875400, -1.1060770780029008, 0.8105708062681296,
|
||||
0.6985430696369063, -0.4015827425012831, 1.2687512030669628,
|
||||
-0.7836083053674872, 0.2132664971465569, 0.7878984786088954,
|
||||
0.8966819356782295, -0.1869172943544062, 1.0131816724341454,
|
||||
0.2484350696132857, 0.0596083377937976
|
||||
};
|
||||
|
||||
/* Reference dot product output */
|
||||
float32_t refDotProdOut = 5.9273644806352142;
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Declare Global variables
|
||||
* ------------------------------------------------------------------- */
|
||||
float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */
|
||||
float32_t testOutput; /* Final ouput */
|
||||
|
||||
arm_status status; /* Status of the example */
|
||||
|
||||
int32_t main(void)
|
||||
{
|
||||
uint32_t i; /* Loop counter */
|
||||
float32_t diff; /* Difference between reference and test outputs */
|
||||
|
||||
/* Multiplication of two input buffers */
|
||||
arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
|
||||
|
||||
/* Accumulate the multiplication output values to
|
||||
get the dot product of the two inputs */
|
||||
for(i=0; i< MAX_BLOCKSIZE; i++)
|
||||
{
|
||||
arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
|
||||
}
|
||||
|
||||
/* absolute value of difference between ref and test */
|
||||
diff = fabsf(refDotProdOut - testOutput);
|
||||
|
||||
/* Comparison of dot product value with reference */
|
||||
status = (diff > DELTA) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS;
|
||||
|
||||
if (status != ARM_MATH_SUCCESS)
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("FAILURE\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("SUCCESS\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/** \endlink */
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#
|
||||
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
CMSIS DSP_Lib example arm_fft_bin_example.
|
||||
|
||||
The example is available for different targets:
|
||||
Cortex-M0
|
||||
Cortex-M3
|
||||
Cortex-M4 with FPU
|
||||
Cortex-M7 with single precision FPU
|
||||
Cortex-M55 with double precision FPU, Integer + Floating Point MVE
|
||||
|
||||
The example is configured for Models Debugger
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
cmake_minimum_required (VERSION 3.14)
|
||||
project (arm_fft_bin_example VERSION 0.1)
|
||||
|
||||
|
||||
# Needed to include the configBoot module
|
||||
# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
|
||||
set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
|
||||
set(DSP ${ROOT}/CMSIS/DSP)
|
||||
|
||||
# Add DSP folder to module path
|
||||
list(APPEND CMAKE_MODULE_PATH ${DSP})
|
||||
|
||||
###################################
|
||||
#
|
||||
# LIBRARIES
|
||||
#
|
||||
###################################
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(../../../Source bin_dsp)
|
||||
|
||||
|
||||
###################################
|
||||
#
|
||||
# TEST APPLICATION
|
||||
#
|
||||
###################################
|
||||
|
||||
|
||||
add_executable(arm_fft_bin_example)
|
||||
|
||||
|
||||
include(config)
|
||||
configApp(arm_fft_bin_example ${ROOT})
|
||||
|
||||
target_sources(arm_fft_bin_example PRIVATE arm_fft_bin_data.c arm_fft_bin_example_f32.c)
|
||||
|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_fft_bin_example PRIVATE CMSISDSP)
|
||||
|
||||
|
|
@ -0,0 +1,131 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM0.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10..31 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM0.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM0 Device
|
||||
* @version V5.3.1
|
||||
* @date 09. July 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM0.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM3.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M3 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void) ;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Default_Handler(void);
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM3.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM3 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ARMCM3.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,141 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM4.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M4 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM4.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM4 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM4)
|
||||
#include "ARMCM4.h"
|
||||
#elif defined (ARMCM4_FP)
|
||||
#include "ARMCM4_FP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,154 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM55.c
|
||||
* @brief CMSIS Core Device Startup File for ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 31. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
extern uint32_t __STACK_LIMIT;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler (void);
|
||||
void Default_Handler(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[496] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
SecureFault_Handler, /* -9 Secure Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 480 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void Reset_Handler(void)
|
||||
{
|
||||
__set_MSPLIM((uint32_t)(&__STACK_LIMIT));
|
||||
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic push
|
||||
#pragma clang diagnostic ignored "-Wmissing-noreturn"
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#pragma clang diagnostic pop
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM55.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM55 Device
|
||||
* @version V1.0.0
|
||||
* @date 23. March 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM55)
|
||||
#include "ARMCM55.h"
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include "partition_ARMCM55.h"
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL ( 5000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (5U * XTAL)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
|
||||
(defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
TZ_SAU_Setup();
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,143 @@
|
|||
/******************************************************************************
|
||||
* @file startup_ARMCM7.c
|
||||
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M7 Device
|
||||
* @version V2.0.2
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
External References
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern uint32_t __INITIAL_SP;
|
||||
|
||||
extern __NO_RETURN void __PROGRAM_START(void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Internal References
|
||||
*----------------------------------------------------------------------------*/
|
||||
void __NO_RETURN Default_Handler(void);
|
||||
void __NO_RETURN Reset_Handler (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* Exceptions */
|
||||
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void HardFault_Handler (void) __attribute__ ((weak));
|
||||
void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wpedantic"
|
||||
#endif
|
||||
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
const VECTOR_TABLE_Type __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
|
||||
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
|
||||
Reset_Handler, /* Reset Handler */
|
||||
NMI_Handler, /* -14 NMI Handler */
|
||||
HardFault_Handler, /* -13 Hard Fault Handler */
|
||||
MemManage_Handler, /* -12 MPU Fault Handler */
|
||||
BusFault_Handler, /* -11 Bus Fault Handler */
|
||||
UsageFault_Handler, /* -10 Usage Fault Handler */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
0, /* Reserved */
|
||||
SVC_Handler, /* -5 SVCall Handler */
|
||||
DebugMon_Handler, /* -4 Debug Monitor Handler */
|
||||
0, /* Reserved */
|
||||
PendSV_Handler, /* -2 PendSV Handler */
|
||||
SysTick_Handler, /* -1 SysTick Handler */
|
||||
|
||||
/* Interrupts */
|
||||
Interrupt0_Handler, /* 0 Interrupt 0 */
|
||||
Interrupt1_Handler, /* 1 Interrupt 1 */
|
||||
Interrupt2_Handler, /* 2 Interrupt 2 */
|
||||
Interrupt3_Handler, /* 3 Interrupt 3 */
|
||||
Interrupt4_Handler, /* 4 Interrupt 4 */
|
||||
Interrupt5_Handler, /* 5 Interrupt 5 */
|
||||
Interrupt6_Handler, /* 6 Interrupt 6 */
|
||||
Interrupt7_Handler, /* 7 Interrupt 7 */
|
||||
Interrupt8_Handler, /* 8 Interrupt 8 */
|
||||
Interrupt9_Handler /* 9 Interrupt 9 */
|
||||
/* Interrupts 10 .. 223 are left out */
|
||||
};
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Reset Handler called on controller reset
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Reset_Handler(void)
|
||||
{
|
||||
SystemInit(); /* CMSIS System Initialization */
|
||||
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Hard Fault Handler
|
||||
*----------------------------------------------------------------------------*/
|
||||
__NO_RETURN void HardFault_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Default Handler for Exceptions / Interrupts
|
||||
*----------------------------------------------------------------------------*/
|
||||
void Default_Handler(void)
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/**************************************************************************//**
|
||||
* @file system_ARMCM7.c
|
||||
* @brief CMSIS Device System Source File for
|
||||
* ARMCM7 Device
|
||||
* @version V1.0.1
|
||||
* @date 15. November 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined (ARMCM7)
|
||||
#include "ARMCM7.h"
|
||||
#elif defined (ARMCM7_SP)
|
||||
#include "ARMCM7_SP.h"
|
||||
#elif defined (ARMCM7_DP)
|
||||
#include "ARMCM7_DP.h"
|
||||
#else
|
||||
#error device not specified!
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Define clocks
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define XTAL (50000000UL) /* Oscillator frequency */
|
||||
|
||||
#define SYSTEM_CLOCK (XTAL / 2U)
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
Exception / Interrupt Vector table
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock Variable
|
||||
*----------------------------------------------------------------------------*/
|
||||
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System Core Clock update function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
System initialization function
|
||||
*----------------------------------------------------------------------------*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
|
||||
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
||||
SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
|
||||
#endif
|
||||
|
||||
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
||||
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
||||
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
||||
#endif
|
||||
|
||||
#ifdef UNALIGNED_SUPPORT_DISABLE
|
||||
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
||||
#endif
|
||||
|
||||
SystemCoreClock = SYSTEM_CLOCK;
|
||||
}
|
||||
|
|
@ -0,0 +1,308 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fft_bin_data.c
|
||||
*
|
||||
* Description: Data file used for example code
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
Test Input signal contains 10KHz signal + Uniformly distributed white noise
|
||||
** ------------------------------------------------------------------- */
|
||||
|
||||
float32_t testInput_f32_10khz[2048] =
|
||||
{
|
||||
-0.865129623056441, 0.000000000000000, -2.655020678073846, 0.000000000000000, 0.600664612949661, 0.000000000000000, 0.080378093886515, 0.000000000000000,
|
||||
-2.899160484012034, 0.000000000000000, 2.563004262857762, 0.000000000000000, 3.078328403304206, 0.000000000000000, 0.105906778385130, 0.000000000000000,
|
||||
0.048366940168201, 0.000000000000000, -0.145696461188734, 0.000000000000000, -0.023417155362879, 0.000000000000000, 2.127729174988954, 0.000000000000000,
|
||||
-1.176633086028377, 0.000000000000000, 3.690223557991855, 0.000000000000000, -0.622791766173194, 0.000000000000000, 0.722837373872203, 0.000000000000000,
|
||||
2.739754205367484, 0.000000000000000, -0.062610410524552, 0.000000000000000, -0.891296810967338, 0.000000000000000, -1.845872258871811, 0.000000000000000,
|
||||
1.195039415434387, 0.000000000000000, -2.177388969045026, 0.000000000000000, 1.078649103637905, 0.000000000000000, 2.570976050490193, 0.000000000000000,
|
||||
-1.383551403404574, 0.000000000000000, 2.392141424058873, 0.000000000000000, 2.858002843205065, 0.000000000000000, -3.682433899725536, 0.000000000000000,
|
||||
-3.488146646451150, 0.000000000000000, 1.323468578888120, 0.000000000000000, -0.099771155430726, 0.000000000000000, 1.561168082500454, 0.000000000000000,
|
||||
1.025026795103179, 0.000000000000000, 0.928841900171200, 0.000000000000000, 2.930499509864950, 0.000000000000000, 2.013349089766430, 0.000000000000000,
|
||||
2.381676148486737, 0.000000000000000, -3.081062307950236, 0.000000000000000, -0.389579115537544, 0.000000000000000, 0.181540149166620, 0.000000000000000,
|
||||
-2.601953341353208, 0.000000000000000, 0.333435137783218, 0.000000000000000, -2.812945856162965, 0.000000000000000, 2.649109640172910, 0.000000000000000,
|
||||
-1.003963025744654, 0.000000000000000, 1.552460768755035, 0.000000000000000, 0.088641345335247, 0.000000000000000, -2.519951327113426, 0.000000000000000,
|
||||
-4.341348988610527, 0.000000000000000, 0.557772429359965, 0.000000000000000, -1.671267412948494, 0.000000000000000, 0.733951350960387, 0.000000000000000,
|
||||
0.409263788034864, 0.000000000000000, 3.566033071952806, 0.000000000000000, 1.882565173848352, 0.000000000000000, -1.106017073793287, 0.000000000000000,
|
||||
0.154456720778718, 0.000000000000000, -2.513205795512153, 0.000000000000000, 0.310978660939421, 0.000000000000000, 0.579706500111723, 0.000000000000000,
|
||||
0.000086383683251, 0.000000000000000, -1.311866980897721, 0.000000000000000, 1.840007477574986, 0.000000000000000, -3.253005768451345, 0.000000000000000,
|
||||
1.462584328739432, 0.000000000000000, 1.610103610851738, 0.000000000000000, 0.761914676858907, 0.000000000000000, 0.974541361089834, 0.000000000000000,
|
||||
0.686845845885983, 0.000000000000000, 1.849153122025191, 0.000000000000000, 0.787800410401453, 0.000000000000000, -1.187438909666279, 0.000000000000000,
|
||||
-0.754937911044720, 0.000000000000000, 0.084373858395232, 0.000000000000000, -2.600269011710521, 0.000000000000000, -0.962982842142644, 0.000000000000000,
|
||||
-0.369328108540868, 0.000000000000000, 0.810791418361879, 0.000000000000000, 3.587016488699641, 0.000000000000000, -0.520776145083723, 0.000000000000000,
|
||||
0.640249919627884, 0.000000000000000, 1.103122489464969, 0.000000000000000, 2.231779881455556, 0.000000000000000, -1.308035392685241, 0.000000000000000,
|
||||
0.424070304330106, 0.000000000000000, -0.200383932651189, 0.000000000000000, -2.365526783356541, 0.000000000000000, -0.989114757436628, 0.000000000000000,
|
||||
2.770807688959777, 0.000000000000000, -0.444172737462307, 0.000000000000000, 0.079760979374078, 0.000000000000000, -0.005199118412183, 0.000000000000000,
|
||||
-0.664712668309527, 0.000000000000000, -0.624171857561896, 0.000000000000000, 0.537306979007338, 0.000000000000000, -2.575955675497642, 0.000000000000000,
|
||||
1.562363235756780, 0.000000000000000, 1.814069369848895, 0.000000000000000, -1.293428583392509, 0.000000000000000, -1.026188449495686, 0.000000000000000,
|
||||
-2.981771815588717, 0.000000000000000, -4.223468103075124, 0.000000000000000, 2.672674782004045, 0.000000000000000, -0.856096801117735, 0.000000000000000,
|
||||
0.048517345512563, 0.000000000000000, -0.026860721136222, 0.000000000000000, 0.392932277758187, 0.000000000000000, -1.331740855093099, 0.000000000000000,
|
||||
-1.894292129477081, 0.000000000000000, -1.425006468460681, 0.000000000000000, -2.721772427617057, 0.000000000000000, -1.616831100216806, 0.000000000000000,
|
||||
3.551177651488947, 0.000000000000000, -0.069685667896087, 0.000000000000000, -3.134634907409102, 0.000000000000000, -0.263627598944639, 0.000000000000000,
|
||||
-1.650469945991350, 0.000000000000000, -2.203580339374399, 0.000000000000000, -0.872203246123242, 0.000000000000000, 1.230782812607287, 0.000000000000000,
|
||||
0.257288860093291, 0.000000000000000, 1.989083106173137, 0.000000000000000, -1.985638729453261, 0.000000000000000, -1.416185105842892, 0.000000000000000,
|
||||
-1.131097688325772, 0.000000000000000, -2.245130805416057, 0.000000000000000, -1.938873996219074, 0.000000000000000, 2.043608361562645, 0.000000000000000,
|
||||
-0.583727989880841, 0.000000000000000, -1.785266378212929, 0.000000000000000, 1.961457586224753, 0.000000000000000, 1.139400099963223, 0.000000000000000,
|
||||
-1.979519343363991, 0.000000000000000, 2.003023322818429, 0.000000000000000, 0.229004069076829, 0.000000000000000, 3.452808862193135, 0.000000000000000,
|
||||
2.882273808365857, 0.000000000000000, -1.549450501844438, 0.000000000000000, -3.283872089931876, 0.000000000000000, -0.327025884099064, 0.000000000000000,
|
||||
-0.054979977136430, 0.000000000000000, -1.192280531479012, 0.000000000000000, 0.645539328365578, 0.000000000000000, 2.300832863404618, 0.000000000000000,
|
||||
-1.092951789535240, 0.000000000000000, -1.017368249363773, 0.000000000000000, -0.142673056169787, 0.000000000000000, 0.831073544881250, 0.000000000000000,
|
||||
-2.314612531587064, 0.000000000000000, -2.221456299106321, 0.000000000000000, 0.460261143885226, 0.000000000000000, 0.050585301888595, 0.000000000000000,
|
||||
0.364373329183988, 0.000000000000000, -1.685956552069538, 0.000000000000000, 0.050664512351055, 0.000000000000000, -0.193355783902718, 0.000000000000000,
|
||||
-0.158660446046828, 0.000000000000000, 2.394156453841953, 0.000000000000000, -1.562965718554525, 0.000000000000000, -2.199750600869900, 0.000000000000000,
|
||||
1.544984022381773, 0.000000000000000, -1.988307216807315, 0.000000000000000, -0.628240722541046, 0.000000000000000, -1.436235771505429, 0.000000000000000,
|
||||
1.677013691147313, 0.000000000000000, 1.600741781678228, 0.000000000000000, -0.757380959134706, 0.000000000000000, -4.784797439515566, 0.000000000000000,
|
||||
0.265121462834569, 0.000000000000000, 3.862029485934378, 0.000000000000000, 2.386823577249430, 0.000000000000000, -3.655779745436893, 0.000000000000000,
|
||||
-0.763541621368016, 0.000000000000000, -1.182140388432962, 0.000000000000000, -1.349106114858063, 0.000000000000000, -2.287533624396759, 0.000000000000000,
|
||||
-0.028603745188423, 0.000000000000000, -1.353580755934427, 0.000000000000000, 0.461602380352937, 0.000000000000000, -0.059599055078928, 0.000000000000000,
|
||||
-0.929946734342228, 0.000000000000000, 0.065773089295561, 0.000000000000000, 1.106565863102982, 0.000000000000000, 4.719295086373593, 0.000000000000000,
|
||||
-2.108377703544395, 0.000000000000000, -2.226393620240159, 0.000000000000000, 1.375668397437521, 0.000000000000000, -0.960772428525443, 0.000000000000000,
|
||||
-2.156313465390571, 0.000000000000000, 1.126060012375311, 0.000000000000000, 2.756485137030720, 0.000000000000000, 0.739639690862600, 0.000000000000000,
|
||||
3.914769510295006, 0.000000000000000, 1.685232785586675, 0.000000000000000, 4.079058040970612, 0.000000000000000, -1.174598301660513, 0.000000000000000,
|
||||
-2.885776587275580, 0.000000000000000, -0.241073635188767, 0.000000000000000, 3.080489872502403, 0.000000000000000, -2.051244183999421, 0.000000000000000,
|
||||
0.664330486845139, 0.000000000000000, -1.697798999370016, 0.000000000000000, 1.452369423649782, 0.000000000000000, -1.523532831019280, 0.000000000000000,
|
||||
0.171981186587481, 0.000000000000000, -4.685274721583927, 0.000000000000000, -1.336175835319380, 0.000000000000000, 1.419070770428945, 0.000000000000000,
|
||||
-0.035791601713475, 0.000000000000000, 2.291937971632081, 0.000000000000000, -1.962559313450293, 0.000000000000000, -4.831595589339301, 0.000000000000000,
|
||||
-1.857055284000925, 0.000000000000000, 2.606271522635512, 0.000000000000000, -0.576447978738030, 0.000000000000000, 0.082299166967720, 0.000000000000000,
|
||||
1.888399453494614, 0.000000000000000, -3.564705298046079, 0.000000000000000, -0.939357831083889, 0.000000000000000, -1.903578203697778, 0.000000000000000,
|
||||
-2.642492215447250, 0.000000000000000, -0.182990405251017, 0.000000000000000, 3.742026478011174, 0.000000000000000, 0.104295803798333, 0.000000000000000,
|
||||
1.848678195370347, 0.000000000000000, -1.887384346896369, 0.000000000000000, 0.365048973046045, 0.000000000000000, -0.889638010354219, 0.000000000000000,
|
||||
1.173877118428863, 0.000000000000000, -1.178562827540109, 0.000000000000000, 0.610271645685184, 0.000000000000000, 1.831284815697871, 0.000000000000000,
|
||||
0.449575390102283, 0.000000000000000, 1.597171905253443, 0.000000000000000, 3.918574971904773, 0.000000000000000, 0.868104027970404, 0.000000000000000,
|
||||
0.582643134746494, 0.000000000000000, 2.321256382353331, 0.000000000000000, -0.238118642223180, 0.000000000000000, -2.890287868054370, 0.000000000000000,
|
||||
0.970995414625622, 0.000000000000000, 0.666137930891283, 0.000000000000000, -0.202435718709502, 0.000000000000000, 2.057930200518194, 0.000000000000000,
|
||||
3.120583443719949, 0.000000000000000, -0.863945271701041, 0.000000000000000, 0.906848893874630, 0.000000000000000, -1.434124930222570, 0.000000000000000,
|
||||
0.754659384848783, 0.000000000000000, -5.224154442713778, 0.000000000000000, 2.330229744098967, 0.000000000000000, 1.113946320164698, 0.000000000000000,
|
||||
0.523324920322840, 0.000000000000000, 1.750740911548348, 0.000000000000000, -0.899333972913577, 0.000000000000000, 0.228705845203506, 0.000000000000000,
|
||||
-1.934782624767648, 0.000000000000000, -3.508386237231303, 0.000000000000000, -2.107108523073510, 0.000000000000000, 0.380587645474815, 0.000000000000000,
|
||||
-0.476200877183279, 0.000000000000000, -2.172086712642198, 0.000000000000000, 1.795372535780299, 0.000000000000000, -2.100318983391055, 0.000000000000000,
|
||||
-0.022571122461405, 0.000000000000000, 0.674514020010955, 0.000000000000000, -0.148872569390857, 0.000000000000000, 0.298175890592737, 0.000000000000000,
|
||||
-1.134244492493590, 0.000000000000000, -3.146848422289455, 0.000000000000000, -1.357950199087602, 0.000000000000000, 0.667362732020878, 0.000000000000000,
|
||||
-3.119397998316724, 0.000000000000000, -1.189341126297637, 0.000000000000000, -1.532744386856668, 0.000000000000000, -1.672972484202534, 0.000000000000000,
|
||||
-2.042283373871558, 0.000000000000000, -1.479481547595924, 0.000000000000000, -0.002668662875396, 0.000000000000000, 0.262737760129546, 0.000000000000000,
|
||||
2.734456080621830, 0.000000000000000, -0.671945925075102, 0.000000000000000, -3.735078262179111, 0.000000000000000, -0.161705013319883, 0.000000000000000,
|
||||
0.748963512361001, 0.000000000000000, 1.128046374367600, 0.000000000000000, 0.649651335592966, 0.000000000000000, 1.880020215025867, 0.000000000000000,
|
||||
-1.095632293842306, 0.000000000000000, 1.197764876160487, 0.000000000000000, 0.323646656252985, 0.000000000000000, -1.655502751114502, 0.000000000000000,
|
||||
3.666399062961496, 0.000000000000000, -0.334060899735197, 0.000000000000000, -2.119056978738397, 0.000000000000000, 3.721375117275012, 0.000000000000000,
|
||||
0.044874186872307, 0.000000000000000, -2.733053897593234, 0.000000000000000, 1.590700278891042, 0.000000000000000, 3.215711772781902, 0.000000000000000,
|
||||
-1.792085012843801, 0.000000000000000, -0.405797188885475, 0.000000000000000, -0.628080020080892, 0.000000000000000, -1.831815840843960, 0.000000000000000,
|
||||
2.973656862522834, 0.000000000000000, -0.212032655138417, 0.000000000000000, 0.372437389437234, 0.000000000000000, -1.614030579023492, 0.000000000000000,
|
||||
-0.704900996358698, 0.000000000000000, 1.123700273452105, 0.000000000000000, -0.136371848130819, 0.000000000000000, 3.020284357635585, 0.000000000000000,
|
||||
-0.550211350877649, 0.000000000000000, 5.101256236381711, 0.000000000000000, 3.367051512192333, 0.000000000000000, -4.385131946669234, 0.000000000000000,
|
||||
-3.967303337694391, 0.000000000000000, -0.965894936640022, 0.000000000000000, 0.328366945264681, 0.000000000000000, 0.199041562924914, 0.000000000000000,
|
||||
1.067681999025495, 0.000000000000000, -1.939516091697170, 0.000000000000000, -1.092980954328824, 0.000000000000000, 0.273786079368066, 0.000000000000000,
|
||||
-0.040928322190265, 0.000000000000000, -0.118368078577437, 0.000000000000000, 1.766589628899997, 0.000000000000000, 1.738321311635393, 0.000000000000000,
|
||||
-2.895012794321649, 0.000000000000000, 1.213521771395142, 0.000000000000000, 0.922971726633985, 0.000000000000000, 1.091516563636489, 0.000000000000000,
|
||||
3.226378465469620, 0.000000000000000, 1.149169778666974, 0.000000000000000, -1.695986327709386, 0.000000000000000, -0.974803077355813, 0.000000000000000,
|
||||
-4.898035507513607, 0.000000000000000, 1.622719302889447, 0.000000000000000, 0.583891313586579, 0.000000000000000, -1.677182424094957, 0.000000000000000,
|
||||
-1.915633132814685, 0.000000000000000, -1.980150370851616, 0.000000000000000, 0.604538269404190, 0.000000000000000, 0.939862406149365, 0.000000000000000,
|
||||
-1.266939874246416, 0.000000000000000, -1.494771249200063, 0.000000000000000, 0.278042784093988, 0.000000000000000, 0.326627416008916, 0.000000000000000,
|
||||
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-0.023381588315711, 0.000000000000000, 1.719182048679569, 0.000000000000000, 0.839917213252626, 0.000000000000000, 1.006099633839122, 0.000000000000000,
|
||||
0.812462674381527, 0.000000000000000, 1.755814336346739, 0.000000000000000, 2.546848681206319, 0.000000000000000, -1.555300208869455, 0.000000000000000,
|
||||
1.017053811631167, 0.000000000000000, 0.996591039170903, 0.000000000000000, -1.228047247924881, 0.000000000000000, 4.809462271463009, 0.000000000000000,
|
||||
2.318113116151685, 0.000000000000000, -1.206932520679733, 0.000000000000000, 1.273757685623312, 0.000000000000000, 0.724335352481802, 0.000000000000000,
|
||||
1.519876652073198, 0.000000000000000, -2.749670314714158, 0.000000000000000, 3.424042481847581, 0.000000000000000, -3.714668360421517, 0.000000000000000,
|
||||
1.612834197004014, 0.000000000000000, -2.038234723985566, 0.000000000000000, 1.470938786562152, 0.000000000000000, 2.111634918450302, 0.000000000000000,
|
||||
1.030376670151787, 0.000000000000000, -0.420877189003829, 0.000000000000000, -1.502024800532894, 0.000000000000000, 0.452310749163804, 0.000000000000000,
|
||||
-1.606059382300987, 0.000000000000000, -4.006159967834147, 0.000000000000000, -2.152801208196508, 0.000000000000000, 1.671674089372579, 0.000000000000000,
|
||||
1.714536333564101, 0.000000000000000, -1.011518543005344, 0.000000000000000, -0.576410282180584, 0.000000000000000, 0.733689809480836, 0.000000000000000,
|
||||
1.004245602717974, 0.000000000000000, 1.010090391888449, 0.000000000000000, 3.811459513385621, 0.000000000000000, -5.230621089271954, 0.000000000000000,
|
||||
0.678044861034399, 0.000000000000000, 1.255935859598107, 0.000000000000000, 1.674521701615288, 0.000000000000000, -1.656695216761705, 0.000000000000000,
|
||||
1.169286028869693, 0.000000000000000, 0.524915416191998, 0.000000000000000, 2.397642885039520, 0.000000000000000, 2.108711400616072, 0.000000000000000,
|
||||
2.037618211018084, 0.000000000000000, -0.623664553406925, 0.000000000000000, 2.984106170984409, 0.000000000000000, 1.132182737400932, 0.000000000000000,
|
||||
-2.859274340352130, 0.000000000000000, -0.975550071398723, 0.000000000000000, -1.359935119997407, 0.000000000000000, -2.963308211050121, 0.000000000000000,
|
||||
-0.228726662781163, 0.000000000000000, -1.411110379682043, 0.000000000000000, 0.741553355734225, 0.000000000000000, 0.497554254758309, 0.000000000000000,
|
||||
2.371907950598855, 0.000000000000000, 1.063465168988748, 0.000000000000000, -0.641082692081488, 0.000000000000000, -0.855439878540726, 0.000000000000000,
|
||||
0.578321738578726, 0.000000000000000, 3.005809768796194, 0.000000000000000, 1.961458699064065, 0.000000000000000, -3.206261663772745, 0.000000000000000,
|
||||
-0.364431989095434, 0.000000000000000, -0.263182496622273, 0.000000000000000, 1.843464680631139, 0.000000000000000, -0.419107530229249, 0.000000000000000,
|
||||
1.662335873298487, 0.000000000000000, -0.853687563304005, 0.000000000000000, -2.584133404357169, 0.000000000000000, 3.466839568922895, 0.000000000000000,
|
||||
0.881671345091973, 0.000000000000000, 0.454620014206908, 0.000000000000000, -1.737245187402739, 0.000000000000000, 2.162713238369243, 0.000000000000000,
|
||||
-3.868539002714486, 0.000000000000000, 2.014114855933826, 0.000000000000000, -0.703233831811006, 0.000000000000000, -3.410319935997574, 0.000000000000000,
|
||||
-1.851235811006584, 0.000000000000000, 0.909783907894036, 0.000000000000000, 0.091884002136728, 0.000000000000000, -2.688294201131650, 0.000000000000000,
|
||||
-0.906134178460955, 0.000000000000000, 3.475054609035133, 0.000000000000000, -0.573927964170323, 0.000000000000000, -0.429542937515399, 0.000000000000000,
|
||||
0.991348618739939, 0.000000000000000, 1.974804904926325, 0.000000000000000, 0.975783450796698, 0.000000000000000, -3.057119549071503, 0.000000000000000,
|
||||
-3.899429237481194, 0.000000000000000, 0.362439009175350, 0.000000000000000, -1.124461670265618, 0.000000000000000, 1.806000360163583, 0.000000000000000,
|
||||
-2.768333362600288, 0.000000000000000, 0.244387897900379, 0.000000000000000, 0.908767296720926, 0.000000000000000, 1.254669374391882, 0.000000000000000,
|
||||
-1.420441929463686, 0.000000000000000, -0.875658895966293, 0.000000000000000, 0.183824603376167, 0.000000000000000, -3.361653917011686, 0.000000000000000,
|
||||
-0.796615630227952, 0.000000000000000, -1.660226542658673, 0.000000000000000, 1.654439358307226, 0.000000000000000, 2.782812946709771, 0.000000000000000,
|
||||
1.418064412811531, 0.000000000000000, -0.819645647243761, 0.000000000000000, 0.807724772592699, 0.000000000000000, -0.941967976379298, 0.000000000000000,
|
||||
-2.312768306047469, 0.000000000000000, 0.872426936477443, 0.000000000000000, 0.919528961530845, 0.000000000000000, -2.084904575264847, 0.000000000000000,
|
||||
-1.972464868459322, 0.000000000000000, -1.050687203338466, 0.000000000000000, 1.659579707007902, 0.000000000000000, -1.820640014705855, 0.000000000000000,
|
||||
-1.195078061671045, 0.000000000000000, -1.639773173762048, 0.000000000000000, 1.616744338157063, 0.000000000000000, 4.019216096811563, 0.000000000000000,
|
||||
3.461021102549681, 0.000000000000000, 1.642352734361484, 0.000000000000000, -0.046354693720813, 0.000000000000000, -0.041936252359677, 0.000000000000000,
|
||||
-2.393307519480551, 0.000000000000000, -0.341471634615121, 0.000000000000000, -0.392073595257017, 0.000000000000000, -0.219299018372730, 0.000000000000000,
|
||||
-2.016391579662071, 0.000000000000000, -0.653096251969787, 0.000000000000000, 1.466353155666821, 0.000000000000000, -2.872058864320412, 0.000000000000000,
|
||||
-2.157180779503830, 0.000000000000000, 0.723257479841560, 0.000000000000000, 3.769951308104384, 0.000000000000000, -1.923392042420024, 0.000000000000000,
|
||||
0.644899359942840, 0.000000000000000, -2.090226891621437, 0.000000000000000, -0.277043982890403, 0.000000000000000, -0.528271428321112, 0.000000000000000,
|
||||
2.518120645960652, 0.000000000000000, 1.040820431111488, 0.000000000000000, -4.560583754742486, 0.000000000000000, -0.226899614918836, 0.000000000000000,
|
||||
1.713331231108959, 0.000000000000000, -3.293941019163642, 0.000000000000000, -1.113331444648290, 0.000000000000000, -1.032308423149906, 0.000000000000000,
|
||||
1.593774272982443, 0.000000000000000, -1.246840475090529, 0.000000000000000, -0.190344684920137, 0.000000000000000, -1.719386356896355, 0.000000000000000,
|
||||
-2.827721754659679, 0.000000000000000, -0.092438285279020, 0.000000000000000, -0.565844430675246, 0.000000000000000, -1.077916121691716, 0.000000000000000,
|
||||
-1.208665809504693, 0.000000000000000, -2.996014266381254, 0.000000000000000, 2.888573323402423, 0.000000000000000, 2.829507048720695, 0.000000000000000,
|
||||
-0.859177034120755, 0.000000000000000, -1.969302377743254, 0.000000000000000, 0.777437674525362, 0.000000000000000, -0.124910190157646, 0.000000000000000,
|
||||
0.129875493115290, 0.000000000000000, -4.192139262163992, 0.000000000000000, 3.023496047962126, 0.000000000000000, 1.149775163736637, 0.000000000000000,
|
||||
2.038151304801731, 0.000000000000000, 3.016122489841263, 0.000000000000000, -4.829481812137012, 0.000000000000000, -1.668436615909279, 0.000000000000000,
|
||||
0.958586784636918, 0.000000000000000, 1.550652410058678, 0.000000000000000, -1.456305257976716, 0.000000000000000, -0.079588392344731, 0.000000000000000,
|
||||
-2.453213599392345, 0.000000000000000, 0.296795909127105, 0.000000000000000, -0.253426616607643, 0.000000000000000, 1.418937160028195, 0.000000000000000,
|
||||
-1.672949529066915, 0.000000000000000, -1.620990298572947, 0.000000000000000, -1.085103073196045, 0.000000000000000, 0.738606361195386, 0.000000000000000,
|
||||
-2.097831202853255, 0.000000000000000, 2.711952282071310, 0.000000000000000, 1.498539238246888, 0.000000000000000, 1.317457282535915, 0.000000000000000,
|
||||
-0.302765938349717, 0.000000000000000, -0.044623707947201, 0.000000000000000, 2.337405215062395, 0.000000000000000, -3.980689173859100, 0.000000000000000,
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -0,0 +1,167 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.0
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fft_bin_example_f32.c
|
||||
*
|
||||
* Description: Example code demonstrating calculation of Max energy bin of
|
||||
* frequency domain of input signal.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @ingroup groupExamples
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup FrequencyBin Frequency Bin Example
|
||||
*
|
||||
* \par Description
|
||||
* \par
|
||||
* Demonstrates the calculation of the maximum energy bin in the frequency
|
||||
* domain of the input signal with the use of Complex FFT, Complex
|
||||
* Magnitude, and Maximum functions.
|
||||
*
|
||||
* \par Algorithm:
|
||||
* \par
|
||||
* The input test signal contains a 10 kHz signal with uniformly distributed white noise.
|
||||
* Calculating the FFT of the input signal will give us the maximum energy of the
|
||||
* bin corresponding to the input frequency of 10 kHz.
|
||||
*
|
||||
* \par Block Diagram:
|
||||
* \image html FFTBin.gif "Block Diagram"
|
||||
* \par
|
||||
* The figure below shows the time domain signal of 10 kHz signal with
|
||||
* uniformly distributed white noise, and the next figure shows the input
|
||||
* in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.
|
||||
* \par
|
||||
* \image html FFTBinInput.gif "Input signal in Time domain"
|
||||
* \image html FFTBinOutput.gif "Input signal in Frequency domain"
|
||||
*
|
||||
* \par Variables Description:
|
||||
* \par
|
||||
* \li \c testInput_f32_10khz points to the input data
|
||||
* \li \c testOutput points to the output data
|
||||
* \li \c fftSize length of FFT
|
||||
* \li \c ifftFlag flag for the selection of CFFT/CIFFT
|
||||
* \li \c doBitReverse Flag for selection of normal order or bit reversed order
|
||||
* \li \c refIndex reference index value at which maximum energy of bin ocuurs
|
||||
* \li \c testIndex calculated index value at which maximum energy of bin ocuurs
|
||||
*
|
||||
* \par CMSIS DSP Software Library Functions Used:
|
||||
* \par
|
||||
* - arm_cfft_f32()
|
||||
* - arm_cmplx_mag_f32()
|
||||
* - arm_max_f32()
|
||||
*
|
||||
* <b> Refer </b>
|
||||
* \link arm_fft_bin_example_f32.c \endlink
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/** \example arm_fft_bin_example_f32.c
|
||||
*/
|
||||
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_const_structs.h"
|
||||
|
||||
#if defined(SEMIHOSTING)
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
|
||||
#define TEST_LENGTH_SAMPLES 2048
|
||||
|
||||
/* -------------------------------------------------------------------
|
||||
* External Input and Output buffer Declarations for FFT Bin Example
|
||||
* ------------------------------------------------------------------- */
|
||||
extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
|
||||
static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
|
||||
|
||||
/* ------------------------------------------------------------------
|
||||
* Global variables for FFT Bin Example
|
||||
* ------------------------------------------------------------------- */
|
||||
uint32_t fftSize = 1024;
|
||||
uint32_t ifftFlag = 0;
|
||||
uint32_t doBitReverse = 1;
|
||||
arm_cfft_instance_f32 varInstCfftF32;
|
||||
|
||||
/* Reference index at which max energy of bin ocuurs */
|
||||
uint32_t refIndex = 213, testIndex = 0;
|
||||
|
||||
/* ----------------------------------------------------------------------
|
||||
* Max magnitude FFT Bin test
|
||||
* ------------------------------------------------------------------- */
|
||||
|
||||
int32_t main(void)
|
||||
{
|
||||
|
||||
arm_status status;
|
||||
float32_t maxValue;
|
||||
|
||||
status = ARM_MATH_SUCCESS;
|
||||
|
||||
status=arm_cfft_init_f32(&varInstCfftF32,fftSize);
|
||||
|
||||
/* Process the data through the CFFT/CIFFT module */
|
||||
arm_cfft_f32(&varInstCfftF32, testInput_f32_10khz, ifftFlag, doBitReverse);
|
||||
|
||||
/* Process the data through the Complex Magnitude Module for
|
||||
calculating the magnitude at each bin */
|
||||
arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize);
|
||||
|
||||
/* Calculates maxValue and returns corresponding BIN value */
|
||||
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
|
||||
|
||||
status = (testIndex != refIndex) ? ARM_MATH_TEST_FAILURE : ARM_MATH_SUCCESS;
|
||||
|
||||
if (status != ARM_MATH_SUCCESS)
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("FAILURE\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined (SEMIHOSTING)
|
||||
printf("SUCCESS\n");
|
||||
#else
|
||||
while (1); /* main function does not return */
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/** \endlink */
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm0ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm0ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm3ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm3ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm4ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm4ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu0.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu0.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu0.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu0.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu0.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu0.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#
|
||||
cpu1.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
cpu1.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
cpu1.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
cpu1.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
cpu1.MVE=2 # (int , init-time) default = '0x1' : Set whether the model has MVE support. If FPU = 0: 0=MVE not included, 1=Integer subset of MVE included. If FPU = 1: 0=MVE not included, 1=Integer subset of MVE included, 2=Integer and half and single precision floating point MVE included
|
||||
cpu1.SAU=0 # (int , init-time) default = '0x8' : Number of SAU regions (0 => no SAU)
|
||||
cpu1.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included
|
||||
cpu1.INITSVTOR=0 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset
|
||||
cpu1.INITNSVTOR=0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset
|
||||
#------------------------------------------------------------------------------
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
# Parameters:
|
||||
# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max]
|
||||
#------------------------------------------------------------------------------
|
||||
armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
|
||||
armcortexm7ct.cpi_div=1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.cpi_mul=1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction)
|
||||
armcortexm7ct.min_sync_level=3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll)
|
||||
armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support
|
||||
#------------------------------------------------------------------------------
|
||||
10
Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/Abstract.txt
Normal file
10
Drivers/CMSIS/DSP/Examples/ARM/arm_fir_example/Abstract.txt
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
CMSIS DSP_Lib example arm_fir_example.
|
||||
|
||||
The example is available for different targets:
|
||||
Cortex-M0
|
||||
Cortex-M3
|
||||
Cortex-M4 with FPU
|
||||
Cortex-M7 with single precision FPU
|
||||
Cortex-M55 with double precision FPU, Integer + Floating Point MVE
|
||||
|
||||
The example is configured for Models Debugger
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
cmake_minimum_required (VERSION 3.14)
|
||||
project (arm_fir_example VERSION 0.1)
|
||||
|
||||
|
||||
# Needed to include the configBoot module
|
||||
# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
|
||||
set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
|
||||
set(DSP ${ROOT}/CMSIS/DSP)
|
||||
|
||||
# Add DSP folder to module path
|
||||
list(APPEND CMAKE_MODULE_PATH ${DSP})
|
||||
|
||||
###################################
|
||||
#
|
||||
# LIBRARIES
|
||||
#
|
||||
###################################
|
||||
|
||||
###########
|
||||
#
|
||||
# CMSIS DSP
|
||||
#
|
||||
|
||||
add_subdirectory(../../../Source bin_dsp)
|
||||
|
||||
|
||||
###################################
|
||||
#
|
||||
# TEST APPLICATION
|
||||
#
|
||||
###################################
|
||||
|
||||
|
||||
add_executable(arm_fir_example)
|
||||
|
||||
|
||||
include(config)
|
||||
configApp(arm_fir_example ${ROOT})
|
||||
|
||||
target_sources(arm_fir_example PRIVATE arm_fir_data.c math_helper.c arm_fir_example_f32.c)
|
||||
|
||||
### Sources and libs
|
||||
|
||||
target_link_libraries(arm_fir_example PRIVATE CMSISDSP)
|
||||
|
||||
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