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Rename singleton to initialized_singleton

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Use #pragma once instead of guard definitions in every header
This commit is contained in:
Attila Body 2025-06-10 21:57:31 +02:00
parent 61fce5992e
commit 8e9b69b87a
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
17 changed files with 151 additions and 175 deletions
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10
components/f4ll/src/console_handler.cpp
View file

@ -71,19 +71,15 @@ size_t console_handler::append(char const *s)
void console_handler::flush()
{
bool busy;
if (!m_tx_buffer.uncommited()) {
return;
}
m_tx_buffer.commit();
{
irq_lock l;
busy = m_in_flight_size != 0;
}
if (busy) {
if (m_in_flight_size) {
return;
}
uint8_t const *chunk;
m_tx_buffer.get_chunk(m_tx_buffer.size(), chunk, m_in_flight_size);
if (m_in_flight_size) {

1
components/f4ll/src/crc_handler.cpp
View file

@ -4,6 +4,7 @@
* Created on: Oct 26, 2019
* Author: compi
*/
#include <f4ll/crc_handler.h>
namespace f4ll {

180
components/f4ll/src/fault.cpp
View file

@ -6,7 +6,7 @@
* -c "tpiu config internal <logfile_full_path> uart off <cpufreq>"
*/
#include <inttypes.h>
//#include <core_cm4.h>
// #include <core_cm4.h>
#include <f4ll/fault.h>
#include <f4ll/str_util.h>
#include <stm32f4xx.h>
@ -24,39 +24,40 @@ void __attribute__((weak)) app_fault_callback(uint32_t reason)
void swo_send_str(char const *str, uint8_t len, uint8_t port)
{
while(len) {
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && // ITM enabled
((ITM->TER & (1UL << port) ) != 0UL) ) // ITM Port enabled
{
// Wait until shift register is free
while (ITM->PORT[port].u32 == 0UL) {
__ASM volatile ("nop");
}
if(len >= 4) {
ITM->PORT[port].u32 = *(uint32_t*)(str);
str += 4;
len -= 4;
} else if(len >= 2) {
ITM->PORT[port].u16 = *(uint16_t*)(str);
str += 2;
len -= 2;
} else {
ITM->PORT[port].u8 = *(uint8_t*)(str);
++str;
--len;
}
} else
break;
}
while (len) {
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && // ITM enabled
((ITM->TER & (1UL << port)) != 0UL)) // ITM Port enabled
{
// Wait until shift register is free
while (ITM->PORT[port].u32 == 0UL) {
__ASM volatile("nop");
}
if (len >= 4) {
ITM->PORT[port].u32 = *(uint32_t *)(str);
str += 4;
len -= 4;
} else if (len >= 2) {
ITM->PORT[port].u16 = *(uint16_t *)(str);
str += 2;
len -= 2;
} else {
ITM->PORT[port].u8 = *(uint8_t *)(str);
++str;
--len;
}
} else {
break;
}
}
}
void fault_print_str(char const *fmtstr, uint32_t *values)
{
char hex_str[9]={0};
char hex_str[9] = {0};
char const *next_chunk = fmtstr;
while(*fmtstr) {
if(*fmtstr == '%') {
while (*fmtstr) {
if (*fmtstr == '%') {
swo_send_str(next_chunk, fmtstr - next_chunk, 0);
uitohex(hex_str, *values++, 8);
swo_send_str(hex_str, 8, 0);
@ -71,80 +72,71 @@ void fault_print_str(char const *fmtstr, uint32_t *values)
void fault_handler(uint32_t type, fault_context_t *context)
{
uint32_t FSR[9] = {
SCB->HFSR,
0xff & SCB->CFSR,
(0xff00 & SCB->CFSR) >> 8,
(0xffff0000 & SCB->CFSR) >> 16,
SCB->DFSR,
SCB->AFSR,
SCB->SHCSR,
SCB->MMFAR,
SCB->BFAR
};
uint32_t FSR[9] = {
SCB->HFSR, 0xff & SCB->CFSR, (0xff00 & SCB->CFSR) >> 8, (0xffff0000 & SCB->CFSR) >> 16, SCB->DFSR, SCB->AFSR, SCB->SHCSR,
SCB->MMFAR, SCB->BFAR};
while(1) {
fault_print_str("\n++ Fault Handler ++\n\nFaultType: ",NULL);
switch( type ) {
case FAULT_REASON_HARD_FAULT:
fault_print_str("HardFault",NULL);
break;
case FAULT_REASON_MEMMANAGE_FAULT:
fault_print_str("MemManageFault",NULL);
break;
case FAULT_REASON_BUS_FAULT:
fault_print_str("BusFault",NULL);
break;
case FAULT_REASON_USAGE_FAULT:
fault_print_str("UsageFault",NULL);
break;
default:
fault_print_str("Unknown Fault",NULL);
break;
}
while (1) {
fault_print_str("\n++ Fault Handler ++\n\nFaultType: ", NULL);
switch (type) {
case FAULT_REASON_HARD_FAULT:
fault_print_str("HardFault", NULL);
break;
case FAULT_REASON_MEMMANAGE_FAULT:
fault_print_str("MemManageFault", NULL);
break;
case FAULT_REASON_BUS_FAULT:
fault_print_str("BusFault", NULL);
break;
case FAULT_REASON_USAGE_FAULT:
fault_print_str("UsageFault", NULL);
break;
default:
fault_print_str("Unknown Fault", NULL);
break;
}
fault_print_str("\n\nContext:",NULL);
fault_print_str("\n\nContext:", NULL);
fault_print_str(
"\nR0 : %"
"\nR1 : %"
"\nR2 : %"
"\nR3 : %"
"\nR4 : %"
"\nR5 : %"
"\nR6 : %"
"\nR7 : %"
"\nR8 : %"
"\nR9 : %"
"\nR10 : %"
"\nR11 : %"
"\nR12 : %"
"\nSP : %"
"\nLR : %"
"\nPC : %"
"\nxPSR : %"
"\nPSP : %"
"\nMSP : %",
(uint32_t *)context);
fault_print_str(
"\nR0 : %"
"\nR1 : %"
"\nR2 : %"
"\nR3 : %"
"\nR4 : %"
"\nR5 : %"
"\nR6 : %"
"\nR7 : %"
"\nR8 : %"
"\nR9 : %"
"\nR10 : %"
"\nR11 : %"
"\nR12 : %"
"\nSP : %"
"\nLR : %"
"\nPC : %"
"\nxPSR : %"
"\nPSP : %"
"\nMSP : %",
(uint32_t *)context);
//Capture CPUID to get core/cpu info
fault_print_str("\nCPUID: %",(uint32_t *)&SCB->CPUID);
// Capture CPUID to get core/cpu info
fault_print_str("\nCPUID: %", (uint32_t *)&SCB->CPUID);
fault_print_str(
"\nHFSR : %"
"\nMMFSR: %"
"\nBFSR : %"
"\nUFSR : %"
"\nDFSR : %"
"\nAFSR : %"
"\nSHCSR: %",
FSR);
fault_print_str(
"\nHFSR : %"
"\nMMFSR: %"
"\nBFSR : %"
"\nUFSR : %"
"\nDFSR : %"
"\nAFSR : %"
"\nSHCSR: %",
FSR);
app_fault_callback(type);
}
app_fault_callback(type);
}
}
#ifdef __cplusplus
}
#endif

3
components/f4ll/src/packet_usart.cpp
View file

@ -5,7 +5,8 @@
* Author: abody
*/
#include <f4ll/packet_usart.h>
#include <string.h>
#include <cstring>
namespace f4ll {

3
components/f4ll/src/str_util.cpp
View file

@ -1,5 +1,6 @@
#include <f4ll/str_util.h>
#include <stdint.h>
#include <cstdint>
//////////////////////////////////////////////////////////////////////////////
size_t strcpy_ex(char *dst, char const *src)