/*
 * ll_dmahelper.h
 *
 *  Created on: Oct 25, 2019
 *      Author: abody
 */

#pragma once

#include <inttypes.h>
#include <platform/dma_ll.h>

namespace f4ll {

class dma_helper
{
public:
    dma_helper(DMA_TypeDef *dma, uint32_t stream);
    dma_helper(dma_helper const &base) = default;

    inline DMA_TypeDef *get_dma() const { return m_dma; }
    inline uint32_t get_stream() const { return m_stream; }
    inline volatile uint32_t *get_is_reg() const { return m_is_reg; }
    inline volatile uint32_t *get_ifc_reg() const { return m_ifc_reg; }
    inline uint32_t get_fe_mask() const { return m_fe_masks[m_stream]; }
    inline uint32_t get_dme_mask() const { return m_dme_masks[m_stream]; }
    inline uint32_t get_te_mask() const { return m_te_masks[m_stream]; }
    inline uint32_t get_ht_mask() const { return m_ht_masks[m_stream]; }
    inline uint32_t get_tc_mask() const { return m_tc_masks[m_stream]; }

    inline bool is_enabled_it_ht() const { return LL_DMA_IsEnabledIT_HT(m_dma, m_stream) != 0; }
    inline bool is_enabled_it_te() const { return LL_DMA_IsEnabledIT_TE(m_dma, m_stream) != 0; }
    inline bool is_enabled_it_tc() const { return LL_DMA_IsEnabledIT_TC(m_dma, m_stream) != 0; }
    inline bool is_enabled_it_dme() const { return LL_DMA_IsEnabledIT_DME(m_dma, m_stream) != 0; }
    inline bool is_enabled_it_fe() const { return LL_DMA_IsEnabledIT_FE(m_dma, m_stream) != 0; }

    enum class dma_error_type { transfer, direct_mode, fifo };

private:
    DMA_TypeDef *m_dma;
    uint32_t m_stream;
    volatile uint32_t *m_is_reg;
    volatile uint32_t *m_ifc_reg;

    static constexpr uint32_t const m_fe_masks[8] = {DMA_LISR_FEIF0, DMA_LISR_FEIF1, DMA_LISR_FEIF2, DMA_LISR_FEIF3,
                                                     DMA_HISR_FEIF4, DMA_HISR_FEIF5, DMA_HISR_FEIF6, DMA_HISR_FEIF7};
    static constexpr uint32_t const m_dme_masks[8] = {DMA_LISR_DMEIF0, DMA_LISR_DMEIF1, DMA_LISR_DMEIF2, DMA_LISR_DMEIF3,
                                                      DMA_HISR_DMEIF4, DMA_HISR_DMEIF5, DMA_HISR_DMEIF6, DMA_HISR_DMEIF7};
    static constexpr uint32_t const m_te_masks[8] = {DMA_LISR_TEIF0, DMA_LISR_TEIF1, DMA_LISR_TEIF2, DMA_LISR_TEIF3,
                                                     DMA_HISR_TEIF4, DMA_HISR_TEIF5, DMA_HISR_TEIF6, DMA_HISR_TEIF7};
    static constexpr uint32_t const m_ht_masks[8] = {DMA_LISR_HTIF0, DMA_LISR_HTIF1, DMA_LISR_HTIF2, DMA_LISR_HTIF3,
                                                     DMA_HISR_HTIF4, DMA_HISR_HTIF5, DMA_HISR_HTIF6, DMA_HISR_HTIF7};
    static constexpr uint32_t const m_tc_masks[8] = {DMA_LISR_TCIF0, DMA_LISR_TCIF1, DMA_LISR_TCIF2, DMA_LISR_TCIF3,
                                                     DMA_HISR_TCIF4, DMA_HISR_TCIF5, DMA_HISR_TCIF6, DMA_HISR_TCIF7};
};

} /* namespace f4ll */
