(mostly) assembly timings
This commit is contained in:
parent
b59a086a82
commit
61bd8c7632
6 changed files with 275 additions and 186 deletions
74
.cproject
74
.cproject
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@ -1,4 +1,4 @@
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@ -40,18 +40,18 @@
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@ -67,18 +67,18 @@
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@ -187,18 +187,18 @@
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@ -1,8 +1,8 @@
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[PreviousGenFiles]
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HeaderPath=/home/abody/work/private/NeoPixelF103MVP/Inc
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HeaderFiles=gpio.h;stm32f1xx_it.h;stm32_assert.h;stm32f1xx_hal_conf.h;main.h;
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HeaderFiles=gpio.h;stm32f1xx_it.h;stm32_assert.h;stm32f1xx_hal_conf.h;main.h;spi.h;
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SourcePath=/home/abody/work/private/NeoPixelF103MVP/Src
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SourceFiles=gpio.c;stm32f1xx_it.c;main.c;
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SourceFiles=gpio.c;stm32f1xx_it.c;main.c;spi.c;stm32f1xx_hal_msp.c;
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[PreviousLibFiles]
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LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
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28
NeoPixelF103MVP Release.cfg
Normal file
28
NeoPixelF103MVP Release.cfg
Normal file
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# This is an NeoPixelF103MVP board with a single STM32F103C8Tx chip
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#
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# Generated by System Workbench for STM32
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# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)
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source [find interface/stlink.cfg]
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set WORKAREASIZE 0x5000
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transport select "hla_swd"
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set CHIPNAME STM32F103C8Tx
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set BOARDNAME NeoPixelF103MVP
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# Enable debug when in low power modes
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set ENABLE_LOW_POWER 1
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# Stop Watchdog counters when halt
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set STOP_WATCHDOG 1
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# STlink Debug clock frequency
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set CLOCK_FREQ 4000
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# use software system reset
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reset_config none
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set CONNECT_UNDER_RESET 0
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source [find target/stm32f1x.cfg]
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@ -37,7 +37,10 @@ PA13.Mode=Serial_Wire
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PA13.Signal=SYS_JTMS-SWDIO
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PA14.Mode=Serial_Wire
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PA14.Signal=SYS_JTCK-SWCLK
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PB11.GPIOParameters=GPIO_Speed,PinState
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PB11.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
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PB11.Locked=true
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PB11.PinState=GPIO_PIN_RESET
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PB11.Signal=GPIO_Output
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PC13-TAMPER-RTC.Locked=true
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PC13-TAMPER-RTC.Signal=GPIO_Output
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/**/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_11;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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90
Src/main.c
90
Src/main.c
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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asm volatile(
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" movs r3, #1000 \n\t"
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"1: subs r3, #1 \n\t"
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" bne 1b \n\t"
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: : : "r3", "cc"
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);
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asm volatile("\tmovs r3, #1000\n1:\tsubs r3, #1\n\tbne 1b\n\t" : : : "r3", "cc");
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GPIOB->ODR = 0;
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volatile uint32_t v;
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uint8_t ledbytes[] = {0x0f, 0xf0, 0};
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uint8_t ledbytes[] = {0, 0xff, 0, 0xff, 0x55, 0xaa};
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__disable_irq();
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#define W_1f 5
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#define W_0f 0
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#define W_0s 3
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#define W_1af
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#define W_1as ++v; ++v
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#define W_0af ++v; ++v
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#define W_0as ++v; ++v
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/*
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#define SHIFTBIT(x) \
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if(b&(1<<x)) { \
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GPIOB->BSRR = (1 << 11); \
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for( v=W_1f; v != 0; --v); \
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W_1af; \
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GPIOB->BSRR = (1 << (16+11)); \
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W_1as; \
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} else { \
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GPIOB->BSRR = (1 << 11); \
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for( v=W_0f; v != 0; --v); \
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W_0af; \
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GPIOB->BSRR = (1 << (16+11)); \
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for( v=W_0s; v != 0; --v); \
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W_0as; \
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}
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*/
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#define SHIFTBIT(x) \
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if(b&(1<<x)) { \
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GPIOB->BSRR = (1 << 11); \
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asm volatile("\tmov r3, #10\n1:\tsubs r3, #1\n\tbne 1b\n\t" : : : "r3", "cc"); \
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GPIOB->BSRR = (1 << (16+11)); \
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asm volatile("\tmov r3, #03\n1:\tsubs r3, #1\n\tbne 1b\n\t" : : : "r3", "cc"); \
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} else { \
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GPIOB->BSRR = (1 << 11); \
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asm volatile("\tmov r3, #03\n1:\tsubs r3, #1\n\tbne 1b\n\t" : : : "r3", "cc"); \
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GPIOB->BSRR = (1 << (16+11)); \
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asm volatile("\tmov r3, #10\n1:\tsubs r3, #1\n\tbne 1b\n\t" : : : "r3", "cc"); \
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}
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__disable_irq();
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while(1)
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{
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uint32_t *bitPtr = BITBAND_RAM(ledbytes, 0);
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uint32_t cnt = sizeof(ledbytes)*8 + 1;
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uint8_t *bufPtr = ledbytes;
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uint32_t cnt = sizeof(ledbytes) + 1;
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while(--cnt) {
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uint32_t b = *bufPtr++;
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SHIFTBIT(7);
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SHIFTBIT(6);
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SHIFTBIT(5);
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SHIFTBIT(4);
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SHIFTBIT(3);
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SHIFTBIT(2);
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SHIFTBIT(1);
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if(*bitPtr++) {
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GPIOB->BSRR = 1 << 11; //set
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for( v=5; v != 0; --v); //long
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GPIOB->BSRR = 1 << (16+11); //clear
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++v; ++v; //short
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if(b&1) {
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GPIOB->BSRR = 1 << 11;
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for( v=W_1f; v != 0; --v);
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W_1af;
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GPIOB->BSRR = 1 << (16+11);
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W_1as;
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} else {
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GPIOB->BSRR = 1 << 11; //set
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for( v=0; v != 0; --v); //short
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++v;++v;
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GPIOB->BSRR = 1 << (16+11); //clear
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for( v=3; v != 0; --v); //long
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++v; ++v;
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GPIOB->BSRR = 1 << 11;
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for( v=W_0f; v != 0; --v);
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W_0af;
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GPIOB->BSRR = 1 << (16+11);
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for( v=W_0s; v != 0; --v);
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++v; v=0;
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}
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}
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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for( v=400; v != 0; --v); //long
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for( v=100; v != 0; --v); //long
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}
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/* USER CODE END 3 */
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}
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}
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static void LL_Init(void)
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{
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