(mostly) assembly timings
This commit is contained in:
parent
b59a086a82
commit
61bd8c7632
6 changed files with 275 additions and 186 deletions
28
NeoPixelF103MVP Release.cfg
Normal file
28
NeoPixelF103MVP Release.cfg
Normal file
|
@ -0,0 +1,28 @@
|
|||
# This is an NeoPixelF103MVP board with a single STM32F103C8Tx chip
|
||||
#
|
||||
# Generated by System Workbench for STM32
|
||||
# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)
|
||||
|
||||
source [find interface/stlink.cfg]
|
||||
|
||||
set WORKAREASIZE 0x5000
|
||||
|
||||
transport select "hla_swd"
|
||||
|
||||
set CHIPNAME STM32F103C8Tx
|
||||
set BOARDNAME NeoPixelF103MVP
|
||||
|
||||
# Enable debug when in low power modes
|
||||
set ENABLE_LOW_POWER 1
|
||||
|
||||
# Stop Watchdog counters when halt
|
||||
set STOP_WATCHDOG 1
|
||||
|
||||
# STlink Debug clock frequency
|
||||
set CLOCK_FREQ 4000
|
||||
|
||||
# use software system reset
|
||||
reset_config none
|
||||
set CONNECT_UNDER_RESET 0
|
||||
|
||||
source [find target/stm32f1x.cfg]
|
Loading…
Add table
Add a link
Reference in a new issue