commit 7a74273ca76223e000604d7398c4725eeb2a98d7
Author: Attila BODY <attila.body@gmail.com>
Date:   Sun Sep 29 15:07:46 2019 +0200

    initial commit

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..d34cfdd
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,5 @@
+_[Bb][Uu][Ii][Ll][Dd]*/
+/[Bb][Uu][Ii][Ll][Dd]/
+[Dd]ebug/
+[Rr]elease/
+*.[Bb][Aa][Kk]
diff --git a/.vscode/tasks.json b/.vscode/tasks.json
new file mode 100644
index 0000000..2bff5b2
--- /dev/null
+++ b/.vscode/tasks.json
@@ -0,0 +1,30 @@
+{
+    // See https://go.microsoft.com/fwlink/?LinkId=733558
+    // for the documentation about the tasks.json format
+    "version": "2.0.0",
+
+    "command": "make",
+    "showOutput": "always",
+    
+    "tasks": [
+        {
+            "taskName": "build",
+            "type": "shell",
+            "args": [
+                "all",
+                "-j8"
+            ],
+            "problemMatcher": [
+                "$gcc"
+            ]
+        },
+        {
+            "taskName": "clean",
+            "type": "shell",
+            "args": [
+                "clean"
+            ],
+            "problemMatcher": []
+        }
+    ]
+}
\ No newline at end of file
diff --git a/f407zgt6_hs_uart.ioc b/f407zgt6_hs_uart.ioc
new file mode 100644
index 0000000..6a6ab21
--- /dev/null
+++ b/f407zgt6_hs_uart.ioc
@@ -0,0 +1,343 @@
+#MicroXplorer Configuration settings - do not modify
+Dma.Request0=USART1_RX
+Dma.Request1=USART1_TX
+Dma.Request10=UART4_RX
+Dma.Request11=UART4_TX
+Dma.Request2=USART6_RX
+Dma.Request3=USART6_TX
+Dma.Request4=USART3_RX
+Dma.Request5=USART3_TX
+Dma.Request6=USART2_RX
+Dma.Request7=USART2_TX
+Dma.Request8=UART5_RX
+Dma.Request9=UART5_TX
+Dma.RequestsNb=12
+Dma.UART4_RX.10.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UART4_RX.10.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART4_RX.10.Instance=DMA1_Stream2
+Dma.UART4_RX.10.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART4_RX.10.MemInc=DMA_MINC_ENABLE
+Dma.UART4_RX.10.Mode=DMA_NORMAL
+Dma.UART4_RX.10.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART4_RX.10.PeriphInc=DMA_PINC_DISABLE
+Dma.UART4_RX.10.Priority=DMA_PRIORITY_LOW
+Dma.UART4_RX.10.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART4_TX.11.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UART4_TX.11.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART4_TX.11.Instance=DMA1_Stream4
+Dma.UART4_TX.11.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART4_TX.11.MemInc=DMA_MINC_ENABLE
+Dma.UART4_TX.11.Mode=DMA_NORMAL
+Dma.UART4_TX.11.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART4_TX.11.PeriphInc=DMA_PINC_DISABLE
+Dma.UART4_TX.11.Priority=DMA_PRIORITY_LOW
+Dma.UART4_TX.11.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_RX.8.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UART5_RX.8.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_RX.8.Instance=DMA1_Stream0
+Dma.UART5_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_RX.8.MemInc=DMA_MINC_ENABLE
+Dma.UART5_RX.8.Mode=DMA_NORMAL
+Dma.UART5_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_RX.8.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_RX.8.Priority=DMA_PRIORITY_MEDIUM
+Dma.UART5_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_TX.9.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UART5_TX.9.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_TX.9.Instance=DMA1_Stream7
+Dma.UART5_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_TX.9.MemInc=DMA_MINC_ENABLE
+Dma.UART5_TX.9.Mode=DMA_NORMAL
+Dma.UART5_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_TX.9.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_TX.9.Priority=DMA_PRIORITY_MEDIUM
+Dma.UART5_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART1_RX.0.Instance=DMA2_Stream2
+Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE
+Dma.USART1_RX.0.Mode=DMA_NORMAL
+Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_RX.0.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART1_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART1_TX.1.Instance=DMA2_Stream7
+Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE
+Dma.USART1_TX.1.Mode=DMA_NORMAL
+Dma.USART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_TX.1.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART2_RX.6.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART2_RX.6.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART2_RX.6.Instance=DMA1_Stream5
+Dma.USART2_RX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_RX.6.MemInc=DMA_MINC_ENABLE
+Dma.USART2_RX.6.Mode=DMA_NORMAL
+Dma.USART2_RX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_RX.6.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_RX.6.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART2_RX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART2_TX.7.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART2_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART2_TX.7.Instance=DMA1_Stream6
+Dma.USART2_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_TX.7.MemInc=DMA_MINC_ENABLE
+Dma.USART2_TX.7.Mode=DMA_NORMAL
+Dma.USART2_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_TX.7.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_TX.7.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART2_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART3_RX.4.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART3_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART3_RX.4.Instance=DMA1_Stream1
+Dma.USART3_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART3_RX.4.MemInc=DMA_MINC_ENABLE
+Dma.USART3_RX.4.Mode=DMA_NORMAL
+Dma.USART3_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART3_RX.4.PeriphInc=DMA_PINC_DISABLE
+Dma.USART3_RX.4.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART3_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART3_TX.5.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART3_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART3_TX.5.Instance=DMA1_Stream3
+Dma.USART3_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART3_TX.5.MemInc=DMA_MINC_ENABLE
+Dma.USART3_TX.5.Mode=DMA_NORMAL
+Dma.USART3_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART3_TX.5.PeriphInc=DMA_PINC_DISABLE
+Dma.USART3_TX.5.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART3_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART6_RX.2.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART6_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART6_RX.2.Instance=DMA2_Stream1
+Dma.USART6_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART6_RX.2.MemInc=DMA_MINC_ENABLE
+Dma.USART6_RX.2.Mode=DMA_NORMAL
+Dma.USART6_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART6_RX.2.PeriphInc=DMA_PINC_DISABLE
+Dma.USART6_RX.2.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART6_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.USART6_TX.3.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART6_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART6_TX.3.Instance=DMA2_Stream6
+Dma.USART6_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART6_TX.3.MemInc=DMA_MINC_ENABLE
+Dma.USART6_TX.3.Mode=DMA_NORMAL
+Dma.USART6_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART6_TX.3.PeriphInc=DMA_PINC_DISABLE
+Dma.USART6_TX.3.Priority=DMA_PRIORITY_MEDIUM
+Dma.USART6_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+File.Version=6
+KeepUserPlacement=false
+Mcu.Family=STM32F4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP10=USART6
+Mcu.IP2=RCC
+Mcu.IP3=SPI1
+Mcu.IP4=SYS
+Mcu.IP5=UART4
+Mcu.IP6=UART5
+Mcu.IP7=USART1
+Mcu.IP8=USART2
+Mcu.IP9=USART3
+Mcu.IPNb=11
+Mcu.Name=STM32F407Z(E-G)Tx
+Mcu.Package=LQFP144
+Mcu.Pin0=PC14-OSC32_IN
+Mcu.Pin1=PC15-OSC32_OUT
+Mcu.Pin10=PA7
+Mcu.Pin11=PB10
+Mcu.Pin12=PB11
+Mcu.Pin13=PB14
+Mcu.Pin14=PC6
+Mcu.Pin15=PC7
+Mcu.Pin16=PA9
+Mcu.Pin17=PA10
+Mcu.Pin18=PC12
+Mcu.Pin19=PD2
+Mcu.Pin2=PH0-OSC_IN
+Mcu.Pin20=VP_SYS_VS_Systick
+Mcu.Pin3=PH1-OSC_OUT
+Mcu.Pin4=PA0-WKUP
+Mcu.Pin5=PA1
+Mcu.Pin6=PA2
+Mcu.Pin7=PA3
+Mcu.Pin8=PA5
+Mcu.Pin9=PA6
+Mcu.PinsNb=21
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32F407ZGTx
+MxCube.Version=5.3.0
+MxDb.Version=DB.5.0.30
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream3_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream4_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA1_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DMA2_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.UART4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.UART5_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART3_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.USART6_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+PA0-WKUP.Mode=Asynchronous
+PA0-WKUP.Signal=UART4_TX
+PA1.Mode=Asynchronous
+PA1.Signal=UART4_RX
+PA10.Mode=Asynchronous
+PA10.Signal=USART1_RX
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PA5.Mode=Full_Duplex_Master
+PA5.Signal=SPI1_SCK
+PA6.Mode=Full_Duplex_Master
+PA6.Signal=SPI1_MISO
+PA7.Mode=Full_Duplex_Master
+PA7.Signal=SPI1_MOSI
+PA9.Mode=Asynchronous
+PA9.Signal=USART1_TX
+PB10.Mode=Asynchronous
+PB10.Signal=USART3_TX
+PB11.Mode=Asynchronous
+PB11.Signal=USART3_RX
+PB14.GPIOParameters=GPIO_Label
+PB14.GPIO_Label=F_CS
+PB14.Locked=true
+PB14.Signal=GPIO_Output
+PC12.Mode=Asynchronous
+PC12.Signal=UART5_TX
+PC14-OSC32_IN.Mode=LSE-External-Oscillator
+PC14-OSC32_IN.Signal=RCC_OSC32_IN
+PC15-OSC32_OUT.Mode=LSE-External-Oscillator
+PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
+PC6.Mode=Asynchronous
+PC6.Signal=USART6_TX
+PC7.Mode=Asynchronous
+PC7.Signal=USART6_RX
+PCC.Checker=false
+PCC.Line=STM32F407/417
+PCC.MCU=STM32F407Z(E-G)Tx
+PCC.PartNumber=STM32F407ZGTx
+PCC.Seq0=0
+PCC.Series=STM32F4
+PCC.Temperature=25
+PCC.Vdd=3.3
+PD2.Mode=Asynchronous
+PD2.Signal=UART5_RX
+PH0-OSC_IN.Mode=HSE-External-Oscillator
+PH0-OSC_IN.Signal=RCC_OSC_IN
+PH1-OSC_OUT.Mode=HSE-External-Oscillator
+PH1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=true
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=true
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32F407ZGTx
+ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.24.1
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=1
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=STM32CubeIDE
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=f407zgt6_hs_uart.ioc
+ProjectManager.ProjectName=f407zgt6_hs_uart
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=Makefile
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-MX_DMA_Init-DMA-false-LL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_SPI1_Init-SPI1-false-LL-true,5-MX_UART4_Init-UART4-false-LL-true,6-MX_UART5_Init-UART5-false-LL-true,7-MX_USART1_UART_Init-USART1-false-LL-true,8-MX_USART2_UART_Init-USART2-false-LL-true,9-MX_USART3_UART_Init-USART3-false-LL-true,10-MX_USART6_UART_Init-USART6-false-LL-true
+RCC.48MHZClocksFreq_Value=84000000
+RCC.AHBFreq_Value=168000000
+RCC.APB1CLKDivider=RCC_HCLK_DIV4
+RCC.APB1Freq_Value=42000000
+RCC.APB1TimFreq_Value=84000000
+RCC.APB2CLKDivider=RCC_HCLK_DIV2
+RCC.APB2Freq_Value=84000000
+RCC.APB2TimFreq_Value=168000000
+RCC.CortexFreq_Value=168000000
+RCC.EthernetFreq_Value=168000000
+RCC.FCLKCortexFreq_Value=168000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=168000000
+RCC.HSE_VALUE=8000000
+RCC.HSI_VALUE=16000000
+RCC.I2SClocksFreq_Value=192000000
+RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
+RCC.LSI_VALUE=32000
+RCC.MCO2PinFreq_Value=168000000
+RCC.PLLCLKFreq_Value=168000000
+RCC.PLLM=4
+RCC.PLLN=168
+RCC.PLLQCLKFreq_Value=84000000
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.RTCFreq_Value=32000
+RCC.RTCHSEDivFreq_Value=4000000
+RCC.SYSCLKFreq_VALUE=168000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.VCOI2SOutputFreq_Value=384000000
+RCC.VCOInputFreq_Value=2000000
+RCC.VCOOutputFreq_Value=336000000
+RCC.VcooutputI2S=192000000
+SPI1.CalculateBaudRate=42.0 MBits/s
+SPI1.Direction=SPI_DIRECTION_2LINES
+SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
+SPI1.Mode=SPI_MODE_MASTER
+SPI1.VirtualType=VM_MASTER
+UART4.IPParameters=VirtualMode
+UART4.VirtualMode=Asynchronous
+UART5.BaudRate=5250000
+UART5.IPParameters=VirtualMode,OverSampling,BaudRate
+UART5.OverSampling=UART_OVERSAMPLING_8
+UART5.VirtualMode=Asynchronous
+USART1.BaudRate=5250000
+USART1.IPParameters=VirtualMode,BaudRate
+USART1.VirtualMode=VM_ASYNC
+USART2.IPParameters=VirtualMode,OverSampling
+USART2.OverSampling=UART_OVERSAMPLING_8
+USART2.VirtualMode=VM_ASYNC
+USART3.BaudRate=5250000
+USART3.IPParameters=VirtualMode,OverSampling,BaudRate
+USART3.OverSampling=UART_OVERSAMPLING_8
+USART3.VirtualMode=VM_ASYNC
+USART6.BaudRate=5250000
+USART6.IPParameters=VirtualMode,BaudRate
+USART6.VirtualMode=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom