484 lines
16 KiB
C
484 lines
16 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file usart.c
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* @brief This file provides code for the configuration
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* of the USART instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "usart.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* UART4 init function */
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void MX_UART4_Init(void)
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{
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/* USER CODE BEGIN UART4_Init 0 */
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/* USER CODE END UART4_Init 0 */
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LL_USART_InitTypeDef USART_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART4);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/**UART4 GPIO Configuration
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PA0-WKUP ------> UART4_TX
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PA1 ------> UART4_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_0|LL_GPIO_PIN_1;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* UART4 DMA Init */
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/* UART4_RX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_2, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_2, LL_DMA_PRIORITY_LOW);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_2, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_2, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_2, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_2, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_2, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_2);
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/* UART4_TX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_4, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_4, LL_DMA_PRIORITY_LOW);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_4, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_4, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_4, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_4, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_4, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_4);
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/* UART4 interrupt Init */
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NVIC_SetPriority(UART4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
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NVIC_EnableIRQ(UART4_IRQn);
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/* USER CODE BEGIN UART4_Init 1 */
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/* USER CODE END UART4_Init 1 */
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USART_InitStruct.BaudRate = 115200;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
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LL_USART_Init(UART4, &USART_InitStruct);
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LL_USART_ConfigAsyncMode(UART4);
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LL_USART_Enable(UART4);
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/* USER CODE BEGIN UART4_Init 2 */
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/* USER CODE END UART4_Init 2 */
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}
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/* USART1 init function */
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void MX_USART1_UART_Init(void)
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{
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/* USER CODE BEGIN USART1_Init 0 */
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/* USER CODE END USART1_Init 0 */
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LL_USART_InitTypeDef USART_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/**USART1 GPIO Configuration
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PA9 ------> USART1_TX
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PA10 ------> USART1_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_9|LL_GPIO_PIN_10;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USART1 DMA Init */
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/* USART1_RX Init */
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LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_2, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_2, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA2, LL_DMA_STREAM_2, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_2, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_2, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_2, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_2, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_2);
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/* USART1_TX Init */
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LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
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/* USART1 interrupt Init */
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NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
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NVIC_EnableIRQ(USART1_IRQn);
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/* USER CODE BEGIN USART1_Init 1 */
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/* USER CODE END USART1_Init 1 */
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USART_InitStruct.BaudRate = 5250000;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
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LL_USART_Init(USART1, &USART_InitStruct);
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LL_USART_ConfigAsyncMode(USART1);
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LL_USART_Enable(USART1);
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/* USER CODE BEGIN USART1_Init 2 */
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/* USER CODE END USART1_Init 2 */
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}
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/* USART2 init function */
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void MX_USART2_UART_Init(void)
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{
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/* USER CODE BEGIN USART2_Init 0 */
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/* USER CODE END USART2_Init 0 */
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LL_USART_InitTypeDef USART_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/**USART2 GPIO Configuration
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PA2 ------> USART2_TX
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PA3 ------> USART2_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_2|LL_GPIO_PIN_3;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USART2 DMA Init */
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/* USART2_RX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_5, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_5, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_5, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_5, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_5, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_5, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_5, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_5);
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/* USART2_TX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_6, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_6, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_6, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_6, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_6, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_6, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_6, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_6, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_6);
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/* USART2 interrupt Init */
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NVIC_SetPriority(USART2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
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NVIC_EnableIRQ(USART2_IRQn);
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/* USER CODE BEGIN USART2_Init 1 */
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/* USER CODE END USART2_Init 1 */
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USART_InitStruct.BaudRate = 5250000;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_8;
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LL_USART_Init(USART2, &USART_InitStruct);
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LL_USART_ConfigAsyncMode(USART2);
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LL_USART_Enable(USART2);
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/* USER CODE BEGIN USART2_Init 2 */
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/* USER CODE END USART2_Init 2 */
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}
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/* USART3 init function */
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void MX_USART3_UART_Init(void)
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{
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/* USER CODE BEGIN USART3_Init 0 */
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/* USER CODE END USART3_Init 0 */
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LL_USART_InitTypeDef USART_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
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/**USART3 GPIO Configuration
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PB10 ------> USART3_TX
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PB11 ------> USART3_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_10|LL_GPIO_PIN_11;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* USART3 DMA Init */
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/* USART3_RX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_1, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_1, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_1, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_1, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_1, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_1, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_1, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_1);
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/* USART3_TX Init */
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LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_3, LL_DMA_CHANNEL_4);
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LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_STREAM_3, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetStreamPriorityLevel(DMA1, LL_DMA_STREAM_3, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA1, LL_DMA_STREAM_3, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_STREAM_3, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_STREAM_3, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA1, LL_DMA_STREAM_3, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA1, LL_DMA_STREAM_3, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA1, LL_DMA_STREAM_3);
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/* USART3 interrupt Init */
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NVIC_SetPriority(USART3_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
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NVIC_EnableIRQ(USART3_IRQn);
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/* USER CODE BEGIN USART3_Init 1 */
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/* USER CODE END USART3_Init 1 */
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USART_InitStruct.BaudRate = 5250000;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_8;
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LL_USART_Init(USART3, &USART_InitStruct);
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LL_USART_ConfigAsyncMode(USART3);
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LL_USART_Enable(USART3);
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/* USER CODE BEGIN USART3_Init 2 */
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/* USER CODE END USART3_Init 2 */
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}
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/* USART6 init function */
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void MX_USART6_UART_Init(void)
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{
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/* USER CODE BEGIN USART6_Init 0 */
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/* USER CODE END USART6_Init 0 */
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LL_USART_InitTypeDef USART_InitStruct = {0};
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART6);
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
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/**USART6 GPIO Configuration
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PC6 ------> USART6_TX
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PC7 ------> USART6_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
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LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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/* USART6 DMA Init */
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/* USART6_RX Init */
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LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_1, LL_DMA_CHANNEL_5);
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LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_1, LL_DMA_PRIORITY_MEDIUM);
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LL_DMA_SetMode(DMA2, LL_DMA_STREAM_1, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_1, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_1, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_1, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_1, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_1);
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/* USART6_TX Init */
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LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_6, LL_DMA_CHANNEL_5);
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LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_6, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_6, LL_DMA_PRIORITY_MEDIUM);
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|
LL_DMA_SetMode(DMA2, LL_DMA_STREAM_6, LL_DMA_MODE_NORMAL);
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_6, LL_DMA_PERIPH_NOINCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_6, LL_DMA_MEMORY_INCREMENT);
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|
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_6, LL_DMA_PDATAALIGN_BYTE);
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|
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_6, LL_DMA_MDATAALIGN_BYTE);
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|
|
|
LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_6);
|
|
|
|
/* USART6 interrupt Init */
|
|
NVIC_SetPriority(USART6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
|
|
NVIC_EnableIRQ(USART6_IRQn);
|
|
|
|
/* USER CODE BEGIN USART6_Init 1 */
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|
|
|
/* USER CODE END USART6_Init 1 */
|
|
USART_InitStruct.BaudRate = 5250000;
|
|
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
|
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
|
|
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
|
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
|
|
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
|
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
|
LL_USART_Init(USART6, &USART_InitStruct);
|
|
LL_USART_ConfigAsyncMode(USART6);
|
|
LL_USART_Enable(USART6);
|
|
/* USER CODE BEGIN USART6_Init 2 */
|
|
|
|
/* USER CODE END USART6_Init 2 */
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|
|
|
}
|
|
|
|
/* USER CODE BEGIN 1 */
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|
|
|
/* USER CODE END 1 */
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