Fixed DMA config issues for CRC && MemCpy
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parent
5e44fa81ac
commit
bca15a3298
7 changed files with 54 additions and 29 deletions
36
Src/dma.c
36
Src/dma.c
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@ -61,16 +61,25 @@ void MX_DMA_Init(void)
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LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_PERIPH_INCREMENT);
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/* Set memory increment mode */
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_MEMORY_INCREMENT);
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_MEMORY_NOINCREMENT);
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/* Set peripheral data width */
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_4, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_4, LL_DMA_PDATAALIGN_WORD);
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/* Set memory data width */
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_4, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_4, LL_DMA_MDATAALIGN_WORD);
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/* Disable FIFO mode */
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_4);
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/* Enable FIFO mode */
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LL_DMA_EnableFifoMode(DMA2, LL_DMA_STREAM_4);
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/* Set FIFO threshold */
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LL_DMA_SetFIFOThreshold(DMA2, LL_DMA_STREAM_4, LL_DMA_FIFOTHRESHOLD_FULL);
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/* Set memory burst size */
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LL_DMA_SetMemoryBurstxfer(DMA2, LL_DMA_STREAM_4, LL_DMA_MBURST_SINGLE);
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/* Set peripheral burst size */
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LL_DMA_SetPeriphBurstxfer(DMA2, LL_DMA_STREAM_4, LL_DMA_PBURST_SINGLE);
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/* Configure DMA request MEMTOMEM_DMA2_Stream3 */
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@ -93,13 +102,22 @@ void MX_DMA_Init(void)
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LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_3, LL_DMA_MEMORY_INCREMENT);
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/* Set peripheral data width */
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_3, LL_DMA_PDATAALIGN_BYTE);
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LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_3, LL_DMA_PDATAALIGN_WORD);
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/* Set memory data width */
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_3, LL_DMA_MDATAALIGN_BYTE);
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LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_3, LL_DMA_MDATAALIGN_WORD);
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/* Disable FIFO mode */
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LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_3);
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/* Enable FIFO mode */
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LL_DMA_EnableFifoMode(DMA2, LL_DMA_STREAM_3);
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/* Set FIFO threshold */
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LL_DMA_SetFIFOThreshold(DMA2, LL_DMA_STREAM_3, LL_DMA_FIFOTHRESHOLD_FULL);
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/* Set memory burst size */
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LL_DMA_SetMemoryBurstxfer(DMA2, LL_DMA_STREAM_3, LL_DMA_MBURST_SINGLE);
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/* Set peripheral burst size */
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LL_DMA_SetPeriphBurstxfer(DMA2, LL_DMA_STREAM_3, LL_DMA_PBURST_SINGLE);
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/* DMA interrupt init */
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/* DMA1_Stream1_IRQn interrupt configuration */
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