playground-stm32/f407ve_packetusart_c
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Fixed DMA config issues for CRC && MemCpy

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This commit is contained in:
Attila Body 2019-11-21 11:25:25 +01:00
parent 5e44fa81ac
commit bca15a3298
7 changed files with 54 additions and 29 deletions
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36
Src/dma.c
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@ -61,16 +61,25 @@ void MX_DMA_Init(void)
LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_PERIPH_INCREMENT);
/* Set memory increment mode */
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_4, LL_DMA_MEMORY_NOINCREMENT);
/* Set peripheral data width */
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_4, LL_DMA_PDATAALIGN_BYTE);
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_4, LL_DMA_PDATAALIGN_WORD);
/* Set memory data width */
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_4, LL_DMA_MDATAALIGN_BYTE);
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_4, LL_DMA_MDATAALIGN_WORD);
/* Disable FIFO mode */
LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_4);
/* Enable FIFO mode */
LL_DMA_EnableFifoMode(DMA2, LL_DMA_STREAM_4);
/* Set FIFO threshold */
LL_DMA_SetFIFOThreshold(DMA2, LL_DMA_STREAM_4, LL_DMA_FIFOTHRESHOLD_FULL);
/* Set memory burst size */
LL_DMA_SetMemoryBurstxfer(DMA2, LL_DMA_STREAM_4, LL_DMA_MBURST_SINGLE);
/* Set peripheral burst size */
LL_DMA_SetPeriphBurstxfer(DMA2, LL_DMA_STREAM_4, LL_DMA_PBURST_SINGLE);
/* Configure DMA request MEMTOMEM_DMA2_Stream3 */
@ -93,13 +102,22 @@ void MX_DMA_Init(void)
LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_3, LL_DMA_MEMORY_INCREMENT);
/* Set peripheral data width */
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_3, LL_DMA_PDATAALIGN_BYTE);
LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_3, LL_DMA_PDATAALIGN_WORD);
/* Set memory data width */
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_3, LL_DMA_MDATAALIGN_BYTE);
LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_3, LL_DMA_MDATAALIGN_WORD);
/* Disable FIFO mode */
LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_3);
/* Enable FIFO mode */
LL_DMA_EnableFifoMode(DMA2, LL_DMA_STREAM_3);
/* Set FIFO threshold */
LL_DMA_SetFIFOThreshold(DMA2, LL_DMA_STREAM_3, LL_DMA_FIFOTHRESHOLD_FULL);
/* Set memory burst size */
LL_DMA_SetMemoryBurstxfer(DMA2, LL_DMA_STREAM_3, LL_DMA_MBURST_SINGLE);
/* Set peripheral burst size */
LL_DMA_SetPeriphBurstxfer(DMA2, LL_DMA_STREAM_3, LL_DMA_PBURST_SINGLE);
/* DMA interrupt init */
/* DMA1_Stream1_IRQn interrupt configuration */

3
Src/main.c
View file

@ -27,6 +27,7 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "application.h"
/* USER CODE END Includes */
@ -98,7 +99,7 @@ int main(void)
MX_USART6_UART_Init();
MX_CRC_Init();
/* USER CODE BEGIN 2 */
MainLoop();
/* USER CODE END 2 */
/* Infinite loop */