git subrepo pull components/f4ll_c
subrepo: subdir: "components/f4ll_c" merged: "5d26fdc" upstream: origin: "git@git.pcmuhely.hu:compi/f4ll_c.git" branch: "master" commit: "5d26fdc" git-subrepo: version: "0.4.0" origin: "https://github.com/ingydotnet/git-subrepo" commit: "5d6aba9"
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357b30b344
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10 changed files with 243 additions and 189 deletions
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@ -15,6 +15,10 @@
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#include "f4ll_c/dmahelper.h"
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#include "f4ll_c/crcscheduler.h"
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#ifndef MOCKABLE
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#define MOCKABLE(x) x
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#endif
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#ifndef DIAG_RX_BUFFER_SWITCH
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# define DIAG_RX_BUFFER_SWITCH(x)
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#endif
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@ -32,7 +36,51 @@ static inline uint32_t RoundUpTo4(uint32_t inp)
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return (inp + 3) & 0xfffc;
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}
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void Pku_Init(
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#ifndef USART_STATS_DISABLED
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static inline void StatsIncOverrun(struct usart_stats *s) {
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++s->overrun;
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}
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static inline void StatsIncHdrError(struct usart_stats *s, uint32_t hdr) {
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++s->hdrError;
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s->lastErrHdr = hdr;
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}
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static inline void StatsIncPayloadError(struct usart_stats *s, uint32_t pep1, uint32_t pep2) {
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++s->payloadErrror;
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s->pep1 = pep1;
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s->pep2 = pep2;
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}
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static inline void StatsIncDmaError(struct usart_stats *s) {
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++s->dmaError;
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}
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static inline void StatsIncRcvd(struct usart_stats *s) {
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++s->rcvd;
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}
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static inline void StatsIncPremature_hdr(struct usart_stats *s) {
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++s->premature_hdr;
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}
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static inline void StatsIncPremature_payload(struct usart_stats *s) {
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++s->premature_payload;
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}
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static inline void StatsIncSent(struct usart_stats *s) {
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++s->sent;
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}
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static inline void StatsAddSkiped(struct usart_stats *s, uint8_t cnt) {
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s->skiped += s->rcvd > 2 ? cnt : 0;
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}
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#else // USART_STATS_DISABLED
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#define StatsIncOverrun(x)
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#define StatsIncHdrError(x,y)
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#define StatsIncPayloadError(x,y,z)
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#define StatsIncDmaError(x)
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#define StatsIncRcvd(x)
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#define StatsIncPremature_hdr(x)
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#define StatsIncPremature_payload(x)
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#define StatsIncSent(x)
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#define StatsAddSkiped(x)
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#endif // USART_STATS_DISABLED
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void MOCKABLE(Pu_Init)(
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struct usartstatus_t *st, USART_TypeDef *usart, DMA_TypeDef *dma,
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uint32_t stream_rx, uint32_t stream_tx,
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struct crcstatus_t *crcStatus,
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@ -49,17 +97,17 @@ void Pku_Init(
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st->txBuffer.busy = 0;
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st->txBuffer.error = 0;
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st->txBuffer.requestedLength = 0;
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st->txBuffer.usartStatus = st;
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st->rxBuffers[0].busy = 0;
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st->rxBuffers[1].busy = 0;
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st->rxBuffers[0].error = 0;
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st->rxBuffers[1].error = 0;
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st->rxBuffers[0].requestedLength = 0;
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st->rxBuffers[1].requestedLength = 0;
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st->txBuffer.usartStatus = st;
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st->rxBuffers[0].usartStatus = st;
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st->rxBuffers[1].usartStatus = st;
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st->packetReceivedCallback = packetReceivedCallback;
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st->packetReceivedCallbacParam = packetReceivedCallbackParam;
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st->packetReceivedCallbackParam = packetReceivedCallbackParam;
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st->rxSerial = -1;
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st->txSerial = 0;
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st->activeRxBuf = 0;
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@ -82,52 +130,46 @@ void Pku_Init(
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}
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uint8_t* Pku_GetTxBuffer(struct usartstatus_t *status)
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uint8_t* MOCKABLE(Pu_GetTxBuffer)(struct usartstatus_t *status)
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{
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return status->txBuffer.packet.payload;
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}
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static inline void BuildHeader(struct usart_buffer_t *buffer, uint8_t serial, uint8_t length)
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{
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uint8_t hash = STARTMARKER;
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buffer->packet.header.startByte = STARTMARKER;
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buffer->packet.header.serial = serial;
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hash ^= serial;
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buffer->packet.header.payloadLength = length - 1;
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hash ^= length - 1;
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buffer->packet.header.hash = hash;
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}
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static inline uint8_t CheckHeader(struct usartpacket_t *packet)
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uint8_t MOCKABLE(Pu_CheckHeader)(struct usartpacket_t *packet)
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{
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return packet->header.startByte == STARTMARKER && (packet->header.startByte ^ packet->header.serial ^ packet->header.payloadLength) == packet->header.hash;
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}
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uint8_t Pku_Post(struct usartstatus_t *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue)
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uint8_t MOCKABLE(Pu_Post)(struct usartstatus_t *status, uint8_t const *payload, uint8_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue)
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{
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if(length > 256)
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return 1;
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struct usart_buffer_t *buffer = &status->txBuffer;
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uint8_t hash = STARTMARKER;
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buffer->packet.header.startByte = STARTMARKER;
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buffer->packet.header.serial = status->txSerial;
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hash ^= status->txSerial++;
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buffer->packet.header.payloadLength = length;
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hash ^= length;
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buffer->packet.header.hash = hash;
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BuildHeader(&status->txBuffer, status->txSerial++, length);
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uint16_t payloadLength = RoundUpTo4(length);
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if(payload)
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memcpy(status->txBuffer.packet.payload, payload, length);
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status->txBuffer.requestedLength = sizeof(struct usartpacketheader_t) + payloadLength + sizeof(uint32_t); // +4 for the hash
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status->txBuffer.busy = 1;
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status->txBuffer.error = 0;
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Crc_Enqueue(status->crcStatus, &status->crcSlot, 0, status->txBuffer.packet.payload, length,
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Crc_Enqueue(status->crcStatus, &status->crcSlot, 0, &status->txBuffer.packet, sizeof(status->txBuffer.packet.header) + payloadLength,
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NULL, (uint32_t*)(status->txBuffer.packet.payload + payloadLength));
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while(waitForCrcQueue && Crc_IsSlotQueued(&status->crcSlot, 0));
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Pku_SetupTransmit(status->usart, status->txDmaInfo.dma, status->txDmaInfo.stream, &status->txBuffer.packet, status->txBuffer.requestedLength);
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Pu_SetupTransmit(status->usart, status->txDmaInfo.dma, status->txDmaInfo.stream, &status->txBuffer.packet, status->txBuffer.requestedLength);
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StatsIncSent(&status->stats);
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return 0;
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}
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void Pku_SetupReceive(struct usartstatus_t *status)
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void MOCKABLE(Pu_SetupReceive)(struct usartstatus_t *status)
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{
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uint8_t packetIndex = status->activeRxBuf;
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}
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void Pku_ConsumePacket(struct usartstatus_t *status, uint8_t packetIndex)
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void MOCKABLE(Pu_SetupTransmit)(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length)
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{
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LL_DMA_ConfigAddresses(dma, stream, (uint32_t)buffer, LL_USART_DMA_GetRegAddr(usart), LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetDataLength(dma, stream, length);
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LL_USART_EnableDMAReq_TX(usart);
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LL_DMA_EnableStream(dma, stream);
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}
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void MOCKABLE(Pu_ConsumePacket)(struct usartstatus_t *status, uint8_t packetIndex)
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{
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struct usart_buffer_t *buffer = &status->rxBuffers[packetIndex];
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if(buffer->busy) {
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if(buffer->error)
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StatsIncPayloadError(&status->stats, buffer->errorInfo, *(uint32_t*) (buffer->packet.payload + RoundUpTo4(buffer->packet.header.payloadLength + 1)));
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StatsIncPayloadError(&status->stats, buffer->errorInfo, *(uint32_t*) (buffer->packet.payload + RoundUpTo4(buffer->packet.header.payloadLength)));
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else {
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uint8_t diff = buffer->packet.header.serial - status->rxSerial;
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if(diff > 1)
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}
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void Pku_SetupTransmit(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length)
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{
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LL_DMA_ConfigAddresses(dma, stream, (uint32_t)buffer, LL_USART_DMA_GetRegAddr(usart), LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetDataLength(dma, stream, length);
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LL_USART_EnableDMAReq_TX(usart);
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LL_DMA_EnableStream(dma, stream);
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}
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void RxCrcComputedCallback(void *callbackParm, uint32_t calculatedCrc, uint8_t success)
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{
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struct usart_buffer_t *ub = (struct usart_buffer_t*) callbackParm;
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if(!success)
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ub->error = 1;
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else if(*(uint32_t*) (ub->packet.payload + RoundUpTo4(ub->packet.header.payloadLength + 1)) == calculatedCrc)
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ub->busy = 1;
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else {
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ub->error = ub->busy = 1;
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ub->errorInfo = calculatedCrc;
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}
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if(ub->usartStatus->packetReceivedCallback)
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ub->usartStatus->packetReceivedCallback(ub->usartStatus->packetReceivedCallbacParam, ub);
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}
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void Pku_HandleRxDmaIrq(struct usartstatus_t *status)
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void MOCKABLE(Pu_HandleRxDmaIrq)(struct usartstatus_t *status)
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{
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DIAG_INTERRUPT_IN();
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StatsIncRcvd(&status->stats);
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if(*status->rxDmaInfo.isReg & status->rxDmaInfo.tcMask) {
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*status->rxDmaInfo.ifcReg = status->rxDmaInfo.tcMask;
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if(CheckHeader(&status->rxBuffers[status->activeRxBuf].packet))
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if(Pu_CheckHeader(&status->rxBuffers[status->activeRxBuf].packet)) {
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Crc_Enqueue(status->crcStatus, &status->crcSlot, 1,
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status->rxBuffers[status->activeRxBuf].packet.payload,
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status->rxBuffers[status->activeRxBuf].packet.header.payloadLength +1,
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RxCrcComputedCallback, &status->rxBuffers[status->activeRxBuf]);
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else {
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&status->rxBuffers[status->activeRxBuf].packet,
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RoundUpTo4(status->rxBuffers[status->activeRxBuf].packet.header.payloadLength) + sizeof(struct usartpacketheader_t),
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Pu_RxCrcComputedCallback, &status->rxBuffers[status->activeRxBuf]);
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} else {
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StatsIncHdrError(&status->stats, *(uint32_t*)&status->rxBuffers[status->activeRxBuf].packet.header);
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status->rxBuffers[status->activeRxBuf].error = 1;
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}
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} else if(*status->rxDmaInfo.isReg & status->rxDmaInfo.teMask) {
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}
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if(*status->rxDmaInfo.isReg & status->rxDmaInfo.teMask) {
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*status->rxDmaInfo.ifcReg = status->rxDmaInfo.teMask;
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status->rxBuffers[status->activeRxBuf].error = 1;
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}
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DIAG_RX_BUFFER_SWITCH(status->activeRxBuf);
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if(status->rxBuffers[status->activeRxBuf].busy)
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StatsIncOverrun(&status->stats);
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Pku_SetupReceive(status);
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Pu_SetupReceive(status);
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DIAG_INTERRUPT_OUT();
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}
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void Pku_HandleTxDmaIrq(struct usartstatus_t *status)
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void MOCKABLE(Pu_RxCrcComputedCallback)(void *callbackParm, uint32_t calculatedCrc, uint8_t success)
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{
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struct usart_buffer_t *ub = (struct usart_buffer_t*) callbackParm;
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if(!success)
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ub->error = 1;
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else if(*(uint32_t*) (ub->packet.payload + RoundUpTo4(ub->packet.header.payloadLength)) == calculatedCrc)
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ub->busy = 1;
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else {
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ub->error = ub->busy = 1;
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ub->errorInfo = calculatedCrc;
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}
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if(ub->usartStatus->packetReceivedCallback)
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ub->usartStatus->packetReceivedCallback(ub->usartStatus->packetReceivedCallbackParam, ub);
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}
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void MOCKABLE(Pu_HandleTxDmaIrq)(struct usartstatus_t *status)
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{
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DIAG_INTERRUPT_IN();
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if(*status->txDmaInfo.isReg & status->txDmaInfo.tcMask) { // DMA transfer complete
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LL_USART_EnableIT_TC(status->usart);
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LL_DMA_DisableStream(status->txDmaInfo.dma, status->txDmaInfo.stream);
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}
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else if(*status->txDmaInfo.isReg & status->txDmaInfo.teMask) {
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if(*status->txDmaInfo.isReg & status->txDmaInfo.teMask) {
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*status->txDmaInfo.ifcReg = status->txDmaInfo.teMask;
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status->txBuffer.error = 1;
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LL_USART_EnableIT_TC(status->usart);
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LL_DMA_DisableStream(status->txDmaInfo.dma, status->txDmaInfo.stream);
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StatsIncDmaError(&status->stats);
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}
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if(*status->txDmaInfo.isReg & status->txDmaInfo.feMask)
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DIAG_INTERRUPT_OUT();
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}
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void Pku_HandleUsartIrq(struct usartstatus_t *status)
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void MOCKABLE(Pu_HandleUsartIrq)(struct usartstatus_t *status)
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{
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DIAG_INTERRUPT_IN();
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if(LL_USART_IsActiveFlag_IDLE(status->usart) && LL_USART_IsEnabledIT_IDLE(status->usart)) { // receiver idle
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LL_USART_ClearFlag_IDLE(status->usart);
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uint16_t rcvdLen = status->rxBuffers[status->activeRxBuf].requestedLength - LL_DMA_GetDataLength(status->rxDmaInfo.dma, status->rxDmaInfo.stream);
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if(rcvdLen >= sizeof(struct usartpacketheader_t)) {
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if(CheckHeader(&status->rxBuffers[status->activeRxBuf].packet)) {
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if(rcvdLen >= sizeof(struct usartpacketheader_t) + RoundUpTo4(status->rxBuffers[status->activeRxBuf].packet.header.payloadLength + 1) + sizeof(uint32_t))
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if(Pu_CheckHeader(&status->rxBuffers[status->activeRxBuf].packet)) {
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if(rcvdLen >= sizeof(struct usartpacketheader_t) + RoundUpTo4(status->rxBuffers[status->activeRxBuf].packet.header.payloadLength) + sizeof(uint32_t))
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LL_DMA_DisableStream(status->rxDmaInfo.dma, status->rxDmaInfo.stream);
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else
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StatsIncPremature_payload(&status->stats);
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} else {
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status->rxBuffers[status->activeRxBuf].error = 1;
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status->rxBuffers[status->activeRxBuf].busy = 1;
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LL_DMA_DisableStream(status->rxDmaInfo.dma, status->rxDmaInfo.stream);
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}
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} else
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StatsIncPremature_hdr(&status->stats);
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}
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else if(LL_USART_IsActiveFlag_TC(status->usart) && LL_USART_IsEnabledIT_TC(status->usart)) { // transmission complete
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if(LL_USART_IsActiveFlag_TC(status->usart) && LL_USART_IsEnabledIT_TC(status->usart)) { // transmission complete
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LL_USART_DisableIT_TC(status->usart);
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LL_USART_DisableDirectionTx(status->usart); // enforcing an idle frame
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LL_USART_EnableDirectionTx(status->usart);
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