git subrepo clone git@git.pcmuhely.hu:compi/f4ll_c.git components/f4ll_c
subrepo: subdir: "components/f4ll_c" merged: "7570c78" upstream: origin: "git@git.pcmuhely.hu:compi/f4ll_c.git" branch: "master" commit: "7570c78" git-subrepo: version: "0.4.0" origin: "https://github.com/ingydotnet/git-subrepo" commit: "5d6aba9"
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179
components/f4ll_c/crcscheduler.c
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179
components/f4ll_c/crcscheduler.c
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/*
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* interrupt.c
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*
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* Created on: Aug 29, 2019
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* Author: abody
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*/
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#include <f4ll_c/crcscheduler.h>
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#include "main.h"
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#include <string.h>
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#include <platform/crc_ll.h>
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#include "diag.h"
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#include "f4ll_c/dmahelper.h"
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#ifndef DIAG_CRC_CALC_START
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# define DIAG_CRC_CALC_START()
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#endif
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#ifndef DIAG_CRC_CALC_END
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# define DIAG_CRC_CALC_END()
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#endif
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#ifndef DIAG_INTERRUPT_IN
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# define DIAG_INTERRUPT_IN()
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#endif
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#ifndef DIAG_INTERRUPT_OUT
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# define DIAG_INTERRUPT_OUT()
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#endif
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void Crc_InitStatus(struct crcstatus_t *st, DMA_TypeDef *dma, uint32_t stream)
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{
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Dma_Init(&st->dmaInfo, dma, stream);
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LL_DMA_EnableIT_TC(dma, stream);
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LL_DMA_EnableIT_TE(dma, stream);
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LL_DMA_SetM2MDstAddress(dma, stream, (uint32_t)&CRC->DR);
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st->activeSlot = NULL;
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st->first = NULL;
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}
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void Crc_AttachTask(struct crcstatus_t *status, struct crcslotlistitem_t *slot, struct crcslottask_t *tasks, uint8_t taskCount)
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{
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slot->count = taskCount;
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slot->tasks = tasks;
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memset(tasks, 0, sizeof(*tasks)*taskCount);
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uint32_t prim = __get_PRIMASK();
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__disable_irq();
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slot->next = status->first;
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status->first = slot;
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__set_PRIMASK(prim);
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}
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uint8_t Crc_GetActiveTask(struct crcslotlistitem_t **slot_out, struct crcstatus_t volatile *status)
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{
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uint8_t ret;
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uint32_t prim = __get_PRIMASK();
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__disable_irq();
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ret = status->activeTask;
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if(slot_out)
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*slot_out = (struct crcslotlistitem_t *) status->activeSlot;
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__set_PRIMASK(prim);
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return ret;
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}
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uint8_t Crc_Enqueue(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task,
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uint8_t *address, uint16_t len, void (*callback)(void*, uint32_t, uint8_t), void* callbackParam)
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{
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uint32_t prim = __get_PRIMASK();
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uint16_t need_start;
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struct crcstatus_t volatile *st = status;
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while(st->activeSlot == slot && st->activeTask == task);
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__disable_irq();
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need_start = (st->activeSlot == NULL);
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slot->tasks[task].address = need_start ? NULL : address;
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slot->tasks[task].wordCount = (len+3)/4;
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slot->tasks[task].callback = callback;
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slot->tasks[task].callbackParam = callbackParam;
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if(need_start) {
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status->activeSlot = slot;
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status->activeTask = task;
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}
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__set_PRIMASK(prim);
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if(need_start) {
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CRC->CR = 1;
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LL_DMA_SetM2MSrcAddress(status->dmaInfo.dma, status->dmaInfo.stream, (uint32_t)address);
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LL_DMA_SetDataLength(status->dmaInfo.dma, status->dmaInfo.stream, (len+3)/4);
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DIAG_CRC_CALC_START();
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LL_DMA_EnableStream(status->dmaInfo.dma, status->dmaInfo.stream);
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}
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return need_start;
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}
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void Crc_WaitResults(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task)
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{
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struct crcslotlistitem_t *slotQueued;
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while(Crc_IsSlotQueued(slot, task));
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while(Crc_GetActiveTask(&slotQueued, status) == task && slotQueued == slot);
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}
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uint32_t Crc_Compute(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task, uint8_t *address, uint16_t len)
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{
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uint32_t result;
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Crc_Enqueue(status, slot, task, address, len, NULL, &result);
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while((struct crcslotlistitem_t volatile *)slot->tasks[task].callbackParam);
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return result;
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}
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// only called from ISR context
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static void StartNextCrcTask(struct crcstatus_t *status)
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{
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char moreTasks;
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uint8_t index = 0;
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do {
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struct crcslotlistitem_t *slot = status->first;
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moreTasks = 0;
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while(slot) {
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if(index < slot->count) {
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if(slot->tasks[index].address) {
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status->activeSlot = slot;
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status->activeTask = index;
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CRC->CR = 1;
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LL_DMA_SetM2MSrcAddress(status->dmaInfo.dma, status->dmaInfo.stream, (uint32_t)slot->tasks[index].address);
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LL_DMA_SetDataLength(status->dmaInfo.dma, status->dmaInfo.stream, slot->tasks[index].wordCount);
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LL_DMA_EnableStream(status->dmaInfo.dma, status->dmaInfo.stream);
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slot->tasks[index].address = NULL; // marking as started
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return;
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}
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if(index + 1 < slot->count)
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moreTasks = 1;
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}
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slot = slot->next;
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}
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++index;
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} while(moreTasks);
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status->activeSlot = NULL;
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}
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void Crc_HandleDmaIrq(struct crcstatus_t *status)
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{
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DIAG_INTERRUPT_IN();
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if(*status->dmaInfo.isReg & status->dmaInfo.tcMask) { // DMA transfer complete
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*status->dmaInfo.ifcReg = status->dmaInfo.tcMask;
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LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream);
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if(status->activeSlot) {
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struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask];
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if(tsk->callback)
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tsk->callback(tsk->callbackParam, CRC->DR, 1);
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else if(tsk->callbackParam)
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*(uint32_t*)tsk->callbackParam = CRC->DR;
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tsk->callback = tsk->callbackParam = NULL; // marking as inactive
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DIAG_CRC_CALC_END();
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StartNextCrcTask(status);
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}
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}
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else if(*status->dmaInfo.isReg & status->dmaInfo.teMask) {
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*status->dmaInfo.ifcReg = status->dmaInfo.teMask;
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LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream);
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if(status->activeSlot) {
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struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask];
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if(tsk->callback)
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tsk->callback(tsk->callbackParam, CRC->DR, 0);
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else if(tsk->callbackParam)
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*(uint32_t*)tsk->callbackParam = 0xffffffff;
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tsk->callback = tsk->callbackParam = NULL; // marking as inactive
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DIAG_CRC_CALC_END();
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StartNextCrcTask(status);
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}
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}
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DIAG_INTERRUPT_OUT();
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}
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