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git subrepo pull components/f4ll_c

Browse source 
subrepo:
  subdir:   "components/f4ll_c"
  merged:   "4754b65"
upstream:
  origin:   "git@git.pcmuhely.hu:compi/f4ll_c.git"
  branch:   "master"
  commit:   "4754b65"
git-subrepo:
  version:  "0.4.0"
  origin:   "https://github.com/ingydotnet/git-subrepo"
  commit:   "5d6aba9"
This commit is contained in:
Attila Body 2019-11-28 11:41:10 +01:00
parent 6f89e70a2a
commit 357b30b344
11 changed files with 140 additions and 72 deletions
Download patch file Download diff file Expand all files Collapse all files

4
components/f4ll_c/.gitrepo
View file

@ -6,7 +6,7 @@
[subrepo]
remote = git@git.pcmuhely.hu:compi/f4ll_c.git
branch = master
commit = 2cf75b2f5786e74194c5204b877c2ea10b70c0e3
parent = d63d225817b681a7ac695bd2f63d3779012909c1
commit = 4754b650418bd9e053db80827700d3a527d41823
parent = 6f89e70a2a208d77d8d9ae1e20dbece8f0214c59
method = merge
cmdver = 0.4.0

15
components/f4ll_c/component.mk
View file

@ -1,10 +1,17 @@
#encoder
SELF_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
REL_DIR := $(patsubst %/,%,$(dir $(lastword $(MAKEFILE_LIST))))
ifeq ($(MKDBG), 1)
$(info >>> $(REL_DIR)/component.mk)
$(info >>> $(REL_DIR)/component.mk)
endif
$(eval C_SOURCES += $(wildcard $(REL_DIR)/*.c))
#$(eval C_SOURCES += $(wildcard $(REL_DIR)/*.c))
$(eval C_SOURCES += \
$(REL_DIR)/dmahelper.c \
$(REL_DIR)/crcscheduler.c \
$(REL_DIR)/strutil.c \
$(REL_DIR)/memcpydma.c ) \
#$(REL_DIR)/packetusart.c \
#$(REL_DIR)/consolehandler.c \
ifeq ($(MKDBG), 1)
$(info <<<)
$(info <<<)
endif

2
components/f4ll_c/consolehandler.c
View file

@ -4,8 +4,6 @@
* Created on: Aug 29, 2019
* Author: abody
*/
#include "main.h"
#include "globals.h"
#include "f4ll_c/packetusart.h"
#include "f4ll_c/strutil.h"

14
components/f4ll_c/consolehandler.h
View file

@ -5,16 +5,24 @@
* Author: abody
*/
#ifndef INTERRUPT_HANDLERS_H_
#define INTERRUPT_HANDLERS_H_
#ifndef CONSOLEHANDLER_H_
#define CONSOLEHANDLER_H_
#include "usart.h"
#include "f4ll_c/dmahelper.h"
#include "f4ll_c/packetusart.h"
#ifdef __cplusplus
extern "C" {
#endif
void Con_HandleTxDmaIrq(struct dmainfo_t *info, USART_TypeDef *usart);
void Con_HandleUsartIrq(USART_TypeDef *usart);
void Con_PrintStats(char *buffer, uint8_t id, struct usart_stats *stats, USART_TypeDef *usart, struct dmainfo_t *dmaInfo);
#endif /* INTERRUPT_HANDLERS_H_ */
#ifdef __cplusplus
}
#endif
#endif /* CONSOLEHANDLER_H_ */

60
components/f4ll_c/crcscheduler.c
View file

@ -5,9 +5,10 @@
* Author: abody
*/
#include <f4ll_c/crcscheduler.h>
#include "main.h"
#include <string.h>
#if defined(HAVE_DIAG)
#include "diag.h"
#endif
#include "f4ll_c/dmahelper.h"
#ifndef DIAG_CRC_CALC_START
@ -26,6 +27,12 @@
# define DIAG_INTERRUPT_OUT()
#endif
#ifdef UNITTEST
#define STATIC_MOCKME
#else
#define STATIC_MOCKME static
#endif
void Crc_InitStatus(struct crcstatus_t *st, CRC_TypeDef *crcUnit, DMA_TypeDef *dma, uint32_t stream)
{
st->crcUnit = crcUnit;
@ -34,7 +41,7 @@ void Crc_InitStatus(struct crcstatus_t *st, CRC_TypeDef *crcUnit, DMA_TypeDef *d
LL_DMA_EnableIT_TE(dma, stream);
LL_DMA_SetM2MDstAddress(dma, stream, (uint32_t)&crcUnit->DR);
st->activeSlot = NULL;
st->first = NULL;
st->firstSlot = NULL;
}
void Crc_AttachTask(struct crcstatus_t *status, struct crcslotlistitem_t *slot, struct crcslottask_t *tasks, uint8_t taskCount)
@ -45,8 +52,8 @@ void Crc_AttachTask(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
uint32_t prim = __get_PRIMASK();
__disable_irq();
slot->next = status->first;
status->first = slot;
slot->next = status->firstSlot;
status->firstSlot = slot;
__set_PRIMASK(prim);
}
@ -72,7 +79,7 @@ uint8_t Crc_Enqueue(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
uint16_t need_start;
struct crcstatus_t volatile *st = status;
while(st->activeSlot == slot && st->activeTask == task);
while(Crc_IsSlotBusy(slot, task));
__disable_irq();
need_start = (st->activeSlot == NULL);
slot->tasks[task].address = need_start ? NULL : address;
@ -95,15 +102,6 @@ uint8_t Crc_Enqueue(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
return need_start;
}
void Crc_WaitResults(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task)
{
struct crcslotlistitem_t *slotQueued;
while(Crc_IsSlotQueued(slot, task));
while(Crc_GetActiveTask(&slotQueued, status) == task && slotQueued == slot);
}
uint32_t Crc_Compute(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task, uint8_t *address, uint16_t len)
{
uint32_t result;
@ -113,13 +111,13 @@ uint32_t Crc_Compute(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
}
// only called from ISR context
static void StartNextCrcTask(struct crcstatus_t *status)
STATIC_MOCKME void Crc_StartNextTask(struct crcstatus_t *status)
{
char moreTasks;
uint8_t index = 0;
do {
struct crcslotlistitem_t *slot = status->first;
struct crcslotlistitem_t *slot = status->firstSlot;
moreTasks = 0;
while(slot) {
if(index < slot->count) {
@ -143,35 +141,27 @@ static void StartNextCrcTask(struct crcstatus_t *status)
status->activeSlot = NULL;
}
// !!!PORTABILITY WARNING!!! using registers and bits directly. should be reviewed extremely t
void Crc_HandleDmaIrq(struct crcstatus_t *status)
{
uint8_t success = 1;
DIAG_INTERRUPT_IN();
if(*status->dmaInfo.isReg & status->dmaInfo.tcMask) { // DMA transfer complete
*status->dmaInfo.ifcReg = status->dmaInfo.tcMask;
if((*status->dmaInfo.isReg & status->dmaInfo.tcMask) ||
(*status->dmaInfo.isReg & status->dmaInfo.teMask)) {
if(*status->dmaInfo.isReg & status->dmaInfo.teMask)
success = 0;
*status->dmaInfo.ifcReg = *status->dmaInfo.isReg & (status->dmaInfo.tcMask | status->dmaInfo.teMask);
LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream);
if(status->activeSlot) {
struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask];
if(tsk->callback)
tsk->callback(tsk->callbackParam, status->crcUnit->DR, 1);
tsk->callback(tsk->callbackParam, status->crcUnit->DR, success);
else if(tsk->callbackParam)
*(uint32_t*)tsk->callbackParam = status->crcUnit->DR;
*(uint32_t*)tsk->callbackParam = success ? status->crcUnit->DR : 0xffffffff;
tsk->callback = tsk->callbackParam = NULL; // marking as inactive
DIAG_CRC_CALC_END();
StartNextCrcTask(status);
}
}
else if(*status->dmaInfo.isReg & status->dmaInfo.teMask) {
*status->dmaInfo.ifcReg = status->dmaInfo.teMask;
LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream);
if(status->activeSlot) {
struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask];
if(tsk->callback)
tsk->callback(tsk->callbackParam, status->crcUnit->DR, 0);
else if(tsk->callbackParam)
*(uint32_t*)tsk->callbackParam = 0xffffffff;
tsk->callback = tsk->callbackParam = NULL; // marking as inactive
DIAG_CRC_CALC_END();
StartNextCrcTask(status);
Crc_StartNextTask(status);
}
}
DIAG_INTERRUPT_OUT();

24
components/f4ll_c/crcscheduler.h
View file

@ -17,6 +17,10 @@
#include <platform/crc_ll.h>
#include <f4ll_c/dmahelper.h>
#ifdef __cplusplus
extern "C" {
#endif
struct crcslottask_t {
void * volatile address;
uint16_t wordCount;
@ -35,30 +39,38 @@ struct crcstatus_t {
struct dmainfo_t dmaInfo;
struct crcslotlistitem_t *activeSlot;
uint8_t activeTask;
struct crcslotlistitem_t *first;
struct crcslotlistitem_t *firstSlot;
};
void Crc_InitStatus(struct crcstatus_t *status, CRC_TypeDef *crcUnit, DMA_TypeDef *dma, uint32_t stream);
uint8_t Crc_GetActiveTask(struct crcslotlistitem_t **slot_out, struct crcstatus_t volatile *status);
static inline uint8_t Crc_IsSlotQueued(struct crcslotlistitem_t volatile *slot, uint8_t task) {
return slot->tasks[task].address != NULL;
static inline uint8_t Crc_IsSlotQueued(struct crcslotlistitem_t *slot, uint8_t task) {
return ((struct crcslottask_t volatile)slot->tasks[task]).address != NULL;
}
static inline uint8_t Crc_IsSlotActive(struct crcslotlistitem_t volatile *slot, uint8_t task) {
return slot->tasks[task].callback != NULL || slot->tasks[task].callbackParam != NULL;
static inline uint8_t Crc_IsSlotBusy(struct crcslotlistitem_t *slot, uint8_t task) {
struct crcslottask_t volatile *taskPtr = &slot->tasks[task];
return taskPtr->callback != NULL || taskPtr->callbackParam != NULL;
}
static inline void Crc_WaitResults(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task) {
while(Crc_IsSlotBusy(slot, task));
}
void Crc_AttachTask(struct crcstatus_t *status, struct crcslotlistitem_t *slot, struct crcslottask_t *tasks, uint8_t taskCount);
uint8_t Crc_Enqueue(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task,
uint8_t *address, uint16_t len, void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
void Crc_WaitResults(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task);
uint32_t Crc_Compute(struct crcstatus_t *status, struct crcslotlistitem_t *slot, uint8_t task, uint8_t *address, uint16_t len);
void Crc_ComputeAsync(struct crcstatus_t *status, uint8_t slot,
uint8_t *address, uint16_t len,
void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
void Crc_HandleDmaIrq(struct crcstatus_t *status);
#ifdef __cplusplus
}
#endif
#endif /* CRC_HANDLER_H_ */

30
components/f4ll_c/dmahelper.c
View file

@ -6,8 +6,22 @@
*/
#include <f4ll_c/dmahelper.h>
#ifndef DEFINE_MOCKPTR
#define DEFINE_MOCKPTR(...)
#endif
volatile uint32_t* Dma_GetIsReg(DMA_TypeDef *dma, uint32_t stream)
#ifdef UNITTEST
DEFINE_MOCKPTR(volatile uint32_t*, Dma_GetIsReg, DMA_TypeDef*, uint32_t)
DEFINE_MOCKPTR(volatile uint32_t*, Dma_GetIfcReg, DMA_TypeDef*, uint32_t)
DEFINE_MOCKPTR(uint32_t, Dma_GetDmeMask, uint32_t)
DEFINE_MOCKPTR(uint32_t, Dma_GetTeMask, uint32_t)
DEFINE_MOCKPTR(uint32_t, Dma_GetHtMask, uint32_t)
DEFINE_MOCKPTR(uint32_t, Dma_GetTcMask, uint32_t)
DEFINE_MOCKPTR(uint32_t, Dma_GetFeMask, uint32_t)
DEFINE_MOCKPTR(void, Dma_Init, struct dmainfo_t*, DMA_TypeDef*, uint32_t)
#endif // UNITTEST
volatile uint32_t* MOCKABLE(Dma_GetIsReg)(DMA_TypeDef *dma, uint32_t stream)
{
if(dma == DMA1)
return (stream < LL_DMA_STREAM_4) ? &DMA1->LISR : &DMA1->HISR;
@ -15,7 +29,7 @@ volatile uint32_t* Dma_GetIsReg(DMA_TypeDef *dma, uint32_t stream)
return (stream < LL_DMA_STREAM_4) ? &DMA2->LISR : &DMA2->HISR;
}
volatile uint32_t* Dma_GetIfcReg(DMA_TypeDef *dma, uint32_t stream)
volatile uint32_t* MOCKABLE(Dma_GetIfcReg)(DMA_TypeDef *dma, uint32_t stream)
{
if(dma == DMA1)
return (stream < LL_DMA_STREAM_4) ? &DMA1->LIFCR : &DMA1->HIFCR;
@ -23,7 +37,7 @@ volatile uint32_t* Dma_GetIfcReg(DMA_TypeDef *dma, uint32_t stream)
return (stream < LL_DMA_STREAM_4) ? &DMA2->LIFCR : &DMA2->HIFCR;
}
uint32_t Dma_GetFeMask(uint32_t stream)
uint32_t MOCKABLE(Dma_GetFeMask)(uint32_t stream)
{
static const uint32_t feMasks[8] = {
DMA_LISR_FEIF0, DMA_LISR_FEIF1, DMA_LISR_FEIF2, DMA_LISR_FEIF3, DMA_HISR_FEIF4, DMA_HISR_FEIF5, DMA_HISR_FEIF6, DMA_HISR_FEIF7
@ -31,7 +45,7 @@ uint32_t Dma_GetFeMask(uint32_t stream)
return feMasks[stream];
}
uint32_t Dma_GetDmeMask(uint32_t stream)
uint32_t MOCKABLE(Dma_GetDmeMask)(uint32_t stream)
{
static const uint32_t dmeMasks[8] = {
DMA_LISR_DMEIF0, DMA_LISR_DMEIF1, DMA_LISR_DMEIF2, DMA_LISR_DMEIF3, DMA_HISR_DMEIF4, DMA_HISR_DMEIF5, DMA_HISR_DMEIF6, DMA_HISR_DMEIF7
@ -39,7 +53,7 @@ uint32_t Dma_GetDmeMask(uint32_t stream)
return dmeMasks[stream];
}
uint32_t Dma_GetTeMask(uint32_t stream)
uint32_t MOCKABLE(Dma_GetTeMask)(uint32_t stream)
{
static const uint32_t teMasks[8] = {
DMA_LISR_TEIF0, DMA_LISR_TEIF1, DMA_LISR_TEIF2, DMA_LISR_TEIF3, DMA_HISR_TEIF4, DMA_HISR_TEIF5, DMA_HISR_TEIF6, DMA_HISR_TEIF7
@ -47,7 +61,7 @@ uint32_t Dma_GetTeMask(uint32_t stream)
return teMasks[stream];
}
uint32_t Dma_GetHtMask(uint32_t stream)
uint32_t MOCKABLE(Dma_GetHtMask)(uint32_t stream)
{
static const uint32_t htMasks[8] = {
DMA_LISR_HTIF0, DMA_LISR_HTIF1, DMA_LISR_HTIF2, DMA_LISR_HTIF3, DMA_HISR_HTIF4, DMA_HISR_HTIF5, DMA_HISR_HTIF6, DMA_HISR_HTIF7
@ -55,7 +69,7 @@ uint32_t Dma_GetHtMask(uint32_t stream)
return htMasks[stream];
}
uint32_t Dma_GetTcMask(uint32_t stream)
uint32_t MOCKABLE(Dma_GetTcMask)(uint32_t stream)
{
static const uint32_t tcMasks[8] = {
DMA_LISR_TCIF0, DMA_LISR_TCIF1, DMA_LISR_TCIF2, DMA_LISR_TCIF3, DMA_HISR_TCIF4, DMA_HISR_TCIF5, DMA_HISR_TCIF6, DMA_HISR_TCIF7
@ -64,7 +78,7 @@ uint32_t Dma_GetTcMask(uint32_t stream)
return tcMasks[stream];
}
void Dma_Init(struct dmainfo_t *info, DMA_TypeDef *dma, uint32_t stream)
void MOCKABLE(Dma_Init)(struct dmainfo_t *info, DMA_TypeDef *dma, uint32_t stream)
{
info->dma = dma;
info->stream = stream;

41
components/f4ll_c/dmahelper.h
View file

@ -10,6 +10,17 @@
#include <inttypes.h>
#include <platform/dma_ll.h>
#ifndef DECLARE_MOCKPTR
#define DECLARE_MOCKPTR(...)
#endif
#ifndef MOCKABLE
#define MOCKABLE(x) x
#endif
#ifdef __cplusplus
extern "C" {
#endif
struct dmainfo_t {
DMA_TypeDef *dma;
uint32_t stream;
@ -22,14 +33,28 @@ struct dmainfo_t {
uint32_t tcMask;
};
volatile uint32_t* Dma_GetIsReg(DMA_TypeDef *dma, uint32_t stream);
volatile uint32_t* Dma_GetIfcReg(DMA_TypeDef *dma, uint32_t stream);
uint32_t Dma_GetDmeMask(uint32_t stream);
uint32_t Dma_GetTeMask(uint32_t stream);
uint32_t Dma_GetHtMask(uint32_t stream);
uint32_t Dma_GetTcMask(uint32_t stream);
uint32_t Dma_GetFeMask(uint32_t stream);
#ifdef UNITTEST
DECLARE_MOCKPTR(volatile uint32_t*, Dma_GetIsReg, DMA_TypeDef*, uint32_t)
DECLARE_MOCKPTR(volatile uint32_t*, Dma_GetIfcReg, DMA_TypeDef*, uint32_t)
DECLARE_MOCKPTR(uint32_t, Dma_GetDmeMask, uint32_t)
DECLARE_MOCKPTR(uint32_t, Dma_GetTeMask, uint32_t)
DECLARE_MOCKPTR(uint32_t, Dma_GetHtMask, uint32_t)
DECLARE_MOCKPTR(uint32_t, Dma_GetTcMask, uint32_t)
DECLARE_MOCKPTR(uint32_t, Dma_GetFeMask, uint32_t)
DECLARE_MOCKPTR(void, Dma_Init, struct dmainfo_t*, DMA_TypeDef*, uint32_t)
#endif // UNITTEST
void Dma_Init(struct dmainfo_t *info, DMA_TypeDef *dma, uint32_t stream);
volatile uint32_t* MOCKABLE(Dma_GetIsReg)(DMA_TypeDef *dma, uint32_t stream);
volatile uint32_t* MOCKABLE(Dma_GetIfcReg)(DMA_TypeDef *dma, uint32_t stream);
uint32_t MOCKABLE(Dma_GetDmeMask)(uint32_t stream);
uint32_t MOCKABLE(Dma_GetTeMask)(uint32_t stream);
uint32_t MOCKABLE(Dma_GetHtMask)(uint32_t stream);
uint32_t MOCKABLE(Dma_GetTcMask)(uint32_t stream);
uint32_t MOCKABLE(Dma_GetFeMask)(uint32_t stream);
void MOCKABLE(Dma_Init)(struct dmainfo_t *info, DMA_TypeDef *dma, uint32_t stream);
#ifdef __cplusplus
}
#endif
#endif /* DMA_HELPER_H_ */

8
components/f4ll_c/memcpydma.h
View file

@ -11,8 +11,16 @@
#include <inttypes.h>
#include <platform/dma_ll.h>
#ifdef __cplusplus
extern "C" {
#endif
void Mcd_Init(DMA_TypeDef *dma, uint32_t stream);
void * Mcd_Copy(void *dst, void const *src, size_t length);
void Mcd_HandleDmaIrq();
#ifdef __cplusplus
}
#endif
#endif /* MEMCPY_DMA_H_ */

6
components/f4ll_c/packetusart.c
View file

@ -9,7 +9,9 @@
#include <f4ll_c/packetusart.h>
#include <string.h>
#include <platform/usart_ll.h>
#if defined(HAVE_DIAG)
#include "diag.h"
#endif
#include "f4ll_c/dmahelper.h"
#include "f4ll_c/crcscheduler.h"
@ -105,13 +107,9 @@ static inline uint8_t CheckHeader(struct usartpacket_t *packet)
uint8_t Pku_Post(struct usartstatus_t *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue)
{
// static uint32_t count = 0;
// ITM->PORT[1].u32 = count++;
if(length > 256)
return 1;
BuildHeader(&status->txBuffer, status->txSerial++, length);
uint16_t payloadLength = RoundUpTo4(length);
if(payload)

8
components/f4ll_c/packetusart.h
View file

@ -12,6 +12,10 @@
#include "f4ll_c/dmahelper.h"
#ifdef __cplusplus
extern "C" {
#endif
struct usart_buffer_t;
struct usartstatus_t;
@ -139,4 +143,8 @@ static inline void StatsAddSkiped(struct usart_stats *s, uint8_t cnt) {
#define StatsAddSkiped(x)
#endif // USART_STATS_DISABLED
#ifdef __cplusplus
}
#endif
#endif /* UART_HANDLER_H_ */