playground-stm32/f407ve_packetusart_c
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Migrated (does not build)

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This commit is contained in:
Attila Body 2025-05-27 16:37:28 +02:00
parent 549d4f3403
commit 1382dda88e
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
108 changed files with 126364 additions and 111432 deletions
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15
Src/stm32f4xx_it.c
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@ -68,7 +68,7 @@
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
@ -212,7 +212,6 @@ void DMA1_Stream1_IRQHandler(void)
Pu_HandleRxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
/* USER CODE END DMA1_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
/* USER CODE END DMA1_Stream1_IRQn 1 */
@ -226,7 +225,6 @@ void DMA1_Stream2_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
// console rx
/* USER CODE END DMA1_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
/* USER CODE END DMA1_Stream2_IRQn 1 */
@ -240,7 +238,6 @@ void DMA1_Stream3_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
Pu_HandleTxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
/* USER CODE END DMA1_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */
@ -254,7 +251,6 @@ void DMA1_Stream4_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
Con_HandleTxDmaIrq(&g_ConsoleTxDmaInfo, UART4);
/* USER CODE END DMA1_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
/* USER CODE END DMA1_Stream4_IRQn 1 */
@ -268,7 +264,6 @@ void DMA1_Stream5_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
Pu_HandleRxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
/* USER CODE END DMA1_Stream5_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
/* USER CODE END DMA1_Stream5_IRQn 1 */
@ -282,7 +277,6 @@ void DMA1_Stream6_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
Pu_HandleTxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
/* USER CODE END DMA1_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
/* USER CODE END DMA1_Stream6_IRQn 1 */
@ -348,7 +342,6 @@ void DMA2_Stream1_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
Pu_HandleRxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
/* USER CODE END DMA2_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
/* USER CODE END DMA2_Stream1_IRQn 1 */
@ -362,7 +355,6 @@ void DMA2_Stream2_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
Pu_HandleRxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
/* USER CODE END DMA2_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
/* USER CODE END DMA2_Stream2_IRQn 1 */
@ -376,7 +368,6 @@ void DMA2_Stream3_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
Mcd_HandleDmaIrq();
/* USER CODE END DMA2_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
/* USER CODE END DMA2_Stream3_IRQn 1 */
@ -390,7 +381,6 @@ void DMA2_Stream4_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
Crc_HandleDmaIrq(&g_crcStatus);
/* USER CODE END DMA2_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
/* USER CODE END DMA2_Stream4_IRQn 1 */
@ -404,7 +394,6 @@ void DMA2_Stream6_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
Pu_HandleTxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
/* USER CODE END DMA2_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
/* USER CODE END DMA2_Stream6_IRQn 1 */
@ -418,7 +407,6 @@ void DMA2_Stream7_IRQHandler(void)
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
Pu_HandleTxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
/* USER CODE END DMA2_Stream7_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
/* USER CODE END DMA2_Stream7_IRQn 1 */
@ -440,4 +428,3 @@ void USART6_IRQHandler(void)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/