Divided USART communication into core and protocol classes
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9ff4e76623
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f0c2ad69c9
7 changed files with 287 additions and 121 deletions
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@ -14,19 +14,11 @@ template<typename T> static inline T RoundUpTo4(T input)
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return (input + 3) & (((T)-1) - 3);
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}
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LL_HsUsart::LL_HsUsart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx, uint32_t streamTx)
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: m_usart(usart)
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, m_rxDma(dma, streamRx)
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, m_txDma(dma, streamTx)
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: LL_UsartCore(usart, dma, streamRx, streamTx)
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{
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LL_CrcHandler::Instance().AttachSlot(m_crcSlot);
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LL_DMA_EnableIT_TC(dma, streamRx);
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LL_DMA_EnableIT_TE(dma, streamRx);
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LL_DMA_EnableIT_TC(dma, streamTx);
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LL_DMA_EnableIT_TE(dma, streamTx);
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LL_USART_EnableIT_IDLE(usart);
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memset(&m_stats, 0, sizeof(m_stats));
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}
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@ -119,11 +111,7 @@ void LL_HsUsart::PostPacket(uint8_t const *payload, uint8_t length, bool waitFor
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while(waitForCrcQueue && LL_CrcHandler::Instance().IsQueued(m_crcSlot, 0));
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LL_DMA_ConfigAddresses(m_txDma.GetDma(), m_txDma.GetStream(), reinterpret_cast<uint32_t>(&m_txBuffer.packet),
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LL_USART_DMA_GetRegAddr(m_usart), LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
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LL_DMA_SetDataLength(m_txDma.GetDma(), m_txDma.GetStream(), m_txBuffer.requestedLength);
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LL_USART_EnableDMAReq_TX(m_usart);
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LL_DMA_EnableStream(m_txDma.GetDma(), m_txDma.GetStream());
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SetupTransmit(&m_txBuffer.packet, m_txBuffer.requestedLength);
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++m_stats.sent;
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}
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@ -131,67 +119,87 @@ void LL_HsUsart::PostPacket(uint8_t const *payload, uint8_t length, bool waitFor
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void LL_HsUsart::SetupReceive()
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{
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int packetIndex = m_rxBufferSelector;
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LL_DMA_ConfigAddresses(m_rxDma.GetDma(), m_rxDma.GetStream(), LL_USART_DMA_GetRegAddr(m_usart),
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reinterpret_cast<uint32_t>(&m_rxBuffers[packetIndex]), LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
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m_rxBuffers[packetIndex].requestedLength = sizeof(m_rxBuffers[packetIndex].packet);
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LL_DMA_SetDataLength(m_rxDma.GetDma(), m_rxDma.GetStream(), m_rxBuffers[packetIndex].requestedLength); // payload already have extra room for hash
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LL_USART_EnableDMAReq_RX(m_usart);
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LL_USART_ClearFlag_ORE(m_usart);
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LL_DMA_EnableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
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m_rxBuffers[m_rxBufferSelector].requestedLength = sizeof(m_rxBuffers[m_rxBufferSelector].packet);
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LL_UsartCore::SetupReceive(&m_rxBuffers[m_rxBufferSelector], sizeof(m_rxBuffers[m_rxBufferSelector].packet));
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}
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void LL_HsUsart::UsartIrq(void)
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void LL_HsUsart::ReceiverIdle(void)
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{
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if(LL_USART_IsActiveFlag_IDLE(m_usart) && LL_USART_IsEnabledIT_IDLE(m_usart)) { // receiver idle
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LL_USART_ClearFlag_IDLE(m_usart);
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uint16_t rcvdLen = m_rxBuffers[m_rxBufferSelector].requestedLength - LL_DMA_GetDataLength(m_rxDma.GetDma(), m_rxDma.GetStream());
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if(rcvdLen >= sizeof(PacketHeader)) {
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header)) {
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if(rcvdLen >= sizeof(PacketHeader) +
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RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength)
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+ sizeof(uint32_t))
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LL_DMA_DisableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
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else
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++m_stats.premature_payload;
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} else {
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m_rxBuffers[m_rxBufferSelector].error = 1;
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uint16_t rcvdLen = m_rxBuffers[m_rxBufferSelector].requestedLength - LL_DMA_GetDataLength(m_rxDma.GetDma(), m_rxDma.GetStream());
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if(rcvdLen >= sizeof(PacketHeader)) {
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header)) {
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if(rcvdLen >= sizeof(PacketHeader) +
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RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength)
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+ sizeof(uint32_t))
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LL_DMA_DisableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
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}
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} else
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++m_stats.premature_hdr;
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}
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else if(LL_USART_IsActiveFlag_TC(m_usart) && LL_USART_IsEnabledIT_TC(m_usart)) { // transmission complete
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LL_USART_DisableIT_TC(m_usart);
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LL_USART_DisableDirectionTx(m_usart); // enforcing an idle frame
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LL_USART_EnableDirectionTx(m_usart);
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m_txBuffer.busy = 0;
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}
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else
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++m_stats.premature_payload;
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} else {
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m_rxBuffers[m_rxBufferSelector].error = 1;
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LL_DMA_DisableStream(m_rxDma.GetDma(), m_rxDma.GetStream());
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}
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} else
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++m_stats.premature_hdr;
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}
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void LL_HsUsart::RxDmaIrq()
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void LL_HsUsart::TransmissionComplete(void)
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{
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LL_USART_DisableDirectionTx(m_usart); // enforcing an idle frame
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LL_USART_EnableDirectionTx(m_usart);
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m_txBuffer.busy = 0;
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}
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void LL_HsUsart::RxDmaTransferComplete(void)
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{
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
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LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
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&m_rxBuffers[m_rxBufferSelector].packet,
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sizeof(PacketHeader) + RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength),
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this, m_rxBufferSelector);
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else {
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++m_stats.hdrError;
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m_rxBuffers[m_rxBufferSelector].error = true;
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}
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SwitchRxBuffers();
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}
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void LL_HsUsart::RxDmaHalfTransfer(void)
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{
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}
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void LL_HsUsart::RxDmaError(LL_DmaHelper::DmaErrorType reason)
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{
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m_rxBuffers[m_rxBufferSelector].error = 1;
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++m_stats.rxDmaError;
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SwitchRxBuffers();
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}
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void LL_HsUsart::TxDmaTransferComplete(void)
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{
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LL_USART_EnableIT_TC(m_usart);
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LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
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}
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void LL_HsUsart::TxDmaHalfTransfer(void)
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{
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}
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void LL_HsUsart::TxDmaError(LL_DmaHelper::DmaErrorType reason)
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{
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m_txBuffer.error = 1;
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++m_stats.txDmaError;
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}
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void LL_HsUsart::SwitchRxBuffers(void)
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{
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++m_stats.rcvd;
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if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
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*m_rxDma.GetIfcReg() = m_rxDma.GetTcMask();
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
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LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
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&m_rxBuffers[m_rxBufferSelector].packet,
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sizeof(PacketHeader) + RoundUpTo4((uint16_t)m_rxBuffers[m_rxBufferSelector].packet.header.payloadLength),
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this, m_rxBufferSelector);
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else {
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++m_stats.hdrError;
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m_rxBuffers[m_rxBufferSelector].error = true;
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}
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} else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
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*m_rxDma.GetIfcReg() = m_rxDma.GetTeMask();
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m_rxBuffers[m_rxBufferSelector].error = 1;
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++m_stats.dmaError;
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}
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m_rxBufferSelector = !m_rxBufferSelector;
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if(m_rxBuffers[m_rxBufferSelector].busy)
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@ -226,25 +234,4 @@ void LL_HsUsart::CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio)
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}
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void LL_HsUsart::TxDmaIrq()
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{
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if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
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*m_txDma.GetIfcReg() = m_txDma.GetTcMask();
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LL_USART_EnableIT_TC(m_usart);
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LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
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}
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else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
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*m_txDma.GetIfcReg() = m_txDma.GetTeMask();
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m_txBuffer.error = 1;
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++m_stats.dmaError;
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}
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if(*m_txDma.GetIsReg() & m_txDma.GetFeMask())
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*m_txDma.GetIfcReg() = m_txDma.GetFeMask();
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if(*m_txDma.GetIsReg() & m_txDma.GetHtMask())
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*m_txDma.GetIfcReg() = m_txDma.GetHtMask();
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if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask())
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*m_txDma.GetIfcReg() = m_txDma.GetDmeMask();
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}
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} // namespace f4ll
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