usart_handler: DMA based memory copy
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parent
e8ab90c2b3
commit
ecd6c1d5d6
13 changed files with 367 additions and 408 deletions
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@ -4,19 +4,33 @@ Dma.MEMTOMEM.12.FIFOMode=DMA_FIFOMODE_ENABLE
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Dma.MEMTOMEM.12.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
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Dma.MEMTOMEM.12.Instance=DMA2_Stream4
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Dma.MEMTOMEM.12.MemBurst=DMA_MBURST_SINGLE
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Dma.MEMTOMEM.12.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.MEMTOMEM.12.MemInc=DMA_MINC_ENABLE
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Dma.MEMTOMEM.12.MemDataAlignment=DMA_MDATAALIGN_WORD
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Dma.MEMTOMEM.12.MemInc=DMA_MINC_DISABLE
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Dma.MEMTOMEM.12.Mode=DMA_NORMAL
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Dma.MEMTOMEM.12.PeriphBurst=DMA_PBURST_SINGLE
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Dma.MEMTOMEM.12.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.MEMTOMEM.12.PeriphDataAlignment=DMA_PDATAALIGN_WORD
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Dma.MEMTOMEM.12.PeriphInc=DMA_PINC_ENABLE
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Dma.MEMTOMEM.12.Priority=DMA_PRIORITY_LOW
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Dma.MEMTOMEM.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
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Dma.MEMTOMEM.13.Direction=DMA_MEMORY_TO_MEMORY
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Dma.MEMTOMEM.13.FIFOMode=DMA_FIFOMODE_ENABLE
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Dma.MEMTOMEM.13.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
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Dma.MEMTOMEM.13.Instance=DMA2_Stream0
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Dma.MEMTOMEM.13.MemBurst=DMA_MBURST_SINGLE
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Dma.MEMTOMEM.13.MemDataAlignment=DMA_MDATAALIGN_WORD
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Dma.MEMTOMEM.13.MemInc=DMA_MINC_ENABLE
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Dma.MEMTOMEM.13.Mode=DMA_NORMAL
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Dma.MEMTOMEM.13.PeriphBurst=DMA_PBURST_SINGLE
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Dma.MEMTOMEM.13.PeriphDataAlignment=DMA_PDATAALIGN_WORD
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Dma.MEMTOMEM.13.PeriphInc=DMA_PINC_ENABLE
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Dma.MEMTOMEM.13.Priority=DMA_PRIORITY_LOW
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Dma.MEMTOMEM.13.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
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Dma.Request0=UART4_RX
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Dma.Request1=UART4_TX
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Dma.Request10=USART6_RX
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Dma.Request11=USART6_TX
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Dma.Request12=MEMTOMEM
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Dma.Request13=MEMTOMEM
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Dma.Request2=USART3_RX
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Dma.Request3=USART3_TX
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Dma.Request4=UART5_RX
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@ -25,7 +39,7 @@ Dma.Request6=USART2_RX
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Dma.Request7=USART2_TX
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Dma.Request8=USART1_RX
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Dma.Request9=USART1_TX
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Dma.RequestsNb=13
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Dma.RequestsNb=14
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Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.UART4_RX.0.Instance=DMA1_Stream2
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@ -209,6 +223,7 @@ NVIC.DMA1_Stream4_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA1_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA2_Stream0_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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NVIC.DMA2_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.DMA2_Stream4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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