usart_handler: DMA based memory copy

This commit is contained in:
Attila Body 2019-10-01 14:49:10 +02:00
parent e8ab90c2b3
commit ecd6c1d5d6
13 changed files with 367 additions and 408 deletions

View file

@ -4,19 +4,33 @@ Dma.MEMTOMEM.12.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.12.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.12.Instance=DMA2_Stream4
Dma.MEMTOMEM.12.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.12.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.MEMTOMEM.12.MemInc=DMA_MINC_ENABLE
Dma.MEMTOMEM.12.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.12.MemInc=DMA_MINC_DISABLE
Dma.MEMTOMEM.12.Mode=DMA_NORMAL
Dma.MEMTOMEM.12.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.12.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.MEMTOMEM.12.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.12.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.12.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.12.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.MEMTOMEM.13.Direction=DMA_MEMORY_TO_MEMORY
Dma.MEMTOMEM.13.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.MEMTOMEM.13.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.MEMTOMEM.13.Instance=DMA2_Stream0
Dma.MEMTOMEM.13.MemBurst=DMA_MBURST_SINGLE
Dma.MEMTOMEM.13.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.MEMTOMEM.13.MemInc=DMA_MINC_ENABLE
Dma.MEMTOMEM.13.Mode=DMA_NORMAL
Dma.MEMTOMEM.13.PeriphBurst=DMA_PBURST_SINGLE
Dma.MEMTOMEM.13.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.MEMTOMEM.13.PeriphInc=DMA_PINC_ENABLE
Dma.MEMTOMEM.13.Priority=DMA_PRIORITY_LOW
Dma.MEMTOMEM.13.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
Dma.Request0=UART4_RX
Dma.Request1=UART4_TX
Dma.Request10=USART6_RX
Dma.Request11=USART6_TX
Dma.Request12=MEMTOMEM
Dma.Request13=MEMTOMEM
Dma.Request2=USART3_RX
Dma.Request3=USART3_TX
Dma.Request4=UART5_RX
@ -25,7 +39,7 @@ Dma.Request6=USART2_RX
Dma.Request7=USART2_TX
Dma.Request8=USART1_RX
Dma.Request9=USART1_TX
Dma.RequestsNb=13
Dma.RequestsNb=14
Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_RX.0.Instance=DMA1_Stream2
@ -209,6 +223,7 @@ NVIC.DMA1_Stream4_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA1_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream0_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.DMA2_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DMA2_Stream4_IRQn=true\:0\:0\:false\:false\:true\:true\:true