playground-stm32/f407ve_hs_uart
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

cleaning up

Browse source
This commit is contained in:
Attila Body 2019-11-19 23:31:48 +01:00
parent 491062cac6
commit c439c48643
9 changed files with 63 additions and 100 deletions
Download patch file Download diff file Expand all files Collapse all files

2
.cproject
View file

@ -158,6 +158,7 @@
<listOptionValue builtIn="false" value="DEBUG"/> <listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/> <listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/> <listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="ENABLE_DIAG"/>
</option> </option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.941145715" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath"> <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.941145715" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../Inc"/> <listOptionValue builtIn="false" value="../Inc"/>
@ -191,6 +192,7 @@
<listOptionValue builtIn="false" value="DEBUG"/> <listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/> <listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/> <listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="ENABLE_DIAG"/>
</option> </option>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.687772733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp"/> <inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.687772733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp"/>
</tool> </tool>

16
App/diag.h
View file

@ -8,7 +8,7 @@
#ifndef DIAG_H_ #ifndef DIAG_H_
#define DIAG_H_ #define DIAG_H_
#ifdef _ENABLE_DIAG #ifdef ENABLE_DIAG
#define DIAG_RX_BUFFER_SWITCH(x) \ #define DIAG_RX_BUFFER_SWITCH(x) \
if(x) { \ if(x) { \
LL_GPIO_SetOutputPin(LED0_GPIO_Port, LED0_Pin); \ LL_GPIO_SetOutputPin(LED0_GPIO_Port, LED0_Pin); \
@ -18,13 +18,13 @@ if(x) { \
LL_GPIO_SetOutputPin(LED1_GPIO_Port, LED1_Pin); \ LL_GPIO_SetOutputPin(LED1_GPIO_Port, LED1_Pin); \
} }
#define DIAG_INTERRUPT_IN() LL_GPIO_SetOutputPin(DEBUG0_GPIO_Port, DEBUG0_Pin) #define DIAG_INTERRUPT_IN() LL_GPIO_SetOutputPin(DBG0_GPIO_Port, DBG0_Pin)
#define DIAG_INTERRUPT_OUT() LL_GPIO_ResetOutputPin(DEBUG0_GPIO_Port, DEBUG0_Pin) #define DIAG_INTERRUPT_OUT() LL_GPIO_ResetOutputPin(DBG0_GPIO_Port, DBG0_Pin)
#define DIAG_CRC_CALC_START() LL_GPIO_SetOutputPin(DEBUG1_GPIO_Port, DEBUG1_Pin) #define DIAG_CRC_CALC_START() LL_GPIO_SetOutputPin(DBG1_GPIO_Port, DBG1_Pin)
#define DIAG_CRC_CALC_END() LL_GPIO_ResetOutputPin(DEBUG1_GPIO_Port, DEBUG1_Pin) #define DIAG_CRC_CALC_END() LL_GPIO_ResetOutputPin(DBG1_GPIO_Port, DBG1_Pin)
//#define DIAG_ERROR_EVENT() LL_GPIO_TogglePin(DEBUG2_GPIO_Port, DEBUG2_Pin) //#define DIAG_ERROR_EVENT() LL_GPIO_TogglePin(DBG2_GPIO_Port, DBG2_Pin)
#define DIAG_ENTER_BUSY() LL_GPIO_SetOutputPin(DEBUG2_GPIO_Port, DEBUG2_Pin) #define DIAG_ENTER_BUSY() LL_GPIO_SetOutputPin(DBG2_GPIO_Port, DBG2_Pin)
#define DIAG_EXIT_BUSY() LL_GPIO_ResetOutputPin(DEBUG2_GPIO_Port, DEBUG2_Pin) #define DIAG_EXIT_BUSY() LL_GPIO_ResetOutputPin(DBG2_GPIO_Port, DBG2_Pin)
#endif // _ENABLE_DIAG #endif // _ENABLE_DIAG

2
App/globals.c
View file

@ -7,7 +7,7 @@
#include "globals.h" #include "globals.h"
USARTSTATUS g_uartStatuses[USARTCOUNT]; struct usartstatus_t g_uartStatuses[USARTCOUNT];
struct crcstatus_t g_crcStatus; struct crcstatus_t g_crcStatus;

2
App/globals.h
View file

@ -14,7 +14,7 @@
#include "f4ll_c/dma_helper.h" #include "f4ll_c/dma_helper.h"
#include "f4ll_c/crc_handler.h" #include "f4ll_c/crc_handler.h"
extern USARTSTATUS g_uartStatuses[USARTCOUNT]; extern struct usartstatus_t g_uartStatuses[USARTCOUNT];
extern struct crcstatus_t g_crcStatus; extern struct crcstatus_t g_crcStatus;

10
Src/dma.c
View file

@ -138,9 +138,6 @@ void MX_DMA_Init(void)
/* DMA1_Stream6_IRQn interrupt configuration */ /* DMA1_Stream6_IRQn interrupt configuration */
NVIC_SetPriority(DMA1_Stream6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(DMA1_Stream6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(DMA1_Stream6_IRQn); NVIC_EnableIRQ(DMA1_Stream6_IRQn);
/* DMA2_Stream0_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(DMA2_Stream0_IRQn);
/* DMA2_Stream1_IRQn interrupt configuration */ /* DMA2_Stream1_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(DMA2_Stream1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(DMA2_Stream1_IRQn); NVIC_EnableIRQ(DMA2_Stream1_IRQn);
@ -153,14 +150,11 @@ void MX_DMA_Init(void)
/* DMA2_Stream4_IRQn interrupt configuration */ /* DMA2_Stream4_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_SetPriority(DMA2_Stream4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(DMA2_Stream4_IRQn); NVIC_EnableIRQ(DMA2_Stream4_IRQn);
/* DMA2_Stream5_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(DMA2_Stream5_IRQn);
/* DMA2_Stream6_IRQn interrupt configuration */ /* DMA2_Stream6_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_SetPriority(DMA2_Stream6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(DMA2_Stream6_IRQn); NVIC_EnableIRQ(DMA2_Stream6_IRQn);
/* DMA2_Stream7_IRQn interrupt configuration */ /* DMA2_Stream7_IRQn interrupt configuration */
NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(DMA2_Stream7_IRQn); NVIC_EnableIRQ(DMA2_Stream7_IRQn);
} }

21
components/f4ll_c/inc/crc_handler.h
View file

@ -16,15 +16,11 @@
#include "f4ll_c/dma_helper.h" #include "f4ll_c/dma_helper.h"
#ifndef CRCTASKCOUNT
#define CRCTASKCOUNT 2
#endif
struct crcslottask_t { struct crcslottask_t {
void * volatile address; void * volatile address;
uint16_t wordCount; uint16_t wordCount;
void (* volatile callback)(void*, uint32_t, uint8_t); void (*callback)(void*, uint32_t, uint8_t);
void * volatile callbackParam; void *callbackParam;
}; };
struct crcslotlistitem_t { struct crcslotlistitem_t {
@ -35,21 +31,20 @@ struct crcslotlistitem_t {
struct crcstatus_t { struct crcstatus_t {
DMAINFO dmaInfo; DMAINFO dmaInfo;
struct crcslotlistitem_t * volatile activeSlot; struct crcslotlistitem_t *activeSlot;
uint8_t volatile activeTask; uint8_t activeTask;
struct crcslotlistitem_t *first; struct crcslotlistitem_t *first;
}; };
void InitCrcStatus(struct crcstatus_t *status, DMA_TypeDef *dma, uint32_t stream); void InitCrcStatus(struct crcstatus_t *status, DMA_TypeDef *dma, uint32_t stream);
uint8_t GetActiveSlot(struct crcslotlistitem_t **slot_out, struct crcstatus_t *status); uint8_t GetActiveTask(struct crcslotlistitem_t **slot_out, struct crcstatus_t volatile *status);
static inline uint8_t IsSlotQueued(struct crcslotlistitem_t *slot, uint8_t task) { static inline uint8_t IsSlotQueued(struct crcslotlistitem_t volatile *slot, uint8_t task) {
return slot->tasks[task].address != NULL; return slot->tasks[task].address != NULL;
} }
static inline uint8_t IsSlotActive(struct crcslotlistitem_t *slot, uint8_t task) { static inline uint8_t IsSlotActive(struct crcslotlistitem_t volatile *slot, uint8_t task) {
return slot->tasks[task].callback != NULL || slot->tasks[task].callbackParam != NULL; return slot->tasks[task].callback != NULL || slot->tasks[task].callbackParam != NULL;
} }

37
components/f4ll_c/inc/usart_handler.h
View file

@ -12,28 +12,27 @@
#include "f4ll_c/dma_helper.h" #include "f4ll_c/dma_helper.h"
#include "f4ll_c/crc_handler.h" #include "f4ll_c/crc_handler.h"
struct _usart_status;
typedef struct _usart_status USARTSTATUS;
struct usart_buffer; struct usart_buffer;
struct usartstatus_t;
typedef void (*PACKETRECEIVEDCALLBACK)(void *userParam, struct usart_buffer *buffer); typedef void (*PACKETRECEIVEDCALLBACK)(void *userParam, struct usart_buffer *buffer);
void InitUartStatus( void InitUartStatus(
USARTSTATUS *st, USART_TypeDef *usart, DMA_TypeDef *dma, struct usartstatus_t *st, USART_TypeDef *usart, DMA_TypeDef *dma,
uint32_t stream_rx, uint32_t stream_tx, uint32_t stream_rx, uint32_t stream_tx,
struct crcstatus_t *crcStatus, struct crcstatus_t *crcStatus,
PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam); PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam);
uint8_t* GetTxBuffer(USARTSTATUS *status); uint8_t* GetTxBuffer(struct usartstatus_t *status);
uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue); uint8_t PostPacket(struct usartstatus_t *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue);
void SetupReceive(USARTSTATUS *status); void SetupReceive(struct usartstatus_t *status);
void SetupTransmit(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length); void SetupTransmit(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length);
void ConsumePacket(USARTSTATUS *status, uint8_t packetIndex); void ConsumePacket(struct usartstatus_t *status, uint8_t packetIndex);
void HandleUsartRxDmaIrq(USARTSTATUS *status); void HandleUsartRxDmaIrq(struct usartstatus_t *status);
void HandleUsartTxDmaIrq(USARTSTATUS *status); void HandleUsartTxDmaIrq(struct usartstatus_t *status);
void HandleUsartIrq(USARTSTATUS *status); void HandleUsartIrq(struct usartstatus_t *status);
/****************************************************************************************** /******************************************************************************************
* *
@ -55,30 +54,30 @@ struct usart_stats {
uint32_t skiped; uint32_t skiped;
}; };
typedef struct { struct usartpacketheader_t {
uint8_t startByte; uint8_t startByte;
uint8_t serial; uint8_t serial;
uint8_t payloadLength; uint8_t payloadLength;
uint8_t hash; uint8_t hash;
} USARTPACKETHEADER; };
typedef struct { struct usartpacket_t {
USARTPACKETHEADER header; struct usartpacketheader_t header;
//!!! should start on word offset !!! //!!! should start on word offset !!!
uint8_t payload[256+sizeof(uint32_t)]; // extra room for crc32 uint8_t payload[256+sizeof(uint32_t)]; // extra room for crc32
} __attribute__((aligned)) USARTPACKET; } __attribute__((aligned));
struct usart_buffer { struct usart_buffer {
USARTPACKET packet; struct usartpacket_t packet;
//transfer area ends here //transfer area ends here
volatile uint8_t busy; volatile uint8_t busy;
volatile uint8_t error; volatile uint8_t error;
uint16_t requestedLength; uint16_t requestedLength;
uint32_t errorInfo; uint32_t errorInfo;
USARTSTATUS *usartStatus; struct usartstatus_t *usartStatus;
}; };
struct _usart_status { struct usartstatus_t {
USART_TypeDef *usart; USART_TypeDef *usart;
DMAINFO rxDmaInfo; DMAINFO rxDmaInfo;
DMAINFO txDmaInfo; DMAINFO txDmaInfo;

49
components/f4ll_c/src/crc_handler.c
View file

@ -27,18 +27,6 @@
# define DIAG_INTERRUPT_OUT() # define DIAG_INTERRUPT_OUT()
#endif #endif
#define SLOTHITORYSIZE 8192
typedef struct crcstatus_t * CRCSTATUSPTR;
typedef struct crcslotlistitem_t * CRCSLOTPTR;
CRCSLOTPTR slot0History[SLOTHITORYSIZE];
CRCSLOTPTR slot1History[SLOTHITORYSIZE];
CRCSLOTPTR *slotHistoryPtrs[2] = { slot0History, slot1History };
uint32_t slotIndexes[2] = {0, 0};
uint32_t volatile spuriousCount = 0;
void InitCrcStatus(struct crcstatus_t *st, DMA_TypeDef *dma, uint32_t stream) void InitCrcStatus(struct crcstatus_t *st, DMA_TypeDef *dma, uint32_t stream)
{ {
InitDmaInfo(&st->dmaInfo, dma, stream); InitDmaInfo(&st->dmaInfo, dma, stream);
@ -62,7 +50,7 @@ void AttachCrcTask(struct crcstatus_t *status, struct crcslotlistitem_t *slot, s
__set_PRIMASK(prim); __set_PRIMASK(prim);
} }
uint8_t GetActiveSlot(struct crcslotlistitem_t **slot_out, struct crcstatus_t *status) uint8_t GetActiveTask(struct crcslotlistitem_t **slot_out, struct crcstatus_t volatile *status)
{ {
uint8_t ret; uint8_t ret;
@ -82,12 +70,11 @@ uint8_t EnqueueCrcTask(struct crcstatus_t *status, struct crcslotlistitem_t *slo
{ {
uint32_t prim = __get_PRIMASK(); uint32_t prim = __get_PRIMASK();
uint16_t need_start; uint16_t need_start;
struct crcstatus_t volatile *st = status;
LL_GPIO_SetOutputPin(DBG0_GPIO_Port, task ? DBG1_Pin : DBG0_Pin); while(st->activeSlot == slot && st->activeTask == task);
while(status->activeSlot == slot && status->activeTask == task);
__disable_irq(); __disable_irq();
need_start = (status->activeSlot == NULL); need_start = (st->activeSlot == NULL);
slot->tasks[task].address = need_start ? NULL : address; slot->tasks[task].address = need_start ? NULL : address;
slot->tasks[task].wordCount = (len+3)/4; slot->tasks[task].wordCount = (len+3)/4;
slot->tasks[task].callback = callback; slot->tasks[task].callback = callback;
@ -105,7 +92,6 @@ uint8_t EnqueueCrcTask(struct crcstatus_t *status, struct crcslotlistitem_t *slo
DIAG_CRC_CALC_START(); DIAG_CRC_CALC_START();
LL_DMA_EnableStream(status->dmaInfo.dma, status->dmaInfo.stream); LL_DMA_EnableStream(status->dmaInfo.dma, status->dmaInfo.stream);
} }
LL_GPIO_ResetOutputPin(DBG0_GPIO_Port, task ? DBG1_Pin : DBG0_Pin);
return need_start; return need_start;
} }
@ -114,7 +100,7 @@ void WaitCrcResults(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
struct crcslotlistitem_t *slotQueued; struct crcslotlistitem_t *slotQueued;
while(IsSlotQueued(slot, task)); while(IsSlotQueued(slot, task));
while(GetActiveSlot(&slotQueued, status) == task && slotQueued == slot); while(GetActiveTask(&slotQueued, status) == task && slotQueued == slot);
} }
@ -122,19 +108,19 @@ uint32_t ComputeCrc(struct crcstatus_t *status, struct crcslotlistitem_t *slot,
{ {
uint32_t result; uint32_t result;
EnqueueCrcTask(status, slot, task, address, len, NULL, &result); EnqueueCrcTask(status, slot, task, address, len, NULL, &result);
while(slot->tasks[task].callbackParam); while((struct crcslotlistitem_t volatile *)slot->tasks[task].callbackParam);
return result; return result;
} }
// only called from ISR context
static void StartNextCrcTask(struct crcstatus_t *status) static void StartNextCrcTask(struct crcstatus_t *status)
{ {
int stillMore; char moreTasks;
uint8_t index = 0; uint8_t index = 0;
do { do {
struct crcslotlistitem_t *slot = status->first; struct crcslotlistitem_t *slot = status->first;
stillMore = 0; moreTasks = 0;
while(slot) { while(slot) {
if(index < slot->count) { if(index < slot->count) {
if(slot->tasks[index].address) { if(slot->tasks[index].address) {
@ -148,28 +134,22 @@ static void StartNextCrcTask(struct crcstatus_t *status)
return; return;
} }
if(index + 1 < slot->count) if(index + 1 < slot->count)
stillMore = 1; moreTasks = 1;
} }
slot = slot->next; slot = slot->next;
} }
++index; ++index;
} while(stillMore); } while(moreTasks);
status->activeSlot = NULL; status->activeSlot = NULL;
} }
void HandleCrcDmaIrq(struct crcstatus_t *status) void HandleCrcDmaIrq(struct crcstatus_t *status)
{ {
LL_GPIO_SetOutputPin(DBG0_GPIO_Port, DBG2_Pin);
DIAG_INTERRUPT_IN(); DIAG_INTERRUPT_IN();
if(*status->dmaInfo.isReg & status->dmaInfo.tcMask) { // DMA transfer complete if(*status->dmaInfo.isReg & status->dmaInfo.tcMask) { // DMA transfer complete
*status->dmaInfo.ifcReg = status->dmaInfo.tcMask; *status->dmaInfo.ifcReg = status->dmaInfo.tcMask;
LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream); LL_DMA_DisableStream(status->dmaInfo.dma, status->dmaInfo.stream);
if(status->activeSlot) { if(status->activeSlot) {
// (slotHistoryPtrs[status->activeTask][slotIndexes[status->activeTask]++]) = status->activeSlot;
// while(slotIndexes[status->activeTask] >= SLOTHITORYSIZE);
struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask]; struct crcslottask_t *tsk = &status->activeSlot->tasks[status->activeTask];
if(tsk->callback) if(tsk->callback)
tsk->callback(tsk->callbackParam, CRC->DR, 1); tsk->callback(tsk->callbackParam, CRC->DR, 1);
@ -194,13 +174,6 @@ void HandleCrcDmaIrq(struct crcstatus_t *status)
StartNextCrcTask(status); StartNextCrcTask(status);
} }
} }
else
{
++spuriousCount;
}
DIAG_INTERRUPT_OUT(); DIAG_INTERRUPT_OUT();
LL_GPIO_ResetOutputPin(DBG0_GPIO_Port, DBG2_Pin);
} }

24
components/f4ll_c/src/usart_handler.c
View file

@ -31,7 +31,7 @@ static inline uint32_t RoundUpTo4(uint32_t inp)
} }
void InitUartStatus( void InitUartStatus(
USARTSTATUS *st, USART_TypeDef *usart, DMA_TypeDef *dma, struct usartstatus_t *st, USART_TypeDef *usart, DMA_TypeDef *dma,
uint32_t stream_rx, uint32_t stream_tx, uint32_t stream_rx, uint32_t stream_tx,
struct crcstatus_t *crcStatus, struct crcstatus_t *crcStatus,
PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam) PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam)
@ -80,7 +80,7 @@ void InitUartStatus(
} }
uint8_t* GetTxBuffer(USARTSTATUS *status) uint8_t* GetTxBuffer(struct usartstatus_t *status)
{ {
return status->txBuffer.packet.payload; return status->txBuffer.packet.payload;
} }
@ -97,13 +97,13 @@ static inline void BuildHeader(struct usart_buffer *buffer, uint8_t serial, uint
buffer->packet.header.hash = hash; buffer->packet.header.hash = hash;
} }
static inline uint8_t CheckHeader(USARTPACKET *packet) static inline uint8_t CheckHeader(struct usartpacket_t *packet)
{ {
return packet->header.startByte == STARTMARKER && (packet->header.startByte ^ packet->header.serial ^ packet->header.payloadLength) == packet->header.hash; return packet->header.startByte == STARTMARKER && (packet->header.startByte ^ packet->header.serial ^ packet->header.payloadLength) == packet->header.hash;
} }
uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue) uint8_t PostPacket(struct usartstatus_t *status, uint8_t const *payload, uint16_t length, struct crcstatus_t *crcStatus, uint8_t waitForCrcQueue)
{ {
// static uint32_t count = 0; // static uint32_t count = 0;
// ITM->PORT[1].u32 = count++; // ITM->PORT[1].u32 = count++;
@ -116,7 +116,7 @@ uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length,
uint16_t payloadLength = RoundUpTo4(length); uint16_t payloadLength = RoundUpTo4(length);
if(payload) if(payload)
memcpy(status->txBuffer.packet.payload, payload, length); memcpy(status->txBuffer.packet.payload, payload, length);
status->txBuffer.requestedLength = sizeof(USARTPACKETHEADER) + payloadLength + sizeof(uint32_t); // +4 for the hash status->txBuffer.requestedLength = sizeof(struct usartpacketheader_t) + payloadLength + sizeof(uint32_t); // +4 for the hash
status->txBuffer.busy = 1; status->txBuffer.busy = 1;
status->txBuffer.error = 0; status->txBuffer.error = 0;
EnqueueCrcTask(status->crcStatus, &status->crcSlot, 0, status->txBuffer.packet.payload, length, EnqueueCrcTask(status->crcStatus, &status->crcSlot, 0, status->txBuffer.packet.payload, length,
@ -129,7 +129,7 @@ uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length,
} }
void SetupReceive(USARTSTATUS *status) void SetupReceive(struct usartstatus_t *status)
{ {
uint8_t packetIndex = status->activeRxBuf; uint8_t packetIndex = status->activeRxBuf;
@ -143,7 +143,7 @@ void SetupReceive(USARTSTATUS *status)
} }
void ConsumePacket(USARTSTATUS *status, uint8_t packetIndex) void ConsumePacket(struct usartstatus_t *status, uint8_t packetIndex)
{ {
struct usart_buffer *buffer = &status->rxBuffers[packetIndex]; struct usart_buffer *buffer = &status->rxBuffers[packetIndex];
if(buffer->busy) { if(buffer->busy) {
@ -184,7 +184,7 @@ void RxCrcComputedCallback(void *callbackParm, uint32_t calculatedCrc, uint8_t s
ub->usartStatus->packetReceivedCallback(ub->usartStatus->packetReceivedCallbacParam, ub); ub->usartStatus->packetReceivedCallback(ub->usartStatus->packetReceivedCallbacParam, ub);
} }
void HandleUsartRxDmaIrq(USARTSTATUS *status) void HandleUsartRxDmaIrq(struct usartstatus_t *status)
{ {
DIAG_INTERRUPT_IN(); DIAG_INTERRUPT_IN();
StatsIncRcvd(&status->stats); StatsIncRcvd(&status->stats);
@ -213,7 +213,7 @@ void HandleUsartRxDmaIrq(USARTSTATUS *status)
DIAG_INTERRUPT_OUT(); DIAG_INTERRUPT_OUT();
} }
void HandleUsartTxDmaIrq(USARTSTATUS *status) void HandleUsartTxDmaIrq(struct usartstatus_t *status)
{ {
DIAG_INTERRUPT_IN(); DIAG_INTERRUPT_IN();
if(*status->txDmaInfo.isReg & status->txDmaInfo.tcMask) { // DMA transfer complete if(*status->txDmaInfo.isReg & status->txDmaInfo.tcMask) { // DMA transfer complete
@ -235,15 +235,15 @@ void HandleUsartTxDmaIrq(USARTSTATUS *status)
DIAG_INTERRUPT_OUT(); DIAG_INTERRUPT_OUT();
} }
void HandleUsartIrq(USARTSTATUS *status) void HandleUsartIrq(struct usartstatus_t *status)
{ {
DIAG_INTERRUPT_IN(); DIAG_INTERRUPT_IN();
if(LL_USART_IsActiveFlag_IDLE(status->usart) && LL_USART_IsEnabledIT_IDLE(status->usart)) { // receiver idle if(LL_USART_IsActiveFlag_IDLE(status->usart) && LL_USART_IsEnabledIT_IDLE(status->usart)) { // receiver idle
LL_USART_ClearFlag_IDLE(status->usart); LL_USART_ClearFlag_IDLE(status->usart);
uint16_t rcvdLen = status->rxBuffers[status->activeRxBuf].requestedLength - LL_DMA_GetDataLength(status->rxDmaInfo.dma, status->rxDmaInfo.stream); uint16_t rcvdLen = status->rxBuffers[status->activeRxBuf].requestedLength - LL_DMA_GetDataLength(status->rxDmaInfo.dma, status->rxDmaInfo.stream);
if(rcvdLen >= sizeof(USARTPACKETHEADER)) { if(rcvdLen >= sizeof(struct usartpacketheader_t)) {
if(CheckHeader(&status->rxBuffers[status->activeRxBuf].packet)) { if(CheckHeader(&status->rxBuffers[status->activeRxBuf].packet)) {
if(rcvdLen >= sizeof(USARTPACKETHEADER) + RoundUpTo4(status->rxBuffers[status->activeRxBuf].packet.header.payloadLength + 1) + sizeof(uint32_t)) if(rcvdLen >= sizeof(struct usartpacketheader_t) + RoundUpTo4(status->rxBuffers[status->activeRxBuf].packet.header.payloadLength + 1) + sizeof(uint32_t))
LL_DMA_DisableStream(status->rxDmaInfo.dma, status->rxDmaInfo.stream); LL_DMA_DisableStream(status->rxDmaInfo.dma, status->rxDmaInfo.stream);
else else
StatsIncPremature_payload(&status->stats); StatsIncPremature_payload(&status->stats);