tmp 3
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BD0C6214E68FB5CF
14 changed files with 398 additions and 399 deletions
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@ -24,16 +24,16 @@ private:
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console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx, uint32_t streamTx);
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// LL_UsartCore pure virtual function implementations
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virtual void ReceiverIdle(void);
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virtual void TransmissionComplete(void);
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virtual void FramingError(void);
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virtual void Overrun(void);
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virtual void RxDmaTransferComplete(void);
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virtual void RxDmaHalfTransfer(void);
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virtual void RxDmaError(dma_helper::DmaErrorType reason);
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virtual void TxDmaTransferComplete(void);
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virtual void TxDmaHalfTransfer(void);
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virtual void TxDmaError(dma_helper::DmaErrorType reason);
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virtual void receiver_idle(void);
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virtual void transmission_complete(void);
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virtual void framing_error(void);
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virtual void overrun(void);
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virtual void rx_dma_transfer_complete(void);
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virtual void rx_dma_half_transfer(void);
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virtual void rx_dma_error(dma_helper::dma_error_type reason);
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virtual void tx_dma_transfer_complete(void);
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virtual void tx_dma_half_transfer(void);
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virtual void tx_dma_error(dma_helper::dma_error_type reason);
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char m_buffer[128];
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uint16_t m_used = 0;
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@ -1,96 +1,90 @@
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/*
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* ll_crchandler.h
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* ll_crc_handler.h
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*
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* Created on: Oct 26, 2019
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* Author: compi
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*/
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#pragma once
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#ifndef LL_CRCHANDLER_H_
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#define LL_CRCHANDLER_H_
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#include <f4ll/dma_helper.h>
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#include <f4ll/singleton.h>
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#include <inttypes.h>
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#include <platform/dma_ll.h>
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extern "C" void _HandleCrcDmaIrq(void);
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namespace f4ll {
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class CrcHandler : public singleton<CrcHandler>
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class crc_handler : public singleton<crc_handler>
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{
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friend class singleton<CrcHandler>;
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friend class singleton<crc_handler>;
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public:
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struct ICallback
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struct icallback
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{
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virtual void CrcSucceeded(uintptr_t callbackParam, uint32_t crc, uint8_t task) = 0;
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virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, uint8_t task) = 0;
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virtual void crc_succeeded(uintptr_t callback_param, uint32_t crc, uint8_t task) = 0;
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virtual void crc_failed(uintptr_t callback_param, uint32_t crc, uint8_t task) = 0;
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};
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class SlotBase
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class slot_base
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{
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friend class CrcHandler;
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friend class crc_handler;
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public:
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struct CrcTask
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struct crc_task
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{
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void const *m_address; // changed to nullptr when execution starts
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uint16_t m_wordCount;
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ICallback *m_callback;
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uintptr_t m_callbackParam;
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uint16_t m_word_count;
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icallback *m_callback;
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uintptr_t m_callback_param;
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};
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private:
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SlotBase volatile *m_next = nullptr;
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uint8_t m_taskCount;
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slot_base volatile *m_next = nullptr;
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uint8_t m_task_count;
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virtual CrcTask volatile &operator[](int index) volatile = 0;
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virtual crc_task volatile &operator[](int index) volatile = 0;
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protected:
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SlotBase(unsigned int taskCount)
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: m_taskCount(taskCount)
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slot_base(unsigned int task_count)
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: m_task_count(task_count)
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{
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}
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SlotBase() = delete;
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SlotBase(SlotBase const &other) = delete;
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slot_base() = delete;
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slot_base(slot_base const &other) = delete;
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};
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template <uint8_t n> class Slot : public SlotBase
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template <uint8_t n> class slot : public slot_base
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{
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public:
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Slot()
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: SlotBase(n)
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slot()
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: slot_base(n)
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{
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}
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virtual CrcTask volatile &operator[](int index) volatile { return m_tasks[index]; }
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virtual crc_task volatile &operator[](int index) volatile { return m_tasks[index]; }
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private:
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Slot::CrcTask m_tasks[n];
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slot::crc_task m_tasks[n];
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};
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void AttachSlot(SlotBase &slot);
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bool Enqueue(SlotBase &slot, uint8_t task, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam);
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uint32_t Compute(SlotBase &slot, uint8_t task, void const *address, uint16_t len);
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void attach_slot(slot_base &slot);
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bool enqueue(slot_base &slot, uint8_t task, void const *address, uint16_t len, icallback *cb, uintptr_t cb_param);
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uint32_t compute(slot_base &slot, uint8_t task, void const *address, uint16_t len);
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bool IsActive(SlotBase &slot, uint8_t task) const;
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bool IsQueued(SlotBase &slot, uint8_t task) const;
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bool IsRunning(SlotBase &slot, uint8_t task) const;
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bool is_active(slot_base &slot, uint8_t task) const;
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bool is_queued(slot_base &slot, uint8_t task) const;
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bool is_running(slot_base &slot, uint8_t task) const;
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void DmaTransferCompleted(void);
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void dma_transfer_completed(void);
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private:
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CrcHandler(DMA_TypeDef *dma, uint32_t stream);
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crc_handler(DMA_TypeDef *dma, uint32_t stream);
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friend void ::_HandleCrcDmaIrq(void);
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void StartNextTask(void);
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void WaitResults(SlotBase &slot, uint8_t task) const;
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void start_next_task(void);
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void wait_results(slot_base &slot, uint8_t task) const;
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dma_helper m_dma;
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SlotBase volatile *m_firstSlot = nullptr;
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SlotBase volatile *m_activeSlot = nullptr;
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slot_base volatile *m_first_slot = nullptr;
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slot_base volatile *m_active_slot = nullptr;
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int volatile m_activeTask;
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};
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} // namespace f4ll
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#endif /* LL_CRCHANDLER_H_ */
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@ -19,40 +19,35 @@ public:
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dma_helper(DMA_TypeDef *dma, uint32_t stream);
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dma_helper(dma_helper const &base) = default;
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inline DMA_TypeDef *GetDma() const { return m_dma; }
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inline uint32_t GetStream() const { return m_stream; }
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inline volatile uint32_t *GetIsReg() const { return m_isReg; }
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inline volatile uint32_t *GetIfcReg() const { return m_ifcReg; }
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inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; }
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inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; }
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inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; }
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inline uint32_t GetHtMask() const { return m_HTMasks[m_stream]; }
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inline uint32_t GetTcMask() const { return m_TCMasks[m_stream]; }
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inline DMA_TypeDef *get_dma() const { return m_dma; }
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inline uint32_t get_stream() const { return m_stream; }
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inline volatile uint32_t *get_is_reg() const { return m_is_reg; }
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inline volatile uint32_t *get_ifc_reg() const { return m_ifc_reg; }
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inline uint32_t get_fe_mask() const { return m_fe_masks[m_stream]; }
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inline uint32_t get_dme_mask() const { return m_dme_masks[m_stream]; }
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inline uint32_t get_te_mask() const { return m_te_masks[m_stream]; }
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inline uint32_t get_ht_mask() const { return m_ht_masks[m_stream]; }
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inline uint32_t get_tc_mask() const { return m_tc_masks[m_stream]; }
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inline bool IsEnabledIt_HT() { return LL_DMA_IsEnabledIT_HT(m_dma, m_stream) != 0; }
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inline bool IsEnabledIt_TE() { return LL_DMA_IsEnabledIT_TE(m_dma, m_stream) != 0; }
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inline bool IsEnabledIt_TC() { return LL_DMA_IsEnabledIT_TC(m_dma, m_stream) != 0; }
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inline bool IsEnabledIt_DME() { return LL_DMA_IsEnabledIT_DME(m_dma, m_stream) != 0; }
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inline bool IsEnabledIt_FE() { return LL_DMA_IsEnabledIT_FE(m_dma, m_stream) != 0; }
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inline bool is_enabled_it_ht() { return LL_DMA_IsEnabledIT_HT(m_dma, m_stream) != 0; }
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inline bool is_enabled_it_te() { return LL_DMA_IsEnabledIT_TE(m_dma, m_stream) != 0; }
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inline bool is_enabled_it_tc() { return LL_DMA_IsEnabledIT_TC(m_dma, m_stream) != 0; }
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inline bool is_enabled_it_dme() { return LL_DMA_IsEnabledIT_DME(m_dma, m_stream) != 0; }
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inline bool is_enabled_it_fe() { return LL_DMA_IsEnabledIT_FE(m_dma, m_stream) != 0; }
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enum class DmaErrorType
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{
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Transfer,
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DirectMode,
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Fifo
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};
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enum class dma_error_type { transfer, direct_mode, fifo };
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private:
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DMA_TypeDef *m_dma;
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uint32_t m_stream;
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volatile uint32_t *m_isReg;
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volatile uint32_t *m_ifcReg;
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volatile uint32_t *m_is_reg;
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volatile uint32_t *m_ifc_reg;
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static const uint32_t m_FEMasks[8];
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static const uint32_t m_DMEMasks[8];
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static const uint32_t m_TEMasks[8];
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static const uint32_t m_HTMasks[8];
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static const uint32_t m_TCMasks[8];
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static const uint32_t m_fe_masks[8];
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static const uint32_t m_dme_masks[8];
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static const uint32_t m_te_masks[8];
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static const uint32_t m_ht_masks[8];
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static const uint32_t m_tc_masks[8];
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};
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} /* namespace f4ll */
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@ -4,27 +4,24 @@
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* Created on: Nov 4, 2019
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* Author: abody
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*/
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#pragma once
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#ifndef LL_MEMCPY_DMA_H_
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#define LL_MEMCPY_DMA_H_
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#include <f4ll/dma_helper.h>
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#include <f4ll/singleton.h>
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namespace f4ll {
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class MemcpyDma : public singleton<MemcpyDma>, private dma_helper
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class memcpy_dma : public singleton<memcpy_dma>, private dma_helper
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{
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friend class singleton<MemcpyDma>;
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friend class singleton<memcpy_dma>;
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public:
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void *Copy(void *dst, void const *src, uint16_t length);
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void DmaTransferCompleted();
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void *copy(void *dst, void const *src, uint16_t length);
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void dma_transfer_completed();
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private:
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MemcpyDma(DMA_TypeDef *dma, uint32_t stream);
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memcpy_dma(DMA_TypeDef *dma, uint32_t stream);
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bool volatile m_busy = false;
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};
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} /* namespace f4ll */
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#endif /* LL_MEMCPY_DMA_H_ */
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@ -15,7 +15,7 @@ namespace f4ll {
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struct DMAINFO;
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class PacketUsart : public CrcHandler::ICallback, public usart_core
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class PacketUsart : public crc_handler::icallback, public usart_core
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{
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// friend class UsartCore;
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public:
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@ -56,9 +56,9 @@ public:
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virtual bool PacketReceived(PacketUsart *caller, uintptr_t userParam, Packet const &packet) = 0;
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};
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// CRCHandler::ICallback interface functions
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virtual void CrcSucceeded(uintptr_t callbackParam, uint32_t crc, uint8_t task);
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virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, uint8_t task);
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// crc_handler::ICallback interface functions
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virtual void crc_succeeded(uintptr_t callbackParam, uint32_t crc, uint8_t task);
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virtual void crc_failed(uintptr_t callbackParam, uint32_t crc, uint8_t task);
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void PostPacket(uint8_t const *payload, uint8_t length, bool waitForCrcQueue = true);
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void SetupReceive(void);
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void SwitchRxBuffers(void);
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// UsartCore pure virtual function implementations
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virtual void ReceiverIdle(void);
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virtual void TransmissionComplete(void);
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virtual void FramingError(void);
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virtual void Overrun(void);
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virtual void RxDmaTransferComplete(void);
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virtual void RxDmaHalfTransfer(void);
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virtual void RxDmaError(dma_helper::DmaErrorType reason);
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virtual void TxDmaTransferComplete(void);
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virtual void TxDmaHalfTransfer(void);
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virtual void TxDmaError(dma_helper::DmaErrorType reason);
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virtual void receiver_idle(void);
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virtual void transmission_complete(void);
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virtual void framing_error(void);
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virtual void overrun(void);
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virtual void rx_dma_transfer_complete(void);
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virtual void rx_dma_half_transfer(void);
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virtual void rx_dma_error(dma_helper::dma_error_type reason);
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virtual void tx_dma_transfer_complete(void);
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virtual void tx_dma_half_transfer(void);
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virtual void tx_dma_error(dma_helper::dma_error_type reason);
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struct Buffer
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{
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@ -111,7 +111,7 @@ private:
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Stats m_stats;
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bool m_rxBufferSelector = false;
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CrcHandler::Slot<2> m_crcSlot;
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crc_handler::slot<2> m_crcSlot;
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IHsUsartCallback *m_userCallback = nullptr;
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uintptr_t m_userCallbackParam = 0;
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Buffer m_txBuffer;
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class usart_core
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{
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public:
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static inline void HandleUsartIrq(usart_core *_this) { _this->UsartIsr(); }
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static inline void HandleRxDmaIrq(usart_core *_this) { _this->RxDmaIsr(); }
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static inline void HandleTxDmaIrq(usart_core *_this) { _this->TxDmaIsr(); }
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static inline void usart_isr(usart_core *_this) { _this->usart_isr(); }
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static inline void rx_dma_isr(usart_core *_this) { _this->rx_dma_isr(); }
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static inline void tx_dma_isr(usart_core *_this) { _this->tx_dma_isr(); }
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void SetupTransmit(void const *buffer, uint16_t length);
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void SetupReceive(void *buffer, uint16_t length);
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void setup_transmit(void const *buffer, uint16_t length);
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void setup_receive(void *buffer, uint16_t length);
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protected:
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usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx, uint32_t streamTx);
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usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream_rx, uint32_t stream_tx);
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USART_TypeDef *m_usart;
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dma_helper m_rxDma;
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dma_helper m_txDma;
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dma_helper m_rx_dma;
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dma_helper m_tx_dma;
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private:
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virtual void ReceiverIdle(void) = 0;
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virtual void TransmissionComplete(void) = 0;
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virtual void FramingError(void) = 0;
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virtual void Overrun(void) = 0;
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virtual void receiver_idle(void) = 0;
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virtual void transmission_complete(void) = 0;
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virtual void framing_error(void) = 0;
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virtual void overrun(void) = 0;
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virtual void RxDmaTransferComplete(void) = 0;
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virtual void RxDmaHalfTransfer(void) = 0;
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virtual void RxDmaError(dma_helper::DmaErrorType reason) = 0;
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virtual void rx_dma_transfer_complete(void) = 0;
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virtual void rx_dma_half_transfer(void) = 0;
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virtual void rx_dma_error(dma_helper::dma_error_type reason) = 0;
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virtual void TxDmaTransferComplete(void) = 0;
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virtual void TxDmaHalfTransfer(void) = 0;
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virtual void TxDmaError(dma_helper::DmaErrorType reason) = 0;
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virtual void tx_dma_transfer_complete(void) = 0;
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virtual void tx_dma_half_transfer(void) = 0;
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virtual void tx_dma_error(dma_helper::dma_error_type reason) = 0;
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void UsartIsr();
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void RxDmaIsr();
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void TxDmaIsr();
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void usart_isr();
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void rx_dma_isr();
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void tx_dma_isr();
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};
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} /* namespace f4ll */
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