icf->ifc typo
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bdc796a8ce
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9ff4e76623
6 changed files with 14 additions and 14 deletions
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@ -15,7 +15,7 @@ volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream)
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return (stream < LL_DMA_STREAM_4) ? &DMA2->LISR : &DMA2->HISR;
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return (stream < LL_DMA_STREAM_4) ? &DMA2->LISR : &DMA2->HISR;
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}
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}
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volatile uint32_t* GetIcfReg(DMA_TypeDef *dma, uint32_t stream)
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volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream)
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{
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{
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if(dma == DMA1)
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if(dma == DMA1)
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return (stream < LL_DMA_STREAM_4) ? &DMA1->LIFCR : &DMA1->HIFCR;
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return (stream < LL_DMA_STREAM_4) ? &DMA1->LIFCR : &DMA1->HIFCR;
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@ -69,7 +69,7 @@ void InitDmaInfo(DMAINFO *info, DMA_TypeDef *dma, uint32_t stream)
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info->dma = dma;
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info->dma = dma;
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info->stream = stream;
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info->stream = stream;
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info->isReg = GetIsReg(dma, stream);
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info->isReg = GetIsReg(dma, stream);
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info->ifcReg = GetIcfReg(dma, stream);
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info->ifcReg = GetIfcReg(dma, stream);
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info->feMask = GetFeMask(stream);
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info->feMask = GetFeMask(stream);
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info->dmeMask = GetDmeMask(stream);
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info->dmeMask = GetDmeMask(stream);
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info->teMask = GetTeMask(stream);
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info->teMask = GetTeMask(stream);
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@ -23,7 +23,7 @@ typedef struct {
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} DMAINFO;
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} DMAINFO;
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volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream);
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volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream);
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volatile uint32_t* GetIcfReg(DMA_TypeDef *dma, uint32_t stream);
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volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream);
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uint32_t GetDmeMask(uint32_t stream);
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uint32_t GetDmeMask(uint32_t stream);
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uint32_t GetTeMask(uint32_t stream);
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uint32_t GetTeMask(uint32_t stream);
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uint32_t GetHtMask(uint32_t stream);
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uint32_t GetHtMask(uint32_t stream);
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@ -81,7 +81,7 @@ bool LL_CrcHandler::IsRunning(SlotBase &slot, uint8_t prio) const
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void LL_CrcHandler::DmaTransferCompleted(void)
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void LL_CrcHandler::DmaTransferCompleted(void)
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{
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{
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if(* m_dma.GetIsReg() & m_dma.GetTcMask()) { // DMA transfer complete
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if(* m_dma.GetIsReg() & m_dma.GetTcMask()) { // DMA transfer complete
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* m_dma.GetIcfReg() = m_dma.GetTcMask();
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* m_dma.GetIfcReg() = m_dma.GetTcMask();
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LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
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LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
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if(m_activeSlot) {
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if(m_activeSlot) {
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if((*m_activeSlot)[m_activePrio].m_callback)
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if((*m_activeSlot)[m_activePrio].m_callback)
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@ -91,7 +91,7 @@ void LL_CrcHandler::DmaTransferCompleted(void)
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}
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}
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}
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}
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else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
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else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
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*m_dma.GetIcfReg() = m_dma.GetTeMask();
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*m_dma.GetIfcReg() = m_dma.GetTeMask();
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LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
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LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
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if(m_activeSlot) {
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if(m_activeSlot) {
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if((*m_activeSlot)[m_activePrio].m_callback)
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if((*m_activeSlot)[m_activePrio].m_callback)
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@ -21,7 +21,7 @@ public:
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inline DMA_TypeDef* GetDma() const { return m_dma; }
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inline DMA_TypeDef* GetDma() const { return m_dma; }
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inline uint32_t GetStream() const { return m_stream; }
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inline uint32_t GetStream() const { return m_stream; }
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inline volatile uint32_t* GetIsReg() const { return m_isReg; }
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inline volatile uint32_t* GetIsReg() const { return m_isReg; }
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inline volatile uint32_t* GetIcfReg() const { return m_ifcReg; }
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inline volatile uint32_t* GetIfcReg() const { return m_ifcReg; }
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inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; }
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inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; }
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inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; }
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inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; }
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inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; }
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inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; }
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@ -176,7 +176,7 @@ void LL_HsUsart::RxDmaIrq()
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{
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{
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++m_stats.rcvd;
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++m_stats.rcvd;
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if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
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if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
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*m_rxDma.GetIcfReg() = m_rxDma.GetTcMask();
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*m_rxDma.GetIfcReg() = m_rxDma.GetTcMask();
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
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if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
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LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
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LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
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&m_rxBuffers[m_rxBufferSelector].packet,
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&m_rxBuffers[m_rxBufferSelector].packet,
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@ -187,7 +187,7 @@ void LL_HsUsart::RxDmaIrq()
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m_rxBuffers[m_rxBufferSelector].error = true;
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m_rxBuffers[m_rxBufferSelector].error = true;
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}
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}
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} else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
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} else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
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*m_rxDma.GetIcfReg() = m_rxDma.GetTeMask();
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*m_rxDma.GetIfcReg() = m_rxDma.GetTeMask();
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m_rxBuffers[m_rxBufferSelector].error = 1;
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m_rxBuffers[m_rxBufferSelector].error = 1;
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++m_stats.dmaError;
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++m_stats.dmaError;
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}
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}
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@ -229,21 +229,21 @@ void LL_HsUsart::CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio)
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void LL_HsUsart::TxDmaIrq()
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void LL_HsUsart::TxDmaIrq()
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{
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{
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if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
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if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
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*m_txDma.GetIcfReg() = m_txDma.GetTcMask();
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*m_txDma.GetIfcReg() = m_txDma.GetTcMask();
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LL_USART_EnableIT_TC(m_usart);
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LL_USART_EnableIT_TC(m_usart);
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LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
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LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
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}
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}
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else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
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else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
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*m_txDma.GetIcfReg() = m_txDma.GetTeMask();
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*m_txDma.GetIfcReg() = m_txDma.GetTeMask();
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m_txBuffer.error = 1;
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m_txBuffer.error = 1;
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++m_stats.dmaError;
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++m_stats.dmaError;
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}
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}
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if(*m_txDma.GetIsReg() & m_txDma.GetFeMask())
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if(*m_txDma.GetIsReg() & m_txDma.GetFeMask())
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*m_txDma.GetIcfReg() = m_txDma.GetFeMask();
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*m_txDma.GetIfcReg() = m_txDma.GetFeMask();
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if(*m_txDma.GetIsReg() & m_txDma.GetHtMask())
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if(*m_txDma.GetIsReg() & m_txDma.GetHtMask())
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*m_txDma.GetIcfReg() = m_txDma.GetHtMask();
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*m_txDma.GetIfcReg() = m_txDma.GetHtMask();
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if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask())
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if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask())
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*m_txDma.GetIcfReg() = m_txDma.GetDmeMask();
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*m_txDma.GetIfcReg() = m_txDma.GetDmeMask();
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}
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}
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@ -29,7 +29,7 @@ void* LL_MemcpyDma::Copy(void *dst, void const *src, uint16_t length)
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void LL_MemcpyDma::DmaTransferCompleted()
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void LL_MemcpyDma::DmaTransferCompleted()
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{
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{
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if(*GetIsReg() & GetTcMask()) { // DMA transfer complete
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if(*GetIsReg() & GetTcMask()) { // DMA transfer complete
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*GetIcfReg() = GetTcMask();
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*GetIfcReg() = GetTcMask();
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LL_DMA_DisableStream(GetDma(), GetStream());
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LL_DMA_DisableStream(GetDma(), GetStream());
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m_busy = 0;
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m_busy = 0;
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}
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}
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