icf->ifc typo

This commit is contained in:
Attila Body 2019-11-04 15:14:45 +01:00
parent bdc796a8ce
commit 9ff4e76623
6 changed files with 14 additions and 14 deletions

View file

@ -15,7 +15,7 @@ volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream)
return (stream < LL_DMA_STREAM_4) ? &DMA2->LISR : &DMA2->HISR; return (stream < LL_DMA_STREAM_4) ? &DMA2->LISR : &DMA2->HISR;
} }
volatile uint32_t* GetIcfReg(DMA_TypeDef *dma, uint32_t stream) volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream)
{ {
if(dma == DMA1) if(dma == DMA1)
return (stream < LL_DMA_STREAM_4) ? &DMA1->LIFCR : &DMA1->HIFCR; return (stream < LL_DMA_STREAM_4) ? &DMA1->LIFCR : &DMA1->HIFCR;
@ -69,7 +69,7 @@ void InitDmaInfo(DMAINFO *info, DMA_TypeDef *dma, uint32_t stream)
info->dma = dma; info->dma = dma;
info->stream = stream; info->stream = stream;
info->isReg = GetIsReg(dma, stream); info->isReg = GetIsReg(dma, stream);
info->ifcReg = GetIcfReg(dma, stream); info->ifcReg = GetIfcReg(dma, stream);
info->feMask = GetFeMask(stream); info->feMask = GetFeMask(stream);
info->dmeMask = GetDmeMask(stream); info->dmeMask = GetDmeMask(stream);
info->teMask = GetTeMask(stream); info->teMask = GetTeMask(stream);

View file

@ -23,7 +23,7 @@ typedef struct {
} DMAINFO; } DMAINFO;
volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream); volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream);
volatile uint32_t* GetIcfReg(DMA_TypeDef *dma, uint32_t stream); volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream);
uint32_t GetDmeMask(uint32_t stream); uint32_t GetDmeMask(uint32_t stream);
uint32_t GetTeMask(uint32_t stream); uint32_t GetTeMask(uint32_t stream);
uint32_t GetHtMask(uint32_t stream); uint32_t GetHtMask(uint32_t stream);

View file

@ -81,7 +81,7 @@ bool LL_CrcHandler::IsRunning(SlotBase &slot, uint8_t prio) const
void LL_CrcHandler::DmaTransferCompleted(void) void LL_CrcHandler::DmaTransferCompleted(void)
{ {
if(* m_dma.GetIsReg() & m_dma.GetTcMask()) { // DMA transfer complete if(* m_dma.GetIsReg() & m_dma.GetTcMask()) { // DMA transfer complete
* m_dma.GetIcfReg() = m_dma.GetTcMask(); * m_dma.GetIfcReg() = m_dma.GetTcMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream()); LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) { if(m_activeSlot) {
if((*m_activeSlot)[m_activePrio].m_callback) if((*m_activeSlot)[m_activePrio].m_callback)
@ -91,7 +91,7 @@ void LL_CrcHandler::DmaTransferCompleted(void)
} }
} }
else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
*m_dma.GetIcfReg() = m_dma.GetTeMask(); *m_dma.GetIfcReg() = m_dma.GetTeMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream()); LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) { if(m_activeSlot) {
if((*m_activeSlot)[m_activePrio].m_callback) if((*m_activeSlot)[m_activePrio].m_callback)

View file

@ -21,7 +21,7 @@ public:
inline DMA_TypeDef* GetDma() const { return m_dma; } inline DMA_TypeDef* GetDma() const { return m_dma; }
inline uint32_t GetStream() const { return m_stream; } inline uint32_t GetStream() const { return m_stream; }
inline volatile uint32_t* GetIsReg() const { return m_isReg; } inline volatile uint32_t* GetIsReg() const { return m_isReg; }
inline volatile uint32_t* GetIcfReg() const { return m_ifcReg; } inline volatile uint32_t* GetIfcReg() const { return m_ifcReg; }
inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; } inline uint32_t GetFeMask() const { return m_FEMasks[m_stream]; }
inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; } inline uint32_t GetDmeMask() const { return m_DMEMasks[m_stream]; }
inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; } inline uint32_t GetTeMask() const { return m_TEMasks[m_stream]; }

View file

@ -176,7 +176,7 @@ void LL_HsUsart::RxDmaIrq()
{ {
++m_stats.rcvd; ++m_stats.rcvd;
if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) { if(*m_rxDma.GetIsReg() & m_rxDma.GetTcMask()) {
*m_rxDma.GetIcfReg() = m_rxDma.GetTcMask(); *m_rxDma.GetIfcReg() = m_rxDma.GetTcMask();
if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header)) if(CheckHeader(m_rxBuffers[m_rxBufferSelector].packet.header))
LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1, LL_CrcHandler::Instance().Enqueue(m_crcSlot, 1,
&m_rxBuffers[m_rxBufferSelector].packet, &m_rxBuffers[m_rxBufferSelector].packet,
@ -187,7 +187,7 @@ void LL_HsUsart::RxDmaIrq()
m_rxBuffers[m_rxBufferSelector].error = true; m_rxBuffers[m_rxBufferSelector].error = true;
} }
} else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) { } else if(*m_rxDma.GetIsReg() & m_rxDma.GetTeMask()) {
*m_rxDma.GetIcfReg() = m_rxDma.GetTeMask(); *m_rxDma.GetIfcReg() = m_rxDma.GetTeMask();
m_rxBuffers[m_rxBufferSelector].error = 1; m_rxBuffers[m_rxBufferSelector].error = 1;
++m_stats.dmaError; ++m_stats.dmaError;
} }
@ -229,21 +229,21 @@ void LL_HsUsart::CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio)
void LL_HsUsart::TxDmaIrq() void LL_HsUsart::TxDmaIrq()
{ {
if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete if(*m_txDma.GetIsReg() & m_txDma.GetTcMask()) { // DMA transfer complete
*m_txDma.GetIcfReg() = m_txDma.GetTcMask(); *m_txDma.GetIfcReg() = m_txDma.GetTcMask();
LL_USART_EnableIT_TC(m_usart); LL_USART_EnableIT_TC(m_usart);
LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream()); LL_DMA_DisableStream(m_txDma.GetDma(), m_txDma.GetStream());
} }
else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) { else if(*m_txDma.GetIsReg() & m_txDma.GetTeMask()) {
*m_txDma.GetIcfReg() = m_txDma.GetTeMask(); *m_txDma.GetIfcReg() = m_txDma.GetTeMask();
m_txBuffer.error = 1; m_txBuffer.error = 1;
++m_stats.dmaError; ++m_stats.dmaError;
} }
if(*m_txDma.GetIsReg() & m_txDma.GetFeMask()) if(*m_txDma.GetIsReg() & m_txDma.GetFeMask())
*m_txDma.GetIcfReg() = m_txDma.GetFeMask(); *m_txDma.GetIfcReg() = m_txDma.GetFeMask();
if(*m_txDma.GetIsReg() & m_txDma.GetHtMask()) if(*m_txDma.GetIsReg() & m_txDma.GetHtMask())
*m_txDma.GetIcfReg() = m_txDma.GetHtMask(); *m_txDma.GetIfcReg() = m_txDma.GetHtMask();
if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask()) if(*m_txDma.GetIsReg() & m_txDma.GetDmeMask())
*m_txDma.GetIcfReg() = m_txDma.GetDmeMask(); *m_txDma.GetIfcReg() = m_txDma.GetDmeMask();
} }

View file

@ -29,7 +29,7 @@ void* LL_MemcpyDma::Copy(void *dst, void const *src, uint16_t length)
void LL_MemcpyDma::DmaTransferCompleted() void LL_MemcpyDma::DmaTransferCompleted()
{ {
if(*GetIsReg() & GetTcMask()) { // DMA transfer complete if(*GetIsReg() & GetTcMask()) { // DMA transfer complete
*GetIcfReg() = GetTcMask(); *GetIfcReg() = GetTcMask();
LL_DMA_DisableStream(GetDma(), GetStream()); LL_DMA_DisableStream(GetDma(), GetStream());
m_busy = 0; m_busy = 0;
} }