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New solution for CRC generator slots

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This commit is contained in:
Attila Body 2019-11-01 14:05:16 +01:00
parent 9670e6d397
commit 9dba241466
4 changed files with 55 additions and 54 deletions
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3
app/ll_testbed.cpp
View file

@ -76,7 +76,6 @@ void _PrintStats(char *buffer, uint8_t id, f4ll::LL_HsUsart &handler, USART_Type
} }
extern "C" void MainLoop() extern "C" void MainLoop()
{ {
uint8_t const text2Send[] __attribute__((aligned(4))) = uint8_t const text2Send[] __attribute__((aligned(4))) =
@ -85,7 +84,7 @@ extern "C" void MainLoop()
f4ll::LL_CrcHandler::Init(DMA2, LL_DMA_STREAM_4); f4ll::LL_CrcHandler::Init(DMA2, LL_DMA_STREAM_4);
f4ll::LL_CrcHandler::TSlot<2> slt; f4ll::LL_CrcHandler::Slot<2> slt;
f4ll::LL_HsUsart u1{USART1, DMA2, LL_DMA_STREAM_2, LL_DMA_STREAM_7}; f4ll::LL_HsUsart u1{USART1, DMA2, LL_DMA_STREAM_2, LL_DMA_STREAM_7};
f4ll::LL_HsUsart u2{ USART2, DMA1, LL_DMA_STREAM_5, LL_DMA_STREAM_6 }; f4ll::LL_HsUsart u2{ USART2, DMA1, LL_DMA_STREAM_5, LL_DMA_STREAM_6 };
f4ll::LL_HsUsart u3{ USART3, DMA1, LL_DMA_STREAM_1, LL_DMA_STREAM_3 }; f4ll::LL_HsUsart u3{ USART3, DMA1, LL_DMA_STREAM_1, LL_DMA_STREAM_3 };

62
lib/ll_crchandler.cpp
View file

@ -17,10 +17,10 @@ LL_CrcHandler::LL_CrcHandler(DMA_TypeDef *dma, uint32_t stream)
} }
void LL_CrcHandler::AttachSlot(Slot &slot) void LL_CrcHandler::AttachSlot(SlotBase &slot)
{ {
for(unsigned int i = 0; i < slot.m_taskCount; ++i ) { for(unsigned int i = 0; i < slot.m_taskCount; ++i ) {
auto &task(slot.m_tasks[i]); auto &task(slot[i]);
task.m_address = nullptr; task.m_address = nullptr;
task.m_wordCount = 0; task.m_wordCount = 0;
task.m_callback = nullptr; task.m_callback = nullptr;
@ -34,7 +34,7 @@ void LL_CrcHandler::AttachSlot(Slot &slot)
} }
bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam) bool LL_CrcHandler::Enqueue(SlotBase &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam)
{ {
uint32_t prim = __get_PRIMASK(); uint32_t prim = __get_PRIMASK();
bool immediate; bool immediate;
@ -44,10 +44,10 @@ bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint1
while(IsActive(slot,prio)); while(IsActive(slot,prio));
__disable_irq(); __disable_irq();
immediate = m_activeSlot == nullptr; immediate = m_activeSlot == nullptr;
slot.m_tasks[prio].m_address = (!immediate) ? address : nullptr; slot[prio].m_address = (!immediate) ? address : nullptr;
slot.m_tasks[prio].m_wordCount = (len+3)/4; slot[prio].m_wordCount = (len+3)/4;
slot.m_tasks[prio].m_callback = cb; slot[prio].m_callback = cb;
slot.m_tasks[prio].m_callbackParam = cbParam; slot[prio].m_callbackParam = cbParam;
if(immediate) { if(immediate) {
m_activeSlot = &slot; m_activeSlot = &slot;
m_activePrio = prio; m_activePrio = prio;
@ -63,19 +63,19 @@ bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint1
return immediate; return immediate;
} }
bool LL_CrcHandler::IsActive(Slot &slot, uint8_t prio) const bool LL_CrcHandler::IsActive(SlotBase &slot, uint8_t prio) const
{ {
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount != 0; return prio < slot.m_taskCount && slot[prio].m_wordCount != 0;
} }
bool LL_CrcHandler::IsQueued(Slot &slot, uint8_t prio) const bool LL_CrcHandler::IsQueued(SlotBase &slot, uint8_t prio) const
{ {
return prio < slot.m_taskCount && slot.m_tasks[prio].m_address != nullptr; return prio < slot.m_taskCount && slot[prio].m_address != nullptr;
} }
bool LL_CrcHandler::IsRunning(Slot &slot, uint8_t prio) const bool LL_CrcHandler::IsRunning(SlotBase &slot, uint8_t prio) const
{ {
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount && ! slot.m_tasks[prio].m_address; return prio < slot.m_taskCount && slot[prio].m_wordCount && ! slot[prio].m_address;
} }
void LL_CrcHandler::DmaTransferCompleted(void) void LL_CrcHandler::DmaTransferCompleted(void)
@ -84,25 +84,25 @@ void LL_CrcHandler::DmaTransferCompleted(void)
* m_dma.GetIcfReg() = m_dma.GetTcMask(); * m_dma.GetIcfReg() = m_dma.GetTcMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream()); LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) { if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback) if((*m_activeSlot)[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcSucceeded(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio); (*m_activeSlot)[m_activePrio].m_callback->CrcSucceeded((*m_activeSlot)[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) else if((*m_activeSlot)[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = CRC->DR; *reinterpret_cast<uint32_t*>((*m_activeSlot)[m_activePrio].m_callbackParam) = CRC->DR;
} }
} }
else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
*m_dma.GetIcfReg() = m_dma.GetTeMask(); *m_dma.GetIcfReg() = m_dma.GetTeMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream()); LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) { if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback) if((*m_activeSlot)[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcFailed(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio); (*m_activeSlot)[m_activePrio].m_callback->CrcFailed((*m_activeSlot)[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) else if((*m_activeSlot)[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = -1; *reinterpret_cast<uint32_t*>((*m_activeSlot)[m_activePrio].m_callbackParam) = -1;
} }
} }
m_activeSlot->m_tasks[m_activePrio].m_callback = nullptr; (*m_activeSlot)[m_activePrio].m_callback = nullptr;
m_activeSlot->m_tasks[m_activePrio].m_callbackParam = 0; (*m_activeSlot)[m_activePrio].m_callbackParam = 0;
m_activeSlot->m_tasks[m_activePrio].m_wordCount = 0; (*m_activeSlot)[m_activePrio].m_wordCount = 0;
StartNextTask(); StartNextTask();
} }
@ -112,18 +112,18 @@ void LL_CrcHandler::StartNextTask(void)
bool stillMore; bool stillMore;
int index = 0; int index = 0;
do { do {
Slot *slot = m_firstSlot; SlotBase *slot = m_firstSlot;
stillMore = false; stillMore = false;
while(slot) { while(slot) {
if(index < slot->m_taskCount) { if(index < slot->m_taskCount) {
if(slot->m_tasks[index].m_address) { if((*slot)[index].m_address) {
m_activeSlot = slot; m_activeSlot = slot;
m_activePrio = index; m_activePrio = index;
CRC->CR = 1; CRC->CR = 1;
LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), reinterpret_cast<uint32_t>(slot->m_tasks[index].m_address)); LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), reinterpret_cast<uint32_t>((*slot)[index].m_address));
LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), slot->m_tasks[index].m_wordCount); LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), (*slot)[index].m_wordCount);
LL_DMA_EnableStream(m_dma.GetDma(), m_dma.GetStream()); LL_DMA_EnableStream(m_dma.GetDma(), m_dma.GetStream());
slot->m_tasks[index].m_address = nullptr; // marking as started (*slot)[index].m_address = nullptr; // marking as started
return; return;
} }
if(index + 1 < slot->m_taskCount) if(index + 1 < slot->m_taskCount)
@ -137,7 +137,7 @@ void LL_CrcHandler::StartNextTask(void)
} }
void LL_CrcHandler::WaitResults(Slot &slot, uint8_t prio) const void LL_CrcHandler::WaitResults(SlotBase &slot, uint8_t prio) const
{ {
while(IsQueued(slot, prio)); while(IsQueued(slot, prio));
while(IsActive(slot, prio)); while(IsActive(slot, prio));
@ -145,7 +145,7 @@ void LL_CrcHandler::WaitResults(Slot &slot, uint8_t prio) const
uint32_t LL_CrcHandler::Compute( uint32_t LL_CrcHandler::Compute(
Slot &slot, uint8_t prio, void const *address, uint16_t len) SlotBase &slot, uint8_t prio, void const *address, uint16_t len)
{ {
uint32_t result; uint32_t result;
Enqueue(slot, prio, address, len, nullptr, reinterpret_cast<uintptr_t>(&result)); Enqueue(slot, prio, address, len, nullptr, reinterpret_cast<uintptr_t>(&result));

42
lib/ll_crchandler.h
View file

@ -27,44 +27,46 @@ public:
virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio) = 0; virtual void CrcFailed(uintptr_t callbackParam, uint32_t crc, int prio) = 0;
}; };
class Slot class SlotBase
{ {
friend class LL_CrcHandler; friend class LL_CrcHandler;
public: public:
struct CrcTask { struct CrcTask {
void const * volatile m_address; // changed to nullptr when execution starts void const * volatile m_address; // changed to nullptr when execution starts
uint16_t volatile m_wordCount; uint16_t volatile m_wordCount;
LL_CrcHandler::ICallback *m_callback; LL_CrcHandler::ICallback *m_callback;
uintptr_t m_callbackParam; uintptr_t m_callbackParam;
}; };
private: private:
Slot *m_next = nullptr; SlotBase *m_next = nullptr;
uint8_t m_taskCount; uint8_t m_taskCount;
CrcTask m_tasks[1]; virtual CrcTask& operator[](int index) = 0;
protected: protected:
Slot(unsigned int taskCount) : m_taskCount(taskCount) {} SlotBase(unsigned int taskCount) : m_taskCount(taskCount) {}
Slot() = delete; SlotBase() = delete;
Slot(Slot const &other) = delete; SlotBase(SlotBase const &other) = delete;
}; };
// DON't try this at home! we "extend" LL_CrcHandler::m_tasks this way // DON't try this at home! we "extend" LL_CrcHandler::m_tasks this way
template <uint8_t n> class TSlot : public Slot template <uint8_t n> class Slot : public SlotBase
{ {
public: public:
TSlot() : Slot(n) {} Slot() : SlotBase(n) {}
virtual CrcTask& operator[](int index) { return m_tasks[index]; }
private: private:
TSlot::CrcTask _m_tasks[n-1]; Slot::CrcTask m_tasks[n];
}; };
void AttachSlot(Slot &slot); void AttachSlot(SlotBase &slot);
bool Enqueue(Slot &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam); bool Enqueue(SlotBase &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam);
uint32_t Compute(Slot &slot, uint8_t prio, void const *address, uint16_t len); uint32_t Compute(SlotBase &slot, uint8_t prio, void const *address, uint16_t len);
bool IsActive(Slot &slot, uint8_t prio) const; bool IsActive(SlotBase &slot, uint8_t prio) const;
bool IsQueued(Slot &slot, uint8_t prio) const; bool IsQueued(SlotBase &slot, uint8_t prio) const;
bool IsRunning(Slot &slot, uint8_t prio) const; bool IsRunning(SlotBase &slot, uint8_t prio) const;
private: private:
@ -73,11 +75,11 @@ private:
friend void ::_HandleCrcDmaIrq(void); friend void ::_HandleCrcDmaIrq(void);
void DmaTransferCompleted(void); void DmaTransferCompleted(void);
void StartNextTask(void); void StartNextTask(void);
void WaitResults(Slot &slot, uint8_t prio) const; void WaitResults(SlotBase &slot, uint8_t prio) const;
LL_DmaHelper m_dma; LL_DmaHelper m_dma;
Slot * volatile m_firstSlot = nullptr; SlotBase * volatile m_firstSlot = nullptr;
Slot * volatile m_activeSlot = nullptr; SlotBase * volatile m_activeSlot = nullptr;
int volatile m_activePrio; int volatile m_activePrio;
}; };

2
lib/ll_hsusart.h
View file

@ -101,7 +101,7 @@ private:
Stats m_stats; Stats m_stats;
bool m_rxBufferSelector = false; bool m_rxBufferSelector = false;
LL_CrcHandler::TSlot<2> m_crcSlot; LL_CrcHandler::Slot<2> m_crcSlot;
IHsUsartCallback *m_userCallback = nullptr; IHsUsartCallback *m_userCallback = nullptr;
uintptr_t m_userCallbackParam = 0; uintptr_t m_userCallbackParam = 0;
Buffer m_txBuffer; Buffer m_txBuffer;