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New solution for CRC generator slots

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This commit is contained in:
Attila Body 2019-11-01 14:05:16 +01:00
parent 9670e6d397
commit 9dba241466
4 changed files with 55 additions and 54 deletions
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62
lib/ll_crchandler.cpp
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@ -17,10 +17,10 @@ LL_CrcHandler::LL_CrcHandler(DMA_TypeDef *dma, uint32_t stream)
}
void LL_CrcHandler::AttachSlot(Slot &slot)
void LL_CrcHandler::AttachSlot(SlotBase &slot)
{
for(unsigned int i = 0; i < slot.m_taskCount; ++i ) {
auto &task(slot.m_tasks[i]);
auto &task(slot[i]);
task.m_address = nullptr;
task.m_wordCount = 0;
task.m_callback = nullptr;
@ -34,7 +34,7 @@ void LL_CrcHandler::AttachSlot(Slot &slot)
}
bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam)
bool LL_CrcHandler::Enqueue(SlotBase &slot, uint8_t prio, void const *address, uint16_t len, ICallback *cb, uintptr_t cbParam)
{
uint32_t prim = __get_PRIMASK();
bool immediate;
@ -44,10 +44,10 @@ bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint1
while(IsActive(slot,prio));
__disable_irq();
immediate = m_activeSlot == nullptr;
slot.m_tasks[prio].m_address = (!immediate) ? address : nullptr;
slot.m_tasks[prio].m_wordCount = (len+3)/4;
slot.m_tasks[prio].m_callback = cb;
slot.m_tasks[prio].m_callbackParam = cbParam;
slot[prio].m_address = (!immediate) ? address : nullptr;
slot[prio].m_wordCount = (len+3)/4;
slot[prio].m_callback = cb;
slot[prio].m_callbackParam = cbParam;
if(immediate) {
m_activeSlot = &slot;
m_activePrio = prio;
@ -63,19 +63,19 @@ bool LL_CrcHandler::Enqueue(Slot &slot, uint8_t prio, void const *address, uint1
return immediate;
}
bool LL_CrcHandler::IsActive(Slot &slot, uint8_t prio) const
bool LL_CrcHandler::IsActive(SlotBase &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount != 0;
return prio < slot.m_taskCount && slot[prio].m_wordCount != 0;
}
bool LL_CrcHandler::IsQueued(Slot &slot, uint8_t prio) const
bool LL_CrcHandler::IsQueued(SlotBase &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_address != nullptr;
return prio < slot.m_taskCount && slot[prio].m_address != nullptr;
}
bool LL_CrcHandler::IsRunning(Slot &slot, uint8_t prio) const
bool LL_CrcHandler::IsRunning(SlotBase &slot, uint8_t prio) const
{
return prio < slot.m_taskCount && slot.m_tasks[prio].m_wordCount && ! slot.m_tasks[prio].m_address;
return prio < slot.m_taskCount && slot[prio].m_wordCount && ! slot[prio].m_address;
}
void LL_CrcHandler::DmaTransferCompleted(void)
@ -84,25 +84,25 @@ void LL_CrcHandler::DmaTransferCompleted(void)
* m_dma.GetIcfReg() = m_dma.GetTcMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcSucceeded(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = CRC->DR;
if((*m_activeSlot)[m_activePrio].m_callback)
(*m_activeSlot)[m_activePrio].m_callback->CrcSucceeded((*m_activeSlot)[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if((*m_activeSlot)[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>((*m_activeSlot)[m_activePrio].m_callbackParam) = CRC->DR;
}
}
else if(*m_dma.GetIsReg() & m_dma.GetTeMask()) { // DMA transfer error
*m_dma.GetIcfReg() = m_dma.GetTeMask();
LL_DMA_DisableStream(m_dma.GetDma(), m_dma.GetStream());
if(m_activeSlot) {
if(m_activeSlot->m_tasks[m_activePrio].m_callback)
m_activeSlot->m_tasks[m_activePrio].m_callback->CrcFailed(m_activeSlot->m_tasks[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if(m_activeSlot->m_tasks[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>(m_activeSlot->m_tasks[m_activePrio].m_callbackParam) = -1;
if((*m_activeSlot)[m_activePrio].m_callback)
(*m_activeSlot)[m_activePrio].m_callback->CrcFailed((*m_activeSlot)[m_activePrio].m_callbackParam, CRC->DR, m_activePrio);
else if((*m_activeSlot)[m_activePrio].m_callbackParam)
*reinterpret_cast<uint32_t*>((*m_activeSlot)[m_activePrio].m_callbackParam) = -1;
}
}
m_activeSlot->m_tasks[m_activePrio].m_callback = nullptr;
m_activeSlot->m_tasks[m_activePrio].m_callbackParam = 0;
m_activeSlot->m_tasks[m_activePrio].m_wordCount = 0;
(*m_activeSlot)[m_activePrio].m_callback = nullptr;
(*m_activeSlot)[m_activePrio].m_callbackParam = 0;
(*m_activeSlot)[m_activePrio].m_wordCount = 0;
StartNextTask();
}
@ -112,18 +112,18 @@ void LL_CrcHandler::StartNextTask(void)
bool stillMore;
int index = 0;
do {
Slot *slot = m_firstSlot;
SlotBase *slot = m_firstSlot;
stillMore = false;
while(slot) {
if(index < slot->m_taskCount) {
if(slot->m_tasks[index].m_address) {
if((*slot)[index].m_address) {
m_activeSlot = slot;
m_activePrio = index;
CRC->CR = 1;
LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), reinterpret_cast<uint32_t>(slot->m_tasks[index].m_address));
LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), slot->m_tasks[index].m_wordCount);
LL_DMA_SetM2MSrcAddress(m_dma.GetDma(), m_dma.GetStream(), reinterpret_cast<uint32_t>((*slot)[index].m_address));
LL_DMA_SetDataLength(m_dma.GetDma(), m_dma.GetStream(), (*slot)[index].m_wordCount);
LL_DMA_EnableStream(m_dma.GetDma(), m_dma.GetStream());
slot->m_tasks[index].m_address = nullptr; // marking as started
(*slot)[index].m_address = nullptr; // marking as started
return;
}
if(index + 1 < slot->m_taskCount)
@ -137,7 +137,7 @@ void LL_CrcHandler::StartNextTask(void)
}
void LL_CrcHandler::WaitResults(Slot &slot, uint8_t prio) const
void LL_CrcHandler::WaitResults(SlotBase &slot, uint8_t prio) const
{
while(IsQueued(slot, prio));
while(IsActive(slot, prio));
@ -145,7 +145,7 @@ void LL_CrcHandler::WaitResults(Slot &slot, uint8_t prio) const
uint32_t LL_CrcHandler::Compute(
Slot &slot, uint8_t prio, void const *address, uint16_t len)
SlotBase &slot, uint8_t prio, void const *address, uint16_t len)
{
uint32_t result;
Enqueue(slot, prio, address, len, nullptr, reinterpret_cast<uintptr_t>(&result));