Convert the project to CMake

f4ll revamp

components/app/CMakeLists.txt

@@ -0,0 +1,11 @@
+add_library(app STATIC
+    src/application.cpp
+    src/globals.cpp
+    src/irq_bridge.cpp
+)
+
+target_include_directories(app PUBLIC
+    ${CMAKE_CURRENT_SOURCE_DIR}/inc
+)
+
+target_link_libraries(app PUBLIC stm32cubemx platform f4ll)

components/app/inc/application.h

@@ -0,0 +1,23 @@
+/*
+ * app.h
+ *
+ *  Created on: Aug 29, 2019
+ *      Author: abody
+ */
+
+#ifndef APP_H_
+#define APP_H_
+
+#include <inttypes.h>
+#include "main.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void MainLoop();
+
+#ifdef __cplusplus
+}	//	extern "C" {
+#endif	//	__cplusplus
+#endif /* APP_H_ */

components/app/inc/config.h

@@ -0,0 +1,27 @@
+/*
+ * config.h
+ *
+ *  Created on: Sep 24, 2019
+ *      Author: abody
+ */
+
+#ifndef CONFIG_H_
+#define CONFIG_H_
+
+#define USARTCOUNT 4
+#define CRCTASKCOUNT (USARTCOUNT * 2)
+#define USART1_OFFSET 0
+#define USART2_OFFSET 1
+#define USART3_OFFSET 2
+#define USART6_OFFSET 3
+
+#define CONSOLE_DMA_ENGINE DMA1
+#define CONSOLE_TX_DMA_STREAM LL_DMA_STREAM_4
+
+#define CRC_DMA_ENGINE DMA2
+#define CRC_DMA_STREAM LL_DMA_STREAM_4
+
+#define MEMCPY_DMA_ENGINE DMA2
+#define MEMCPY_DMA_STREAM LL_DMA_STREAM_3
+
+#endif /* CONFIG_H_ */

components/app/inc/diag.h

@@ -0,0 +1,63 @@
+/*
+ * diag.h
+ *
+ *  Created on: Sep 16, 2019
+ *      Author: abody
+ */
+
+#ifndef DIAG_H_
+#define DIAG_H_
+
+#ifdef ENABLE_DIAG
+#define DIAG_RX_BUFFER_SWITCH(x) \
+if(x) { \
+	LL_GPIO_SetOutputPin(LED0_GPIO_Port, LED0_Pin); \
+	LL_GPIO_ResetOutputPin(LED1_GPIO_Port, LED1_Pin); \
+} else { \
+	LL_GPIO_ResetOutputPin(LED0_GPIO_Port, LED0_Pin); \
+	LL_GPIO_SetOutputPin(LED1_GPIO_Port, LED1_Pin); \
+}
+
+#define DIAG_INTERRUPT_IN() LL_GPIO_SetOutputPin(DBG0_GPIO_Port, DBG0_Pin)
+#define DIAG_INTERRUPT_OUT() LL_GPIO_ResetOutputPin(DBG0_GPIO_Port, DBG0_Pin)
+#define DIAG_CRC_CALC_START() LL_GPIO_SetOutputPin(DBG1_GPIO_Port, DBG1_Pin)
+#define DIAG_CRC_CALC_END() LL_GPIO_ResetOutputPin(DBG1_GPIO_Port, DBG1_Pin)
+//#define DIAG_ERROR_EVENT() LL_GPIO_TogglePin(DBG2_GPIO_Port, DBG2_Pin)
+#define DIAG_ENTER_BUSY() LL_GPIO_SetOutputPin(DBG2_GPIO_Port, DBG2_Pin)
+#define DIAG_EXIT_BUSY() LL_GPIO_ResetOutputPin(DBG2_GPIO_Port, DBG2_Pin)
+
+#endif	//	_ENABLE_DIAG
+
+#ifndef DIAG_RX_BUFFER_SWITCH
+#	define DIAG_RX_BUFFER_SWITCH(x)
+#endif
+
+#ifndef DIAG_CRC_CALC_START
+#	define DIAG_CRC_CALC_START()
+#endif
+
+#ifndef DIAG_CRC_CALC_END
+#	define DIAG_CRC_CALC_END()
+#endif
+
+#ifndef DIAG_INTERRUPT_IN
+#	define DIAG_INTERRUPT_IN()
+#endif
+
+#ifndef DIAG_INTERRUPT_OUT
+#	define DIAG_INTERRUPT_OUT()
+#endif
+
+#ifndef DIAG_ERROR_EVENT
+#	define DIAG_ERROR_EVENT()
+#endif
+
+#ifndef DIAG_ENTER_BUSY
+#	define DIAG_ENTER_BUSY()
+#endif
+
+#ifndef DIAG_EXIT_BUSY
+#	define DIAG_EXIT_BUSY()
+#endif
+
+#endif /* DIAG_H_ */

components/app/inc/globals.h

@@ -0,0 +1,15 @@
+/*
+ * globals.h
+ *
+ *  Created on: Aug 29, 2019
+ *      Author: abody
+ */
+
+#pragma once
+
+#include <config.h>
+#include <f4ll/packet_usart.h>
+#include <inttypes.h>
+
+extern f4ll::packet_usart *g_usarts[USARTCOUNT];
+extern uint8_t g_statsBuf[256];

components/app/inc/irq_bridge.h

@@ -0,0 +1,32 @@
+#pragma once
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+void usart1_rx_dma_isr(void);
+void usart1_tx_dma_isr(void);
+void usart1_isr(void);
+
+void usart2_rx_dma_isr(void);
+void usart2_tx_dma_isr(void);
+void usart2_isr(void);
+
+void usart3_rx_dma_isr(void);
+void usart3_tx_dma_isr(void);
+void usart3_isr(void);
+
+void usart4_rx_dma_isr(void); //  console
+void usart4_tx_dma_isr(void); //  console
+void usart4_isr(void);
+
+void usart6_rx_dma_isr(void); //  console
+void usart6_tx_dma_isr(void); //  console
+void usart6_isr(void);
+
+void m2m1_dma_isr(void); //  m2mcpy
+void m2m2_dma_isr(void); //  crc
+
+#if defined(__cplusplus)
+}
+#endif

components/app/src/application.cpp

@@ -0,0 +1,109 @@
+/*
+ * ll_testbed.cpp
+ *
+ *  Created on: Oct 28, 2019
+ *      Author: abody
+ */
+#ifdef USE_CPLUSPLUS
+
+#include "f4ll/consolehandler.h"
+#include "f4ll/crc_handler.h"
+#include "f4ll/irqlock.h"
+#include "f4ll/memcpydma.h"
+#include "f4ll/packetusart.h"
+#include "f4ll/strutil.h"
+#include <stdlib.h>
+#include <string.h>
+
+extern "C" {
+	#include "main.h"
+	#include "globals.h"
+	#include "config.h"
+}
+#include "globals_cpp.h"
+
+#define PACKAGE_DELAY_MS 0
+#define STATS_DELAY_MS 1000
+
+
+#define ADDINFO(b,s,u) \
+	b += strcpy_ex(b,s); \
+	b += uitodec(b,u);
+
+extern "C" void MainLoop()
+{
+	uint8_t const text2Send[]  __attribute__((aligned(16))) =
+			"Megszentsegtelenithetetlensegeskedeseitekert\r\n"
+			"--------------------------------------------\r\n\0\0\0";
+
+
+	f4ll::MemcpyDma::Init(MEMCPY_DMA_ENGINE, MEMCPY_DMA_STREAM);
+    f4ll::crc_handler::Init(DMA2, LL_DMA_STREAM_4);
+    f4ll::ConsoleHandler::Init(UART4, CONSOLE_DMA_ENGINE, 0u, CONSOLE_TX_DMA_STREAM);
+
+	f4ll::PacketUsart u1{ USART1, DMA2, LL_DMA_STREAM_2, LL_DMA_STREAM_7 };
+	f4ll::PacketUsart u2{ USART2, DMA1, LL_DMA_STREAM_5, LL_DMA_STREAM_6 };
+	f4ll::PacketUsart u3{ USART3, DMA1, LL_DMA_STREAM_1, LL_DMA_STREAM_3 };
+	f4ll::PacketUsart u6{ USART6, DMA2, LL_DMA_STREAM_1, LL_DMA_STREAM_6 };
+
+	f4ll::PacketUsart * usarts[] = { &u1, &u2, &u3, &u6 };
+	f4ll::PacketUsart **dst = g_usarts;
+	for(auto usart: usarts)
+		*dst++ = usart;
+
+	uint32_t lastStatsTick = 0;
+	uint32_t prevSentTick = 0;
+	uint8_t	statId = 0;
+
+	uint32_t	tmp = sizeof(text2Send) - 1;
+	uint32_t	randmask = 0x80000000;
+
+	do {
+		if(randmask & tmp)
+			break;
+	} while((randmask = randmask >> 1));
+	--randmask;
+
+	lastStatsTick = HAL_GetTick();
+
+	for(auto u : g_usarts)
+		u->SetupReceive();
+
+	for(;;) {
+		uint32_t tick = HAL_GetTick();
+		bool send = PACKAGE_DELAY_MS ? (tick - prevSentTick > PACKAGE_DELAY_MS) : 1;
+
+		if(send)
+			prevSentTick += PACKAGE_DELAY_MS;
+
+		for(auto u : g_usarts) {
+			if(!u->IsTxBusy() && send) {
+				//DIAG_ENTER_BUSY();
+				auto len = sizeof(text2Send) - 1 - (rand() & randmask);
+				f4ll::MemcpyDma::Instance().Copy(u->GetTxPacketBuffer(), text2Send, len);
+				u->PostPacket(nullptr, len);
+				//DIAG_EXIT_BUSY();
+			}
+			for(uint16_t rIdx = 0; rIdx < 2; ++rIdx)
+				if(u->IsRxBusy((bool)rIdx) || u->IsRxFailed(rIdx)) {
+					u->GetRxPacketBuffer(rIdx);
+					// ...
+					u->RxProcessed((bool)rIdx);
+				}
+		}
+		if(tick - lastStatsTick > STATS_DELAY_MS) {
+			f4ll::ConsoleHandler::Instance().PrintStats(statId, *g_usarts[statId]);
+			lastStatsTick += STATS_DELAY_MS;
+			++statId;
+			if(statId >= sizeof(g_usarts) / sizeof(g_usarts[0]))
+				statId = 0;
+		}
+//		uint32_t ein = LL_GPIO_ReadInputPort(KEY1_GPIO_Port);
+//		if(!(ein & KEY1_Pin)) {
+//			void (*fptr)(void) = (void (*)(void))(void*)0xa0000000;
+//			fptr();
+//		}
+	}
+}
+
+#endif	//	USE_CPLUSPLUS

components/app/src/globals.cpp

@@ -0,0 +1,15 @@
+/*
+ * globals_cpp.cpp
+ *
+ *  Created on: Nov 4, 2019
+ *      Author: abody
+ */
+#include "globals.h"
+#include "config.h"
+
+#include <f4ll/memcpy_dma.h>
+#include <f4ll/packet_usart.h>
+
+f4ll::packet_usart *g_usarts[USARTCOUNT];
+
+uint8_t g_statsBuf[256];

components/app/src/irq_bridge.cpp

@@ -0,0 +1,87 @@
+#include <f4ll/console_handler.h>
+#include <f4ll/crc_handler.h>
+#include <f4ll/memcpy_dma.h>
+
+#include <config.h>
+#include <globals.h>
+#include <irq_bridge.h>
+
+void usart1_rx_dma_isr(void)
+{
+    f4ll::packet_usart::rx_dma_isr(g_usarts[USART1_OFFSET]);
+}
+
+void usart1_tx_dma_isr(void)
+{
+    f4ll::packet_usart::tx_dma_isr(g_usarts[USART1_OFFSET]);
+}
+void usart1_isr(void)
+{
+    f4ll::packet_usart::usart_isr(g_usarts[USART1_OFFSET]);
+}
+
+//
+void usart2_rx_dma_isr(void)
+{
+    f4ll::packet_usart::rx_dma_isr(g_usarts[USART2_OFFSET]);
+}
+
+void usart2_tx_dma_isr(void)
+{
+    f4ll::packet_usart::tx_dma_isr(g_usarts[USART2_OFFSET]);
+}
+void usart2_isr(void)
+{
+    f4ll::packet_usart::usart_isr(g_usarts[USART2_OFFSET]);
+}
+
+//
+void usart3_rx_dma_isr(void)
+{
+    f4ll::packet_usart::rx_dma_isr(g_usarts[USART3_OFFSET]);
+}
+
+void usart3_tx_dma_isr(void)
+{
+    f4ll::packet_usart::tx_dma_isr(g_usarts[USART3_OFFSET]);
+}
+void usart3_isr(void)
+{
+    f4ll::packet_usart::usart_isr(g_usarts[USART3_OFFSET]);
+}
+
+//
+void usart4_rx_dma_isr(void) {} //  console
+void usart4_tx_dma_isr(void)
+{
+    f4ll::console_handler::tx_dma_isr(&f4ll::console_handler::instance());
+} //  console
+void usart4_isr(void)
+{
+    f4ll::console_handler::usart_isr(&f4ll::console_handler::instance());
+}
+
+//
+void usart6_rx_dma_isr(void)
+{
+    f4ll::packet_usart::rx_dma_isr(g_usarts[USART6_OFFSET]);
+}
+
+void usart6_tx_dma_isr(void)
+{
+    f4ll::packet_usart::tx_dma_isr(g_usarts[USART6_OFFSET]);
+}
+void usart6_isr(void)
+{
+    f4ll::packet_usart::usart_isr(g_usarts[USART6_OFFSET]);
+}
+
+void m2m1_dma_isr(void)
+{
+    f4ll::memcpy_dma::instance().dma_transfer_completed();
+} //  m2mcpy
+
+void m2m2_dma_isr(void)
+{
+    f4ll::crc_handler::instance().dma_transfer_completed();
+} //  crc