WIP - ready to debug

This commit is contained in:
Attila Body 2019-10-31 14:01:38 +01:00
parent 663d68baf1
commit 9670e6d397
14 changed files with 893 additions and 52 deletions

View file

@ -29,6 +29,7 @@
#include "memcpy_dma.h"
#include "globals.h"
#include "diag.h"
#include "ll_testbed.h"
/* USER CODE END Includes */
@ -214,7 +215,7 @@ void SysTick_Handler(void)
void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
HandleUsartRxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
_HandleUsartRxDmaIrq(USART3_OFFSET);
/* USER CODE END DMA1_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
@ -242,7 +243,7 @@ void DMA1_Stream2_IRQHandler(void)
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
HandleUsartTxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
_HandleUsartTxDmaIrq(USART3_OFFSET);
/* USER CODE END DMA1_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
@ -270,7 +271,7 @@ void DMA1_Stream4_IRQHandler(void)
void DMA1_Stream5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
HandleUsartRxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
_HandleUsartRxDmaIrq(USART2_OFFSET);
/* USER CODE END DMA1_Stream5_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
@ -284,7 +285,7 @@ void DMA1_Stream5_IRQHandler(void)
void DMA1_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
HandleUsartTxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
_HandleUsartTxDmaIrq(USART2_OFFSET);
/* USER CODE END DMA1_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
@ -324,7 +325,7 @@ void SPI2_IRQHandler(void)
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
HandleUsartIrq(&g_uartStatuses[USART1_OFFSET]);
_HandleUsartIrq(USART1_OFFSET);
/* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */
@ -337,7 +338,7 @@ void USART1_IRQHandler(void)
void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
HandleUsartIrq(&g_uartStatuses[USART2_OFFSET]);
_HandleUsartIrq(USART2_OFFSET);
/* USER CODE END USART2_IRQn 0 */
/* USER CODE BEGIN USART2_IRQn 1 */
@ -350,7 +351,7 @@ void USART2_IRQHandler(void)
void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
HandleUsartIrq(&g_uartStatuses[USART3_OFFSET]);
_HandleUsartIrq(USART3_OFFSET);
/* USER CODE END USART3_IRQn 0 */
/* USER CODE BEGIN USART3_IRQn 1 */
@ -390,7 +391,7 @@ void DMA2_Stream0_IRQHandler(void)
void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
HandleUsartRxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
_HandleUsartRxDmaIrq(USART6_OFFSET);
/* USER CODE END DMA2_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
@ -404,7 +405,7 @@ void DMA2_Stream1_IRQHandler(void)
void DMA2_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
HandleUsartRxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
_HandleUsartRxDmaIrq(USART1_OFFSET);
/* USER CODE END DMA2_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
@ -433,11 +434,11 @@ void DMA2_Stream3_IRQHandler(void)
void DMA2_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
HandleCrcDmaIrq(&g_crcStatus);
//HandleCrcDmaIrq(&g_crcStatus);
/* USER CODE END DMA2_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
_HandleCrcDmaIrq();
/* USER CODE END DMA2_Stream4_IRQn 1 */
}
@ -461,7 +462,7 @@ void DMA2_Stream5_IRQHandler(void)
void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
HandleUsartTxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
_HandleUsartTxDmaIrq(USART6_OFFSET);
/* USER CODE END DMA2_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
@ -475,7 +476,7 @@ void DMA2_Stream6_IRQHandler(void)
void DMA2_Stream7_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
HandleUsartTxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
_HandleUsartTxDmaIrq(USART1_OFFSET);
/* USER CODE END DMA2_Stream7_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
@ -489,7 +490,7 @@ void DMA2_Stream7_IRQHandler(void)
void USART6_IRQHandler(void)
{
/* USER CODE BEGIN USART6_IRQn 0 */
HandleUsartIrq(&g_uartStatuses[USART6_OFFSET]);
_HandleUsartIrq(USART6_OFFSET);
/* USER CODE END USART6_IRQn 0 */
/* USER CODE BEGIN USART6_IRQn 1 */