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ee09dcef00
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83f510bb59
13 changed files with 213 additions and 64 deletions
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@ -19,6 +19,8 @@ PacketUsart::PacketUsart(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t stream
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: UsartCore(usart, dma, streamRx, streamTx)
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{
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CrcHandler::Instance().AttachSlot(m_crcSlot);
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LL_USART_EnableIT_IDLE(usart);
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LL_USART_EnableIT_ERROR(usart);
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}
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@ -14,28 +14,37 @@ UsartCore::UsartCore(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx,
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, m_rxDma(dma, streamRx)
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, m_txDma(dma, streamTx)
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{
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uint32_t status = usart->SR;
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volatile uint32_t tmpreg = usart->DR; // clearing some of the error/status bits in the USART
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(void) tmpreg;
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(void) status;
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*m_txDma.GetIfcReg() =
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m_txDma.GetTcMask() | m_rxDma.GetHtMask() | m_txDma.GetTeMask() | m_rxDma.GetFeMask() | m_rxDma.GetDmeMask();
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*m_rxDma.GetIfcReg() =
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m_rxDma.GetTcMask() | m_rxDma.GetHtMask() | m_rxDma.GetTeMask() | m_rxDma.GetFeMask() | m_rxDma.GetDmeMask();
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LL_DMA_EnableIT_TC(dma, streamRx);
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LL_DMA_EnableIT_TE(dma, streamRx);
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LL_DMA_EnableIT_TC(dma, streamTx);
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LL_DMA_EnableIT_TE(dma, streamTx);
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LL_USART_EnableIT_IDLE(usart);
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LL_USART_EnableIT_ERROR(usart);
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}
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void UsartCore::UsartIsr()
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{
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if(LL_USART_IsActiveFlag_TC(m_usart) && LL_USART_IsEnabledIT_TC(m_usart)) { // transmission complete
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uint32_t status = m_usart->SR;
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volatile uint32_t tmpreg = m_usart->DR; // clearing some of the error/status bits in the HW
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(void) tmpreg;
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if(LL_USART_IsEnabledIT_TC(m_usart) && LL_USART_IsActiveFlag_TC(m_usart)) { // transmission complete
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LL_USART_DisableIT_TC(m_usart);
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TransmissionComplete();
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} else if(LL_USART_IsEnabledIT_ERROR(m_usart)) {
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uint32_t status = m_usart->SR;
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volatile uint32_t tmpreg = m_usart->DR; // clearing some of the error/status bits in the HW
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(void) tmpreg;
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if(status & USART_SR_IDLE) {
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ReceiverIdle();
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}
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}
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if(LL_USART_IsEnabledIT_IDLE(m_usart) && (status & USART_SR_IDLE)) {
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ReceiverIdle();
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}
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if(LL_USART_IsEnabledIT_ERROR(m_usart)) {
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if(status & USART_SR_FE) {
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FramingError();
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}
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@ -28,6 +28,7 @@ uint32_t GetDmeMask(uint32_t stream);
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uint32_t GetTeMask(uint32_t stream);
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uint32_t GetHtMask(uint32_t stream);
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uint32_t GetTcMask(uint32_t stream);
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uint32_t GetFeMask(uint32_t stream);
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void InitDmaInfo(DMAINFO *info, DMA_TypeDef *dma, uint32_t stream);
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@ -36,6 +36,11 @@ void InitUartStatus(
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struct crcstatus_t *crcStatus,
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PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam)
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{
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uint32_t status = usart->SR;
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volatile uint32_t tmpreg = usart->DR; // clearing some of the error/status bits in the USART
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(void) tmpreg;
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(void) status;
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st->usart = usart;
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InitDmaInfo(&st->rxDmaInfo, dma, stream_rx);
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InitDmaInfo(&st->txDmaInfo, dma, stream_tx);
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@ -60,6 +65,13 @@ void InitUartStatus(
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AttachCrcTask(crcStatus, &st->crcSlot, st->crcTasks, 2);
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memset(&st->stats, 0, sizeof(st->stats));
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*GetIfcReg(dma, stream_rx) =
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GetTcMask(stream_rx) | GetHtMask(stream_rx) |
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GetTeMask(stream_rx) | GetFeMask(stream_rx) | GetDmeMask(stream_rx);
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*GetIfcReg(dma, stream_tx) =
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GetTcMask(stream_tx) | GetHtMask(stream_tx) |
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GetTeMask(stream_tx) | GetFeMask(stream_tx) | GetDmeMask(stream_tx);
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LL_DMA_EnableIT_TC(dma, stream_rx);
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LL_DMA_EnableIT_TE(dma, stream_rx);
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LL_DMA_EnableIT_TC(dma, stream_tx);
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@ -98,16 +110,8 @@ uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length,
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BuildHeader(&status->txBuffer, status->txSerial++, length);
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uint16_t payloadLength = RoundUpTo4(length);
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if(payload) {
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#ifdef USART_USE_MEMCPY_DMA
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if((uint32_t)payload & 3)
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memcpy(status->txBuffer.packet.payload, payload, length);
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else
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MemcpyDma(status->txBuffer.packet.payload, payload, length);
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#else
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if(payload)
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memcpy(status->txBuffer.packet.payload, payload, length);
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#endif
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}
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status->txBuffer.requestedLength = sizeof(USARTPACKETHEADER) + payloadLength + sizeof(uint32_t); // +4 for the hash
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status->txBuffer.busy = 1;
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status->txBuffer.error = 0;
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