removing prefix LL_ from class/struct names under f4ll namespace

This commit is contained in:
Attila Body 2019-11-12 15:26:16 +01:00
parent 180f2ef624
commit 7cdc79c2ac
17 changed files with 184 additions and 183 deletions

View file

@ -38,8 +38,8 @@ extern "C" {
#ifdef USE_CPLUSPLUS
#include "globals_cpp.h"
#include "f4ll/ll_memcpydma.h"
#include "f4ll/ll_consolehandler.h"
#include "f4ll/memcpydma.h"
#include "f4ll/consolehandler.h"
#endif
extern "C" {
@ -229,7 +229,7 @@ void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_UsartCore::HandleRxDmaIrq(g_usarts[USART3_OFFSET]);
f4ll::UsartCore::HandleRxDmaIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
@ -261,7 +261,7 @@ void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleTxDmaIrq(g_usarts[USART3_OFFSET]);
f4ll::HsUsart::HandleTxDmaIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
@ -279,7 +279,7 @@ void DMA1_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_ConsoleHandler::HandleTxDmaIrq(&f4ll::LL_ConsoleHandler::Instance());
f4ll::ConsoleHandler::HandleTxDmaIrq(&f4ll::ConsoleHandler::Instance());
#else
HandleConsoleUsartTxDmaIrq(&g_ConsoleTxDmaInfo, UART4);
#endif
@ -297,7 +297,7 @@ void DMA1_Stream5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleRxDmaIrq(g_usarts[USART2_OFFSET]);
f4ll::HsUsart::HandleRxDmaIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
@ -315,7 +315,7 @@ void DMA1_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleTxDmaIrq(g_usarts[USART2_OFFSET]);
f4ll::HsUsart::HandleTxDmaIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
@ -359,7 +359,7 @@ void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleUsartIrq(g_usarts[USART1_OFFSET]);
f4ll::HsUsart::HandleUsartIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
@ -376,7 +376,7 @@ void USART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleUsartIrq(g_usarts[USART2_OFFSET]);
f4ll::HsUsart::HandleUsartIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
@ -393,7 +393,7 @@ void USART3_IRQHandler(void)
{
/* USER CODE BEGIN USART3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleUsartIrq(g_usarts[USART3_OFFSET]);
f4ll::HsUsart::HandleUsartIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
@ -410,7 +410,7 @@ void UART4_IRQHandler(void)
{
/* USER CODE BEGIN UART4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_ConsoleHandler::HandleUsartIrq(&f4ll::LL_ConsoleHandler::Instance());
f4ll::ConsoleHandler::HandleUsartIrq(&f4ll::ConsoleHandler::Instance());
#else
HandleConsoleUsartIrq(UART4);
#endif
@ -441,7 +441,7 @@ void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleRxDmaIrq(g_usarts[USART6_OFFSET]);
f4ll::HsUsart::HandleRxDmaIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
@ -459,7 +459,7 @@ void DMA2_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleRxDmaIrq(g_usarts[USART1_OFFSET]);
f4ll::HsUsart::HandleRxDmaIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
@ -477,7 +477,7 @@ void DMA2_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_MemcpyDma::Instance().DmaTransferCompleted();
f4ll::MemcpyDma::Instance().DmaTransferCompleted();
#else
HandleMemcpyDmaIrq();
#endif
@ -495,7 +495,7 @@ void DMA2_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_CrcHandler::Instance().DmaTransferCompleted();
f4ll::CrcHandler::Instance().DmaTransferCompleted();
#else
HandleCrcDmaIrq(&g_crcStatus);
#endif
@ -527,7 +527,7 @@ void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleTxDmaIrq(g_usarts[USART6_OFFSET]);
f4ll::HsUsart::HandleTxDmaIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
@ -545,7 +545,7 @@ void DMA2_Stream7_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleTxDmaIrq(g_usarts[USART1_OFFSET]);
f4ll::HsUsart::HandleTxDmaIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
@ -563,7 +563,7 @@ void USART6_IRQHandler(void)
{
/* USER CODE BEGIN USART6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::LL_HsUsart::HandleUsartIrq(g_usarts[USART6_OFFSET]);
f4ll::HsUsart::HandleUsartIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART6_OFFSET]);
#endif