Reorganizing project
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2d6567b1b2
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51 changed files with 139 additions and 266 deletions
19
components/f4ll_c/inc/console_handler.h
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19
components/f4ll_c/inc/console_handler.h
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/*
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* interrupt.h
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*
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* Created on: Aug 29, 2019
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* Author: abody
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*/
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#ifndef INTERRUPT_HANDLERS_H_
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#define INTERRUPT_HANDLERS_H_
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#include "usart.h"
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#include "f4ll_c/dma_helper.h"
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void HandleConsoleUsartTxDmaIrq(DMAINFO *info, USART_TypeDef *usart);
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void HandleConsoleUsartIrq(USART_TypeDef *usart);
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void PrintStats(char *buffer, uint8_t id, struct usart_stats *stats, USART_TypeDef *usart, DMAINFO *dmaInfo);
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#endif /* INTERRUPT_HANDLERS_H_ */
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53
components/f4ll_c/inc/crc_handler.h
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components/f4ll_c/inc/crc_handler.h
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/*
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* interrupt.h
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*
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* Created on: Aug 29, 2019
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* Author: abody
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*/
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#ifndef CRC_HANDLER_H_
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#define CRC_HANDLER_H_
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#include <inttypes.h>
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#ifdef HAVE_CONFIG
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#include "config.h"
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#endif // HAVE_CONFIG
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#include "f4ll_c/dma_helper.h"
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#ifndef CRCTASKCOUNT
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#define CRCTASKCOUNT 2
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#endif
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typedef struct {
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DMAINFO dmaInfo;
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volatile uint8_t activeSlot;
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struct crctask_t {
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void *address;
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uint16_t wordCount;
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void (*callback)(void*, uint32_t, uint8_t);
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void *callbackParam;
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} volatile crcTasks[CRCTASKCOUNT];
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} CRCSTATUS;
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void InitCrcStatus(CRCSTATUS *status, DMA_TypeDef *dma, uint32_t stream);
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static inline uint8_t GetActiveSlot(CRCSTATUS *status) {
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return status->activeSlot;
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}
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static inline uint8_t IsSlotQueued(CRCSTATUS *status, uint8_t slot) {
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return status->crcTasks[slot].address != NULL;
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}
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static inline uint8_t IsSlotActive(CRCSTATUS *status, uint8_t slot) {
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return status->crcTasks[slot].callback != NULL || status->crcTasks[slot].callbackParam != NULL;
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}
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uint8_t EnqueueCrcTask(CRCSTATUS *crcStatus, uint8_t slot, uint8_t *address, uint16_t len,
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void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
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void WaitCrcResults(CRCSTATUS *status, uint8_t slot);
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uint32_t ComputeCrc(CRCSTATUS *status, uint8_t slot, uint8_t *address, uint16_t len);
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void ComputeCrcAsync(CRCSTATUS *status, uint8_t slot,
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uint8_t *address, uint16_t len,
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void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
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void HandleCrcDmaIrq(CRCSTATUS *status);
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#endif /* CRC_HANDLER_H_ */
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34
components/f4ll_c/inc/dma_helper.h
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components/f4ll_c/inc/dma_helper.h
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/*
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* dma_helper.h
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*
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* Created on: Sep 18, 2019
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* Author: abody
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*/
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#ifndef DMA_HELPER_H_
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#define DMA_HELPER_H_
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#include <inttypes.h>
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#include <platform/dma_ll.h>
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typedef struct {
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DMA_TypeDef *dma;
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uint32_t stream;
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volatile uint32_t *isReg;
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volatile uint32_t *ifcReg;
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uint32_t feMask;
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uint32_t dmeMask;
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uint32_t teMask;
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uint32_t htMask;
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uint32_t tcMask;
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} DMAINFO;
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volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream);
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volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream);
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uint32_t GetDmeMask(uint32_t stream);
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uint32_t GetTeMask(uint32_t stream);
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uint32_t GetHtMask(uint32_t stream);
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uint32_t GetTcMask(uint32_t stream);
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void InitDmaInfo(DMAINFO *info, DMA_TypeDef *dma, uint32_t stream);
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#endif /* DMA_HELPER_H_ */
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1
components/f4ll_c/inc/f4ll_c
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1
components/f4ll_c/inc/f4ll_c
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.
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18
components/f4ll_c/inc/memcpy_dma.h
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components/f4ll_c/inc/memcpy_dma.h
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/*
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* memcpy_dma.h
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*
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* Created on: Oct 1, 2019
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* Author: abody
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*/
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#ifndef MEMCPY_DMA_H_
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#define MEMCPY_DMA_H_
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#include <inttypes.h>
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#include <platform/dma_ll.h>
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void InitMemcpyDma(DMA_TypeDef *dma, uint32_t stream);
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void * MemcpyDma(void *dst, void const *src, size_t length);
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void HandleMemcpyDmaIrq();
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#endif /* MEMCPY_DMA_H_ */
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31
components/f4ll_c/inc/strutil.h
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components/f4ll_c/inc/strutil.h
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/*
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* strutil.h
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*
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* Created on: Feb 11, 2017
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* Author: compi
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*/
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#ifndef _STM32PLUS_STRUTIL_H_
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#define _STM32PLUS_STRUTIL_H_
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#include <stddef.h>
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#include <inttypes.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//////////////////////////////////////////////////////////////////////////////
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size_t strcpy_ex(char *dst, char const *src);
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size_t uitodec(char* buffer, uint32_t data);
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size_t uitohex(char* buffer, uint32_t data, uint8_t chars);
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size_t itodec(char* buffer, int data);
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size_t itohex(char* buffer, int data);
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void strrev(char *first, char *last);
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char tochr(const uint8_t in, const uint8_t upper);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _STM32PLUS_STRUTIL_H_ */
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142
components/f4ll_c/inc/usart_handler.h
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components/f4ll_c/inc/usart_handler.h
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/*
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* usart_handler.h
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*
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* Created on: Sep 16, 2019
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* Author: abody
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*/
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#ifndef USART_HANDLER_H_
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#define USART_HANDLER_H_
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#include <inttypes.h>
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#include "f4ll_c/dma_helper.h"
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#include "f4ll_c/crc_handler.h"
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struct _usart_status;
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typedef struct _usart_status USARTSTATUS;
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struct usart_buffer;
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typedef void (*PACKETRECEIVEDCALLBACK)(void *userParam, struct usart_buffer *buffer);
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void InitUartStatus(
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USARTSTATUS *st, USART_TypeDef *usart, DMA_TypeDef *dma,
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uint32_t stream_rx, uint32_t stream_tx,
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CRCSTATUS *crcStatus, uint8_t rxCrcSlot, uint8_t txCrcSlot,
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PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam);
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uint8_t* GetTxBuffer(USARTSTATUS *status);
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uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length, CRCSTATUS *crcStatus);
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void SetupReceive(USARTSTATUS *status);
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void SetupTransmit(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length);
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void ConsumePacket(USARTSTATUS *status, uint8_t packetIndex, CRCSTATUS *crcStatus);
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void HandleUsartRxDmaIrq(USARTSTATUS *status);
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void HandleUsartTxDmaIrq(USARTSTATUS *status);
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void HandleUsartIrq(USARTSTATUS *status);
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/******************************************************************************************
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*
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*
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*
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*/
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struct usart_stats {
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uint32_t overrun;
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uint32_t hdrError;
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uint32_t lastErrHdr;
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uint32_t payloadErrror;
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uint32_t pep1, pep2;
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uint32_t dmaError;
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uint32_t rcvd;
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uint32_t premature_hdr;
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uint32_t premature_payload;
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uint32_t sent;
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uint32_t skiped;
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};
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typedef struct {
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uint8_t startByte;
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uint8_t serial;
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uint8_t payloadLength;
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uint8_t hash;
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} USARTPACKETHEADER;
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typedef struct {
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USARTPACKETHEADER header;
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//!!! should start on word offset !!!
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uint8_t payload[256+sizeof(uint32_t)]; // extra room for crc32
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} __attribute__((aligned)) USARTPACKET;
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struct usart_buffer {
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USARTPACKET packet;
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//transfer area ends here
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volatile uint8_t busy;
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volatile uint8_t error;
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uint16_t requestedLength;
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uint32_t errorInfo;
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USARTSTATUS *usartStatus;
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};
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struct _usart_status {
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USART_TypeDef *usart;
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DMAINFO rxDmaInfo;
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DMAINFO txDmaInfo;
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CRCSTATUS *crcStatus;
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uint8_t rxSerial;
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uint8_t txSerial;
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struct usart_stats stats;
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uint8_t activeRxBuf;
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uint8_t rxCrcSlot;
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uint8_t txCrcSlot;
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PACKETRECEIVEDCALLBACK packetReceivedCallback;
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void *packetReceivedCallbacParam;
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struct usart_buffer txBuffer;
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struct usart_buffer rxBuffers[2];
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};
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#ifndef USART_STATS_DISABLED
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static inline void StatsIncOverrun(struct usart_stats *s) {
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++s->overrun;
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}
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static inline void StatsIncHdrError(struct usart_stats *s, uint32_t hdr) {
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++s->hdrError;
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s->lastErrHdr = hdr;
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}
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static inline void StatsIncPayloadError(struct usart_stats *s, uint32_t pep1, uint32_t pep2) {
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++s->payloadErrror;
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s->pep1 = pep1;
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s->pep2 = pep2;
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}
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static inline void StatsIncDmaError(struct usart_stats *s) {
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++s->dmaError;
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}
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static inline void StatsIncRcvd(struct usart_stats *s) {
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++s->rcvd;
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}
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static inline void StatsIncPremature_hdr(struct usart_stats *s) {
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++s->premature_hdr;
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}
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static inline void StatsIncPremature_payload(struct usart_stats *s) {
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++s->premature_payload;
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}
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static inline void StatsIncSent(struct usart_stats *s) {
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++s->sent;
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}
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static inline void StatsAddSkiped(struct usart_stats *s, uint8_t cnt) {
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s->skiped += s->rcvd > 2 ? cnt : 0;
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}
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#else // USART_STATS_DISABLED
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#define StatsIncOverrun(x)
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#define StatsIncHdrError(x,y)
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#define StatsIncPayloadError(x,y,z)
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#define StatsIncDmaError(x)
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#define StatsIncRcvd(x)
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#define StatsIncPremature_hdr(x)
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#define StatsIncPremature_payload(x)
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#define StatsIncSent(x)
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#define StatsAddSkiped(x)
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#endif // USART_STATS_DISABLED
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#endif /* UART_HANDLER_H_ */
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