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Reorganizing project

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This commit is contained in:
Attila Body 2019-11-08 11:47:49 +01:00
parent 2d6567b1b2
commit 76ba80db36
51 changed files with 139 additions and 266 deletions
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19
components/f4ll_c/inc/console_handler.h Normal file
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/*
* interrupt.h
*
* Created on: Aug 29, 2019
* Author: abody
*/
#ifndef INTERRUPT_HANDLERS_H_
#define INTERRUPT_HANDLERS_H_
#include "usart.h"
#include "f4ll_c/dma_helper.h"
void HandleConsoleUsartTxDmaIrq(DMAINFO *info, USART_TypeDef *usart);
void HandleConsoleUsartIrq(USART_TypeDef *usart);
void PrintStats(char *buffer, uint8_t id, struct usart_stats *stats, USART_TypeDef *usart, DMAINFO *dmaInfo);
#endif /* INTERRUPT_HANDLERS_H_ */

53
components/f4ll_c/inc/crc_handler.h Normal file
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/*
* interrupt.h
*
* Created on: Aug 29, 2019
* Author: abody
*/
#ifndef CRC_HANDLER_H_
#define CRC_HANDLER_H_
#include <inttypes.h>
#ifdef HAVE_CONFIG
#include "config.h"
#endif // HAVE_CONFIG
#include "f4ll_c/dma_helper.h"
#ifndef CRCTASKCOUNT
#define CRCTASKCOUNT 2
#endif
typedef struct {
DMAINFO dmaInfo;
volatile uint8_t activeSlot;
struct crctask_t {
void *address;
uint16_t wordCount;
void (*callback)(void*, uint32_t, uint8_t);
void *callbackParam;
} volatile crcTasks[CRCTASKCOUNT];
} CRCSTATUS;
void InitCrcStatus(CRCSTATUS *status, DMA_TypeDef *dma, uint32_t stream);
static inline uint8_t GetActiveSlot(CRCSTATUS *status) {
return status->activeSlot;
}
static inline uint8_t IsSlotQueued(CRCSTATUS *status, uint8_t slot) {
return status->crcTasks[slot].address != NULL;
}
static inline uint8_t IsSlotActive(CRCSTATUS *status, uint8_t slot) {
return status->crcTasks[slot].callback != NULL || status->crcTasks[slot].callbackParam != NULL;
}
uint8_t EnqueueCrcTask(CRCSTATUS *crcStatus, uint8_t slot, uint8_t *address, uint16_t len,
void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
void WaitCrcResults(CRCSTATUS *status, uint8_t slot);
uint32_t ComputeCrc(CRCSTATUS *status, uint8_t slot, uint8_t *address, uint16_t len);
void ComputeCrcAsync(CRCSTATUS *status, uint8_t slot,
uint8_t *address, uint16_t len,
void (*callback)(void*, uint32_t, uint8_t), void* callbackParam);
void HandleCrcDmaIrq(CRCSTATUS *status);
#endif /* CRC_HANDLER_H_ */

34
components/f4ll_c/inc/dma_helper.h Normal file
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/*
* dma_helper.h
*
* Created on: Sep 18, 2019
* Author: abody
*/
#ifndef DMA_HELPER_H_
#define DMA_HELPER_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
typedef struct {
DMA_TypeDef *dma;
uint32_t stream;
volatile uint32_t *isReg;
volatile uint32_t *ifcReg;
uint32_t feMask;
uint32_t dmeMask;
uint32_t teMask;
uint32_t htMask;
uint32_t tcMask;
} DMAINFO;
volatile uint32_t* GetIsReg(DMA_TypeDef *dma, uint32_t stream);
volatile uint32_t* GetIfcReg(DMA_TypeDef *dma, uint32_t stream);
uint32_t GetDmeMask(uint32_t stream);
uint32_t GetTeMask(uint32_t stream);
uint32_t GetHtMask(uint32_t stream);
uint32_t GetTcMask(uint32_t stream);
void InitDmaInfo(DMAINFO *info, DMA_TypeDef *dma, uint32_t stream);
#endif /* DMA_HELPER_H_ */

1
components/f4ll_c/inc/f4ll_c Symbolic link
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.

18
components/f4ll_c/inc/memcpy_dma.h Normal file
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/*
* memcpy_dma.h
*
* Created on: Oct 1, 2019
* Author: abody
*/
#ifndef MEMCPY_DMA_H_
#define MEMCPY_DMA_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
void InitMemcpyDma(DMA_TypeDef *dma, uint32_t stream);
void * MemcpyDma(void *dst, void const *src, size_t length);
void HandleMemcpyDmaIrq();
#endif /* MEMCPY_DMA_H_ */

31
components/f4ll_c/inc/strutil.h Normal file
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/*
* strutil.h
*
* Created on: Feb 11, 2017
* Author: compi
*/
#ifndef _STM32PLUS_STRUTIL_H_
#define _STM32PLUS_STRUTIL_H_
#include <stddef.h>
#include <inttypes.h>
#ifdef __cplusplus
extern "C" {
#endif
//////////////////////////////////////////////////////////////////////////////
size_t strcpy_ex(char *dst, char const *src);
size_t uitodec(char* buffer, uint32_t data);
size_t uitohex(char* buffer, uint32_t data, uint8_t chars);
size_t itodec(char* buffer, int data);
size_t itohex(char* buffer, int data);
void strrev(char *first, char *last);
char tochr(const uint8_t in, const uint8_t upper);
#ifdef __cplusplus
}
#endif
#endif /* _STM32PLUS_STRUTIL_H_ */

142
components/f4ll_c/inc/usart_handler.h Normal file
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/*
* usart_handler.h
*
* Created on: Sep 16, 2019
* Author: abody
*/
#ifndef USART_HANDLER_H_
#define USART_HANDLER_H_
#include <inttypes.h>
#include "f4ll_c/dma_helper.h"
#include "f4ll_c/crc_handler.h"
struct _usart_status;
typedef struct _usart_status USARTSTATUS;
struct usart_buffer;
typedef void (*PACKETRECEIVEDCALLBACK)(void *userParam, struct usart_buffer *buffer);
void InitUartStatus(
USARTSTATUS *st, USART_TypeDef *usart, DMA_TypeDef *dma,
uint32_t stream_rx, uint32_t stream_tx,
CRCSTATUS *crcStatus, uint8_t rxCrcSlot, uint8_t txCrcSlot,
PACKETRECEIVEDCALLBACK packetReceivedCallback, void * packetReceivedCallbackParam);
uint8_t* GetTxBuffer(USARTSTATUS *status);
uint8_t PostPacket(USARTSTATUS *status, uint8_t const *payload, uint16_t length, CRCSTATUS *crcStatus);
void SetupReceive(USARTSTATUS *status);
void SetupTransmit(USART_TypeDef *usart, DMA_TypeDef* dma, uint32_t stream, void *buffer, uint32_t length);
void ConsumePacket(USARTSTATUS *status, uint8_t packetIndex, CRCSTATUS *crcStatus);
void HandleUsartRxDmaIrq(USARTSTATUS *status);
void HandleUsartTxDmaIrq(USARTSTATUS *status);
void HandleUsartIrq(USARTSTATUS *status);
/******************************************************************************************
*
*
*
*/
struct usart_stats {
uint32_t overrun;
uint32_t hdrError;
uint32_t lastErrHdr;
uint32_t payloadErrror;
uint32_t pep1, pep2;
uint32_t dmaError;
uint32_t rcvd;
uint32_t premature_hdr;
uint32_t premature_payload;
uint32_t sent;
uint32_t skiped;
};
typedef struct {
uint8_t startByte;
uint8_t serial;
uint8_t payloadLength;
uint8_t hash;
} USARTPACKETHEADER;
typedef struct {
USARTPACKETHEADER header;
//!!! should start on word offset !!!
uint8_t payload[256+sizeof(uint32_t)]; // extra room for crc32
} __attribute__((aligned)) USARTPACKET;
struct usart_buffer {
USARTPACKET packet;
//transfer area ends here
volatile uint8_t busy;
volatile uint8_t error;
uint16_t requestedLength;
uint32_t errorInfo;
USARTSTATUS *usartStatus;
};
struct _usart_status {
USART_TypeDef *usart;
DMAINFO rxDmaInfo;
DMAINFO txDmaInfo;
CRCSTATUS *crcStatus;
uint8_t rxSerial;
uint8_t txSerial;
struct usart_stats stats;
uint8_t activeRxBuf;
uint8_t rxCrcSlot;
uint8_t txCrcSlot;
PACKETRECEIVEDCALLBACK packetReceivedCallback;
void *packetReceivedCallbacParam;
struct usart_buffer txBuffer;
struct usart_buffer rxBuffers[2];
};
#ifndef USART_STATS_DISABLED
static inline void StatsIncOverrun(struct usart_stats *s) {
++s->overrun;
}
static inline void StatsIncHdrError(struct usart_stats *s, uint32_t hdr) {
++s->hdrError;
s->lastErrHdr = hdr;
}
static inline void StatsIncPayloadError(struct usart_stats *s, uint32_t pep1, uint32_t pep2) {
++s->payloadErrror;
s->pep1 = pep1;
s->pep2 = pep2;
}
static inline void StatsIncDmaError(struct usart_stats *s) {
++s->dmaError;
}
static inline void StatsIncRcvd(struct usart_stats *s) {
++s->rcvd;
}
static inline void StatsIncPremature_hdr(struct usart_stats *s) {
++s->premature_hdr;
}
static inline void StatsIncPremature_payload(struct usart_stats *s) {
++s->premature_payload;
}
static inline void StatsIncSent(struct usart_stats *s) {
++s->sent;
}
static inline void StatsAddSkiped(struct usart_stats *s, uint8_t cnt) {
s->skiped += s->rcvd > 2 ? cnt : 0;
}
#else // USART_STATS_DISABLED
#define StatsIncOverrun(x)
#define StatsIncHdrError(x,y)
#define StatsIncPayloadError(x,y,z)
#define StatsIncDmaError(x)
#define StatsIncRcvd(x)
#define StatsIncPremature_hdr(x)
#define StatsIncPremature_payload(x)
#define StatsIncSent(x)
#define StatsAddSkiped(x)
#endif // USART_STATS_DISABLED
#endif /* UART_HANDLER_H_ */