playground-stm32/f407ve_hs_uart
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

tmp 1

Browse source
This commit is contained in:
Attila Body 2025-06-08 14:17:59 +02:00
parent bc01b1f0e8
commit 5d5fd4bc83
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
256 changed files with 163824 additions and 189151 deletions
Download patch file Download diff file Expand all files Collapse all files

33
.clang-format Normal file
View file

@ -0,0 +1,33 @@
BasedOnStyle: LLVM
UseTab: Never
IndentWidth: 4
TabWidth: 4
BreakBeforeBraces: Custom
AllowShortFunctionsOnASingleLine: Inline
AllowShortIfStatementsOnASingleLine: true
AllowShortLambdasOnASingleLine: true
AllowAllArgumentsOnNextLine: true
IndentCaseLabels: true
AccessModifierOffset: -4
NamespaceIndentation: None
FixNamespaceComments: false
PackConstructorInitializers: Never
AlignAfterOpenBracket: AlwaysBreak
InsertBraces: true
BraceWrapping:
AfterClass: true # false
AfterControlStatement: false
AfterEnum: false # false
AfterFunction: true # false
AfterNamespace: false
AfterObjCDeclaration: true # false
AfterStruct: true # false
AfterUnion: true # false
AfterExternBlock: false
BeforeCatch: false
BeforeElse: false
IndentBraces: false
SplitEmptyFunction: true
SplitEmptyRecord: true
SplitEmptyNamespace: true
ColumnLimit: 140

11
.clangd Normal file
View file

@ -0,0 +1,11 @@
CompileFlags:
Add:
- '-ferror-limit=0'
- '-Wno-implicit-int'
CompilationDatabase: build/Debug
Diagnostics:
Suppress:
- unused-includes
- unknown_typename
- unknown_typename_suggest
- typename_requires_specqual

312
.cproject
View file

@ -1,312 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594" moduleId="org.eclipse.cdt.core.settings" name="Debug">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594" name="Debug" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug">
<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594." name="/" resourcePath="">
<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1244830121" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug">
<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.1720703955" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.1653632439" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" useByScannerDiscovery="false" value="7-2018-q2-update" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.164195990" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" useByScannerDiscovery="false" value="STM32F407VETx" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.462500701" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1858367229" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.1132685722" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.639645368" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1695232558" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.157688335" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F407VETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Inc | ../Drivers/CMSIS/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FatFs/src || || || USE_HAL_DRIVER | USE_FULL_LL_DRIVER | STM32F407xx || || Drivers | Src | Middlewares | Startup || || || ${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || " valueType="string"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1516869560" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
<builder buildPath="${workspace_loc:/f407ve_hs_uart}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.276958501" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.954167919" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.609392822" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.1201266469" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.954718294" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.1802603949" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.659064122" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.1849796627" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="USE_CPLUSPLUS"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.410582808" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FatFs/src"/>
<listOptionValue builtIn="false" value="../App"/>
<listOptionValue builtIn="false" value="../Lib"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includefiles.1400203807" name="Include files (-include)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includefiles" useByScannerDiscovery="false" valueType="includeFiles"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.95218066" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.804537744" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.927675929" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.564125933" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.includepaths.743593439" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FatFs/src"/>
<listOptionValue builtIn="false" value="../App"/>
<listOptionValue builtIn="false" value="../Lib"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols.1626664664" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="USE_CPLUSPLUS"/>
</option>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.languagestandard.1833413246" name="Language standard" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.languagestandard" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.languagestandard.value.isocpp14" valueType="enumerated"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.1377090173" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1191853047" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.427777643" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld}" valueType="string"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.415760690" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
</inputType>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1392953512" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.725957697" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" useByScannerDiscovery="false" value="${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld}" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls.1962065764" name="System calls" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls.value.minimalimplementation" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.cref.258799709" name="Add symbol cross reference table to map file (-Wl,--cref)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.cref" useByScannerDiscovery="false" value="false" valueType="boolean"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.verbose.720620576" name="Verbose (-Wl,--verbose)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.verbose" useByScannerDiscovery="false" value="false" valueType="boolean"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.otherflags.1746443399" name="Other flags" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.otherflags" useByScannerDiscovery="false" valueType="stringList"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input.1603725690" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
</inputType>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1516391739" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1647384466" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.119190458" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1617192131" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.967047829" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1020173589" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.934357504" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1329542300" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="application.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Lib"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
<entry excluding="stm32f4xx_it.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="components/f4ll/src"/>
</sourceEntries>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562" moduleId="org.eclipse.cdt.core.settings" name="Release">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactExtension="elf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562" name="Release" parent="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release">
<folderInfo id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562." name="/" resourcePath="">
<toolChain id="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.1789252601" name="MCU ARM GCC" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release">
<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.type.634907744" name="Internal Toolchain Type" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.type" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.option.internal.toolchain.version.394857276" name="Internal Toolchain Version" superClass="com.st.stm32cube.ide.mcu.option.internal.toolchain.version" value="7-2018-q2-update" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu.1898315828" name="Mcu" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_mcu" value="STM32F407VETx" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.448979747" name="CpuId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" value="0" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.359195529" name="CpuCoreId" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" value="0" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.2001595934" name="Floating-point unit" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.fpu.value.fpv4-sp-d16" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1755954044" name="Floating-point ABI" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.934614524" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" value="genericBoard" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1749251537" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.3 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.base.gnu-tools-for-stm32 || STM32F407VETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Inc | ../Drivers/CMSIS/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FatFs/src || || || USE_HAL_DRIVER | USE_FULL_LL_DRIVER | STM32F407xx || || Drivers | Src | Middlewares | Startup || || || ${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || " valueType="string"/>
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.968948293" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
<builder buildPath="${workspace_loc:/f407ve_hs_uart}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1361082391" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1295431234" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1320002668" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g0" valueType="enumerated"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input.936875675" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.input"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1361867544" name="MCU GCC Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.772898973" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.1930748476" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.optimization.level.value.ofast" valueType="enumerated"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols.151564892" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="USE_CPLUSPLUS"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths.941145715" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FatFs/src"/>
<listOptionValue builtIn="false" value="../App"/>
<listOptionValue builtIn="false" value="../Lib"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includefiles.775946804" name="Include files (-include)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.option.includefiles" useByScannerDiscovery="false" valueType="includeFiles"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1381323629" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1987753758" name="MCU G++ Compiler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.492230322" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.debuglevel.value.g3" valueType="enumerated"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.2001061530" name="Optimization level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" useByScannerDiscovery="false" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.ofast" valueType="enumerated"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.includepaths.158099046" name="Include paths (-I)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.includepaths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="../Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc"/>
<listOptionValue builtIn="false" value="../Drivers/CMSIS/Device/ST/STM32F4xx/Include"/>
<listOptionValue builtIn="false" value="../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy"/>
<listOptionValue builtIn="false" value="../Middlewares/Third_Party/FatFs/src"/>
<listOptionValue builtIn="false" value="../App"/>
<listOptionValue builtIn="false" value="../Lib"/>
</option>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols.575681641" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.definedsymbols" useByScannerDiscovery="false" valueType="definedSymbols">
<listOptionValue builtIn="false" value="USE_HAL_DRIVER"/>
<listOptionValue builtIn="false" value="USE_FULL_LL_DRIVER"/>
<listOptionValue builtIn="false" value="DEBUG"/>
<listOptionValue builtIn="false" value="STM32F407xx"/>
<listOptionValue builtIn="false" value="HAVE_CONFIG"/>
<listOptionValue builtIn="false" value="USE_CPLUSPLUS"/>
</option>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.687772733" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp"/>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.675439128" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.503483277" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld}" valueType="string"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.434077254" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
</inputType>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.561909065" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.771887643" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32F407VETX_FLASH.ld}" valueType="string"/>
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls.2011678791" name="System calls" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.systemcalls" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.systemcalls.value.minimalimplementation" valueType="enumerated"/>
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input.1757722012" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
</inputType>
</tool>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1113742726" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.972523146" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.650352437" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1597297180" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1108248273" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1341369312" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2085481086" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1720505789" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="application.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Lib"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
<entry excluding="stm32f4xx_it.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="components/f4ll/src"/>
</sourceEntries>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
<cconfiguration id="0.1999792219.1199955544">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1999792219.1199955544" moduleId="org.eclipse.cdt.core.settings" name="make">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.1999792219.1199955544" name="make" optionalBuildProperties="" parent="org.eclipse.cdt.build.core.prefbase.cfg">
<folderInfo id="0.1999792219.1199955544." name="/" resourcePath="">
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.332727936" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.332727936.1076407313" name=""/>
<builder id="org.eclipse.cdt.build.core.settings.default.builder.1991312637" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1516180727" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
<tool id="org.eclipse.cdt.build.core.settings.holder.201550162" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.2125645864" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.1782663871" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.157796694" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.771704016" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.868430121" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool>
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="Src/stm32f4xx_it.c|build/src|src|components|f4ll|App|Lib" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="App"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Lib"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="components/f4ll/src"/>
</sourceEntries>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="f407ve_hs_uart.null.1230537834" name="f407ve_hs_uart"/>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="make">
<resource resourceType="PROJECT" workspacePath="/f407ve_hs_uart"/>
</configuration>
<configuration configurationName="Debug">
<resource resourceType="PROJECT" workspacePath="/f407ve_hs_uart"/>
</configuration>
<configuration configurationName="Release">
<resource resourceType="PROJECT" workspacePath="/f407ve_hs_uart"/>
</configuration>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1361867544;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1381323629">
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.954718294;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.95218066">
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1652594594.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.804537744;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.1377090173">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.699478562.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1987753758;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.input.cpp.687772733">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
</scannerConfigBuildInfo>
</storageModule>
</cproject>

11
.gitignore vendored
View file

@ -1,8 +1,3 @@
_[Bb][Uu][Ii][Ll][Dd]*/ build
/[Bb][Uu][Ii][Ll][Dd]/ mx.scratch
[Dd]ebug/ !.settings
[Rr]elease/
*.[Bb][Aa][Kk]
.vscode/.*
.settings/

62
.mxproject
View file

File diff suppressed because one or more lines are too long

33
.project
View file

@ -1,33 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>f407ve_hs_uart</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
</natures>
</projectDescription>

147
.settings/bundles-lock.store.json Normal file
View file

@ -0,0 +1,147 @@
{
"resolved": [
{
"name": "cmake",
"version": "4.0.1+st.3",
"platform": "darwin",
"selected_by": [
{
"name": "cmake",
"version": "^4.0.1+st.3"
}
]
},
{
"name": "cmake",
"version": "4.0.1+st.3",
"platform": "x86_64-linux",
"selected_by": [
{
"name": "cmake",
"version": "^4.0.1+st.3"
}
]
},
{
"name": "cmake",
"version": "4.0.1+st.3",
"platform": "x86_64-windows",
"selected_by": [
{
"name": "cmake",
"version": "^4.0.1+st.3"
}
]
},
{
"name": "gnu-tools-for-stm32",
"version": "13.3.1+st.8",
"platform": "darwin",
"selected_by": [
{
"name": "gnu-tools-for-stm32",
"version": "^13.3.1+st.8"
}
]
},
{
"name": "gnu-tools-for-stm32",
"version": "13.3.1+st.8",
"platform": "x86_64-linux",
"selected_by": [
{
"name": "gnu-tools-for-stm32",
"version": "^13.3.1+st.8"
}
]
},
{
"name": "gnu-tools-for-stm32",
"version": "13.3.1+st.8",
"platform": "x86_64-windows",
"selected_by": [
{
"name": "gnu-tools-for-stm32",
"version": "^13.3.1+st.8"
}
]
},
{
"name": "gnu-tools-for-stm32-13_3_1-description",
"version": "1.0.0+st.1",
"platform": "all",
"selected_by": [
{
"name": "gnu-tools-for-stm32-13_3_1-description",
"version": ">=0.0.1"
}
]
},
{
"name": "ninja",
"version": "1.12.1+st.9",
"platform": "darwin",
"selected_by": [
{
"name": "ninja",
"version": "^1.12.1+st.9"
}
]
},
{
"name": "ninja",
"version": "1.12.1+st.9",
"platform": "x86_64-linux",
"selected_by": [
{
"name": "ninja",
"version": "^1.12.1+st.9"
}
]
},
{
"name": "ninja",
"version": "1.12.1+st.9",
"platform": "x86_64-windows",
"selected_by": [
{
"name": "ninja",
"version": "^1.12.1+st.9"
}
]
},
{
"name": "st-arm-clangd",
"version": "19.1.2+st.3",
"platform": "darwin",
"selected_by": [
{
"name": "st-arm-clangd",
"version": "^19.1.2+st.3"
}
]
},
{
"name": "st-arm-clangd",
"version": "19.1.2+st.3",
"platform": "x86_64-linux",
"selected_by": [
{
"name": "st-arm-clangd",
"version": "^19.1.2+st.3"
}
]
},
{
"name": "st-arm-clangd",
"version": "19.1.2+st.3",
"platform": "x86_64-windows",
"selected_by": [
{
"name": "st-arm-clangd",
"version": "^19.1.2+st.3"
}
]
}
]
}

20
.settings/bundles.store.json Normal file
View file

@ -0,0 +1,20 @@
{
"bundles": [
{
"name": "cmake",
"version": "^4.0.1+st.3"
},
{
"name": "ninja",
"version": "^1.12.1+st.9"
},
{
"name": "gnu-tools-for-stm32",
"version": "^13.3.1+st.8"
},
{
"name": "st-arm-clangd",
"version": "^19.1.2+st.3"
}
]
}

6
.settings/ide.store.json Normal file
View file

@ -0,0 +1,6 @@
{
"device": "STM32F407VET6",
"core": "Cortex-M4",
"order": 0,
"toolchain": "GCC"
}

20
.vscode/c_cpp_properties.json vendored
View file

@ -1,20 +1,10 @@
{ {
"configurations": [ "configurations": [
{ {
"name": "Linux", "name": "STM32",
"includePath": [ "configurationProvider": "ms-vscode.cmake-tools",
"${workspaceFolder}/**" "intelliSenseMode": "${default}",
], "compileCommands": "${workspaceFolder}/build/Debug/compile_commands.json"
"defines": [
"CMDLINE",
"USE_FULL_LL_DRIVER",
"HAVE_CONFIG"
],
"compilerPath": "/usr/bin/gcc",
"cStandard": "c11",
"cppStandard": "c++17",
"intelliSenseMode": "clang-x64"
} }
], ]
"version": 4
} }

19
.vscode/extensions.json vendored Normal file
View file

@ -0,0 +1,19 @@
{
"recommendations": [
"ms-vscode.cpptools", // (dependencies to ms-vscode.cpptools-extension-pack)
"ms-vscode.cpptools-themes", // (dependencies to ms-vscode.cpptools-extension-pack)
"ms-vscode.cmake-tools", // (dependencies to ms-vscode.cpptools-extension-pack)
"twxs.cmake", // (dependencies to ms-vscode.cpptools-extension-pack)
"ms-vscode.cpptools-extension-pack", // Provides CMake and C++ file coloring, completion & support
"dan-c-underwood.arm", // Provides syntax highlighting for the Arm Assembly language
"zixuanwang.linkerscript", // Provides syntax highlighting for linker scripts
"ms-vscode.hexeditor", // Provides hex editor fo viewing & anipulating files in their raw hexadecimal representation
"trond-snekvik.gnu-mapfiles", // Provides syntax highlighting and symbol listing for GNU linker .map files
"jeff-hykin.better-cpp-syntax", // Provides syntax highlighting for C++
"marus25.cortex-debug", // Provides debug support on Arm Cortex-M
"mcu-debug.debug-tracker-vscode", // Dependencies to "marus25.cortex-debug"
"mcu-debug.memory-view", // Dependencies to "marus25.cortex-debug"
"mcu-debug.peripheral-viewer", // Dependencies to "marus25.cortex-debug"
"mcu-debug.rtos-views" // Dependencies to "marus25.cortex-debug"
]
}

83
.vscode/launch.json vendored
View file

@ -1,22 +1,61 @@
{ {
// Use IntelliSense to learn about possible attributes. // Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes. // Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387 // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0", "version": "0.2.0",
"configurations": [ "configurations": [
{ {
"type": "cortex-debug", "name": "Build & Debug Microcontroller - ST-Link",
"request": "launch", "cwd": "${workspaceFolder}",
"name": "Debug (OpenOCD)", "type": "cortex-debug",
"preLaunchTask": "build", "executable": "${command:cmake.launchTargetPath}",
"cwd": "${workspaceRoot}", // Let CMake extension decide executable: "${command:cmake.launchTargetPath}"
"executable": "./build/f407ve_hs_uart.elf", // Or fixed file path: "${workspaceFolder}/path/to/filename.elf"
"servertype": "openocd", "request": "launch",
"configFiles": [ "servertype": "stlink",
"interface/stlink.cfg", "device": "STM32F407VETx", //MCU used
"target/stm32f4x.cfg", "interface": "swd",
], "serialNumber": "", //Set ST-Link ID if you use multiple at the same time
"svdFile": "./STM32F40x.svd" "runToEntryPoint": "main",
} "svdFile": "${config:STM32VSCodeExtension.cubeCLT.path}/STMicroelectronics_CMSIS_SVD/STM32F407.svd",
] "v1": false, //Change it depending on ST Link version
} "serverpath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
"stm32cubeprogrammer":"${config:STM32VSCodeExtension.cubeCLT.path}/STM32CubeProgrammer/bin",
"stlinkPath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
"armToolchainPath": "${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin",
"gdbPath":"${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin/arm-none-eabi-gdb",
"serverArgs": [
"-m","0",
],
//"preLaunchTask": "Build + Flash"
/* If you use external loader, add additional arguments */
//"serverArgs": ["--extload", "path/to/ext/loader.stldr"],
},
{
"name": "Attach to Microcontroller - ST-Link",
"cwd": "${workspaceFolder}",
"type": "cortex-debug",
"executable": "${command:cmake.launchTargetPath}",
// Let CMake extension decide executable: "${command:cmake.launchTargetPath}"
// Or fixed file path: "${workspaceFolder}/path/to/filename.elf"
"request": "attach",
"servertype": "stlink",
"device": "STM32F407VETx", //MCU used
"interface": "swd",
"serialNumber": "", //Set ST-Link ID if you use multiple at the same time
"runToEntryPoint": "main",
"svdFile": "${config:STM32VSCodeExtension.cubeCLT.path}/STMicroelectronics_CMSIS_SVD/STM32F407.svd",
"v1": false, //Change it depending on ST Link version
"serverpath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
"stm32cubeprogrammer":"${config:STM32VSCodeExtension.cubeCLT.path}/STM32CubeProgrammer/bin",
"stlinkPath": "${config:STM32VSCodeExtension.cubeCLT.path}/STLink-gdb-server/bin/ST-LINK_gdbserver",
"armToolchainPath": "${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin",
"gdbPath":"${config:STM32VSCodeExtension.cubeCLT.path}/GNU-tools-for-STM32/bin/arm-none-eabi-gdb",
"serverArgs": [
"-m","0",
],
/* If you use external loader, add additional arguments */
//"serverArgs": ["--extload", "path/to/ext/loader.stldr"],
}
]
}

9
.vscode/settings.json vendored Normal file
View file

@ -0,0 +1,9 @@
{
"cmake.cmakePath": "cube-cmake",
"cmake.configureArgs": [
"-DCMAKE_COMMAND=cube-cmake"
],
"cmake.preferredGenerators": [
"Ninja"
]
}

92
.vscode/tasks.json vendored
View file

@ -1,30 +1,62 @@
{ {
// See https://go.microsoft.com/fwlink/?LinkId=733558 "version": "2.0.0",
// for the documentation about the tasks.json format "windows": {
"version": "2.0.0", "options": {
"shell": {
"command": "make", "executable": "cmd.exe",
"showOutput": "always", "args": ["/d", "/c"]
}
"tasks": [ }
{ },
"taskName": "build", "tasks": [
"type": "shell", {
"args": [ "type": "shell",
"all", "label": "CubeProg: Flash project (SWD)",
"-j8" "command": "STM32_Programmer_CLI",
], "args": [
"problemMatcher": [ "--connect",
"$gcc" "port=swd",
] "--download",
}, "${command:cmake.launchTargetPath}",
{ // Let CMake extension decide executable: "${command:cmake.launchTargetPath}",
"taskName": "clean", "-hardRst", // Hardware reset - if rst pin is connected
"type": "shell", "-rst", // Software reset (backup)
"args": [ "--start" // Start execution
"clean" ],
], "options": {
"problemMatcher": [] "cwd": "${workspaceFolder}"
} },
] "problemMatcher": []
} },
{
"label": "Build + Flash",
"dependsOrder": "sequence",
"dependsOn": [
"CMake: clean rebuild",
"CubeProg: Flash project (SWD)",
]
},
{
"type": "cmake",
"label": "CMake: clean rebuild",
"command": "cleanRebuild",
"targets": [
"all"
],
"preset": "${command:cmake.activeBuildPresetName}",
"group": "build",
"problemMatcher": [],
"detail": "CMake template clean rebuild task"
},
{
"type": "shell",
"label": "CubeProg: List all available communication interfaces",
"command": "STM32_Programmer_CLI",
"args": ["--list"],
"options": {
"cwd": "${workspaceFolder}"
},
"problemMatcher": []
}
]
}

392
CMakeCache.txt Normal file
View file

@ -0,0 +1,392 @@
# This is the CMakeCache file.
# For build in directory: /mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
# It was generated by CMake: /usr/bin/cmake
# You can edit this file to change values found and used by cmake.
# If you do not want to change any of the values, simply exit the editor.
# If you do want to change a value, simply edit, save, and exit the editor.
# The syntax for the file is as follows:
# KEY:TYPE=VALUE
# KEY is the name of a variable in the cache.
# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!.
# VALUE is the current value for the KEY.
########################
# EXTERNAL cache entries
########################
//Path to a program.
CMAKE_ADDR2LINE:FILEPATH=/usr/bin/arm-none-eabi-addr2line
//Path to a program.
CMAKE_AR:FILEPATH=/usr/bin/arm-none-eabi-ar
//A wrapper around 'ar' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_ASM_COMPILER_AR:FILEPATH=/usr/bin/arm-none-eabi-gcc-ar
//A wrapper around 'ranlib' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_ASM_COMPILER_RANLIB:FILEPATH=/usr/bin/arm-none-eabi-gcc-ranlib
//Flags used by the ASM compiler during all build types.
CMAKE_ASM_FLAGS:STRING=
//Flags used by the ASM compiler during DEBUG builds.
CMAKE_ASM_FLAGS_DEBUG:STRING=-g
//Flags used by the ASM compiler during MINSIZEREL builds.
CMAKE_ASM_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG
//Flags used by the ASM compiler during RELEASE builds.
CMAKE_ASM_FLAGS_RELEASE:STRING=-O3 -DNDEBUG
//Flags used by the ASM compiler during RELWITHDEBINFO builds.
CMAKE_ASM_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG
//Choose the type of build, options are: None Debug Release RelWithDebInfo
// MinSizeRel ...
CMAKE_BUILD_TYPE:STRING=
//A wrapper around 'ar' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/arm-none-eabi-gcc-ar
//A wrapper around 'ranlib' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/arm-none-eabi-gcc-ranlib
//Flags used by the CXX compiler during all build types.
CMAKE_CXX_FLAGS:STRING=
//Flags used by the CXX compiler during DEBUG builds.
CMAKE_CXX_FLAGS_DEBUG:STRING=-g
//Flags used by the CXX compiler during MINSIZEREL builds.
CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG
//Flags used by the CXX compiler during RELEASE builds.
CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG
//Flags used by the CXX compiler during RELWITHDEBINFO builds.
CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG
//A wrapper around 'ar' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/arm-none-eabi-gcc-ar
//A wrapper around 'ranlib' adding the appropriate '--plugin' option
// for the GCC compiler
CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/arm-none-eabi-gcc-ranlib
//Flags used by the C compiler during all build types.
CMAKE_C_FLAGS:STRING=
//Flags used by the C compiler during DEBUG builds.
CMAKE_C_FLAGS_DEBUG:STRING=-g
//Flags used by the C compiler during MINSIZEREL builds.
CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG
//Flags used by the C compiler during RELEASE builds.
CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG
//Flags used by the C compiler during RELWITHDEBINFO builds.
CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG
//Path to a program.
CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND
//Flags used by the linker during all build types.
CMAKE_EXE_LINKER_FLAGS:STRING=
//Flags used by the linker during DEBUG builds.
CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING=
//Flags used by the linker during MINSIZEREL builds.
CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING=
//Flags used by the linker during RELEASE builds.
CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING=
//Flags used by the linker during RELWITHDEBINFO builds.
CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING=
//Enable/Disable output of build database during the build.
CMAKE_EXPORT_BUILD_DATABASE:BOOL=
//Value Computed by CMake.
CMAKE_FIND_PACKAGE_REDIRECTS_DIR:STATIC=/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/pkgRedirects
//Install path prefix, prepended onto install directories.
CMAKE_INSTALL_PREFIX:PATH=/usr/local
//Program used to build from build.ninja files.
CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/ninja
//Flags used by the linker during the creation of modules during
// all build types.
CMAKE_MODULE_LINKER_FLAGS:STRING=
//Flags used by the linker during the creation of modules during
// DEBUG builds.
CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING=
//Flags used by the linker during the creation of modules during
// MINSIZEREL builds.
CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING=
//Flags used by the linker during the creation of modules during
// RELEASE builds.
CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING=
//Flags used by the linker during the creation of modules during
// RELWITHDEBINFO builds.
CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING=
//Path to a program.
CMAKE_NM:FILEPATH=/usr/bin/arm-none-eabi-nm
//Path to a program.
CMAKE_OBJDUMP:FILEPATH=/usr/bin/arm-none-eabi-objdump
//Value Computed by CMake
CMAKE_PROJECT_DESCRIPTION:STATIC=
//Value Computed by CMake
CMAKE_PROJECT_HOMEPAGE_URL:STATIC=
//Value Computed by CMake
CMAKE_PROJECT_NAME:STATIC=f407ve_hs_uart
//Path to a program.
CMAKE_RANLIB:FILEPATH=/usr/bin/arm-none-eabi-ranlib
//Path to a program.
CMAKE_READELF:FILEPATH=/usr/bin/arm-none-eabi-readelf
//Flags used by the linker during the creation of shared libraries
// during all build types.
CMAKE_SHARED_LINKER_FLAGS:STRING=
//Flags used by the linker during the creation of shared libraries
// during DEBUG builds.
CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING=
//Flags used by the linker during the creation of shared libraries
// during MINSIZEREL builds.
CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING=
//Flags used by the linker during the creation of shared libraries
// during RELEASE builds.
CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING=
//Flags used by the linker during the creation of shared libraries
// during RELWITHDEBINFO builds.
CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING=
//If set, runtime paths are not added when installing shared libraries,
// but are added when building.
CMAKE_SKIP_INSTALL_RPATH:BOOL=NO
//If set, runtime paths are not added when using shared libraries.
CMAKE_SKIP_RPATH:BOOL=NO
//Flags used by the linker during the creation of static libraries
// during all build types.
CMAKE_STATIC_LINKER_FLAGS:STRING=
//Flags used by the linker during the creation of static libraries
// during DEBUG builds.
CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING=
//Flags used by the linker during the creation of static libraries
// during MINSIZEREL builds.
CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING=
//Flags used by the linker during the creation of static libraries
// during RELEASE builds.
CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING=
//Flags used by the linker during the creation of static libraries
// during RELWITHDEBINFO builds.
CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING=
//Path to a program.
CMAKE_STRIP:FILEPATH=/usr/bin/arm-none-eabi-strip
//Path to a program.
CMAKE_TAPI:FILEPATH=CMAKE_TAPI-NOTFOUND
//If this value is on, makefiles will be generated without the
// .SILENT directive, and all commands will be echoed to the console
// during the make. This is useful for debugging only. With Visual
// Studio IDE projects all commands are done without /nologo.
CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE
//Value Computed by CMake
f407ve_hs_uart_BINARY_DIR:STATIC=/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
//Value Computed by CMake
f407ve_hs_uart_IS_TOP_LEVEL:STATIC=ON
//Value Computed by CMake
f407ve_hs_uart_SOURCE_DIR:STATIC=/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
########################
# INTERNAL cache entries
########################
//ADVANCED property for variable: CMAKE_ADDR2LINE
CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_AR
CMAKE_AR-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_COMPILER_AR
CMAKE_ASM_COMPILER_AR-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_COMPILER_RANLIB
CMAKE_ASM_COMPILER_RANLIB-ADVANCED:INTERNAL=1
CMAKE_ASM_COMPILER_WORKS:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_FLAGS
CMAKE_ASM_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_FLAGS_DEBUG
CMAKE_ASM_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_FLAGS_MINSIZEREL
CMAKE_ASM_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_FLAGS_RELEASE
CMAKE_ASM_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_ASM_FLAGS_RELWITHDEBINFO
CMAKE_ASM_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//This is the directory where this CMakeCache.txt was created
CMAKE_CACHEFILE_DIR:INTERNAL=/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
//Major version of cmake used to create the current loaded cache
CMAKE_CACHE_MAJOR_VERSION:INTERNAL=4
//Minor version of cmake used to create the current loaded cache
CMAKE_CACHE_MINOR_VERSION:INTERNAL=0
//Patch version of cmake used to create the current loaded cache
CMAKE_CACHE_PATCH_VERSION:INTERNAL=2
//Path to CMake executable.
CMAKE_COMMAND:INTERNAL=/usr/bin/cmake
//Path to cpack program executable.
CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack
//Path to ctest program executable.
CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest
//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR
CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB
CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_FLAGS
CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG
CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL
CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE
CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO
CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_COMPILER_AR
CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB
CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_FLAGS
CMAKE_C_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG
CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL
CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE
CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO
CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_DLLTOOL
CMAKE_DLLTOOL-ADVANCED:INTERNAL=1
//Path to cache edit program executable.
CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake
//Executable file format
CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF
//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS
CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG
CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL
CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE
CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO
CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_EXPORT_BUILD_DATABASE
CMAKE_EXPORT_BUILD_DATABASE-ADVANCED:INTERNAL=1
//Name of external makefile project generator.
CMAKE_EXTRA_GENERATOR:INTERNAL=
//Name of generator.
CMAKE_GENERATOR:INTERNAL=Ninja
//Generator instance identifier.
CMAKE_GENERATOR_INSTANCE:INTERNAL=
//Name of generator platform.
CMAKE_GENERATOR_PLATFORM:INTERNAL=
//Name of generator toolset.
CMAKE_GENERATOR_TOOLSET:INTERNAL=
//Source directory with the top level CMakeLists.txt file for this
// project
CMAKE_HOME_DIRECTORY:INTERNAL=/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
//Name of CMakeLists files to read
CMAKE_LIST_FILE_NAME:INTERNAL=CMakeLists.txt
//ADVANCED property for variable: CMAKE_MAKE_PROGRAM
CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS
CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG
CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL
CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE
CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO
CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_NM
CMAKE_NM-ADVANCED:INTERNAL=1
//number of local generators
CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=2
//ADVANCED property for variable: CMAKE_OBJDUMP
CMAKE_OBJDUMP-ADVANCED:INTERNAL=1
//Platform information initialized
CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1
//ADVANCED property for variable: CMAKE_RANLIB
CMAKE_RANLIB-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_READELF
CMAKE_READELF-ADVANCED:INTERNAL=1
//Path to CMake installation.
CMAKE_ROOT:INTERNAL=/usr/share/cmake
//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS
CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG
CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL
CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE
CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO
CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH
CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_SKIP_RPATH
CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS
CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG
CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL
CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE
CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO
CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_STRIP
CMAKE_STRIP-ADVANCED:INTERNAL=1
//ADVANCED property for variable: CMAKE_TAPI
CMAKE_TAPI-ADVANCED:INTERNAL=1
//uname command
CMAKE_UNAME:INTERNAL=/usr/bin/uname
//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE
CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1

30
CMakeFiles/4.0.2-dirty/CMakeASMCompiler.cmake Normal file
View file

@ -0,0 +1,30 @@
set(CMAKE_ASM_COMPILER "/usr/bin/arm-none-eabi-gcc")
set(CMAKE_ASM_COMPILER_ARG1 "")
set(CMAKE_AR "/usr/bin/arm-none-eabi-ar")
set(CMAKE_ASM_COMPILER_AR "/usr/bin/arm-none-eabi-gcc-ar")
set(CMAKE_RANLIB "/usr/bin/arm-none-eabi-ranlib")
set(CMAKE_ASM_COMPILER_RANLIB "/usr/bin/arm-none-eabi-gcc-ranlib")
set(CMAKE_LINKER "/usr/bin/arm-none-eabi-g++")
set(CMAKE_LINKER_LINK "")
set(CMAKE_LINKER_LLD "")
set(CMAKE_ASM_COMPILER_LINKER "")
set(CMAKE_ASM_COMPILER_LINKER_ID "")
set(CMAKE_ASM_COMPILER_LINKER_VERSION )
set(CMAKE_ASM_COMPILER_LINKER_FRONTEND_VARIANT )
set(CMAKE_MT "")
set(CMAKE_TAPI "CMAKE_TAPI-NOTFOUND")
set(CMAKE_ASM_COMPILER_LOADED 1)
set(CMAKE_ASM_COMPILER_ID "GNU")
set(CMAKE_ASM_COMPILER_VERSION "")
set(CMAKE_ASM_COMPILER_ENV_VAR "ASM")
set(CMAKE_ASM_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC)
set(CMAKE_ASM_LINKER_PREFERENCE 0)
set(CMAKE_ASM_LINKER_DEPFILE_SUPPORTED )
set(CMAKE_LINKER_PUSHPOP_STATE_SUPPORTED )
set(CMAKE_ASM_LINKER_PUSHPOP_STATE_SUPPORTED )

84
CMakeFiles/4.0.2-dirty/CMakeCCompiler.cmake Normal file
View file

@ -0,0 +1,84 @@
set(CMAKE_C_COMPILER "/usr/bin/arm-none-eabi-gcc")
set(CMAKE_C_COMPILER_ARG1 "")
set(CMAKE_C_COMPILER_ID "GNU")
set(CMAKE_C_COMPILER_VERSION "14.2.0")
set(CMAKE_C_COMPILER_VERSION_INTERNAL "")
set(CMAKE_C_COMPILER_WRAPPER "")
set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "17")
set(CMAKE_C_EXTENSIONS_COMPUTED_DEFAULT "ON")
set(CMAKE_C_STANDARD_LATEST "23")
set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert;c_std_17;c_std_23")
set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes")
set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros")
set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert")
set(CMAKE_C17_COMPILE_FEATURES "c_std_17")
set(CMAKE_C23_COMPILE_FEATURES "c_std_23")
set(CMAKE_C_PLATFORM_ID "")
set(CMAKE_C_SIMULATE_ID "")
set(CMAKE_C_COMPILER_FRONTEND_VARIANT "GNU")
set(CMAKE_C_COMPILER_APPLE_SYSROOT "")
set(CMAKE_C_SIMULATE_VERSION "")
set(CMAKE_AR "/usr/bin/arm-none-eabi-ar")
set(CMAKE_C_COMPILER_AR "/usr/bin/arm-none-eabi-gcc-ar")
set(CMAKE_RANLIB "/usr/bin/arm-none-eabi-ranlib")
set(CMAKE_C_COMPILER_RANLIB "/usr/bin/arm-none-eabi-gcc-ranlib")
set(CMAKE_LINKER "/usr/bin/arm-none-eabi-g++")
set(CMAKE_LINKER_LINK "")
set(CMAKE_LINKER_LLD "")
set(CMAKE_C_COMPILER_LINKER "NOTFOUND")
set(CMAKE_C_COMPILER_LINKER_ID "")
set(CMAKE_C_COMPILER_LINKER_VERSION )
set(CMAKE_C_COMPILER_LINKER_FRONTEND_VARIANT )
set(CMAKE_MT "")
set(CMAKE_TAPI "CMAKE_TAPI-NOTFOUND")
set(CMAKE_COMPILER_IS_GNUCC 1)
set(CMAKE_C_COMPILER_LOADED 1)
set(CMAKE_C_COMPILER_WORKS TRUE)
set(CMAKE_C_ABI_COMPILED TRUE)
set(CMAKE_C_COMPILER_ENV_VAR "CC")
set(CMAKE_C_COMPILER_ID_RUN 1)
set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m)
set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC)
set(CMAKE_C_LINKER_PREFERENCE 10)
set(CMAKE_C_LINKER_DEPFILE_SUPPORTED )
set(CMAKE_LINKER_PUSHPOP_STATE_SUPPORTED )
set(CMAKE_C_LINKER_PUSHPOP_STATE_SUPPORTED )
# Save compiler ABI information.
set(CMAKE_C_SIZEOF_DATA_PTR "4")
set(CMAKE_C_COMPILER_ABI "ELF")
set(CMAKE_C_BYTE_ORDER "LITTLE_ENDIAN")
set(CMAKE_C_LIBRARY_ARCHITECTURE "")
if(CMAKE_C_SIZEOF_DATA_PTR)
set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}")
endif()
if(CMAKE_C_COMPILER_ABI)
set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}")
endif()
if(CMAKE_C_LIBRARY_ARCHITECTURE)
set(CMAKE_LIBRARY_ARCHITECTURE "")
endif()
set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "")
if(CMAKE_C_CL_SHOWINCLUDES_PREFIX)
set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}")
endif()
set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/arm-none-eabi/14.2.0/include;/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed;/usr/arm-none-eabi/include")
set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "")
set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "")
set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "")

108
CMakeFiles/4.0.2-dirty/CMakeCXXCompiler.cmake Normal file
View file

@ -0,0 +1,108 @@
set(CMAKE_CXX_COMPILER "/usr/bin/arm-none-eabi-g++")
set(CMAKE_CXX_COMPILER_ARG1 "")
set(CMAKE_CXX_COMPILER_ID "GNU")
set(CMAKE_CXX_COMPILER_VERSION "14.2.0")
set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "")
set(CMAKE_CXX_COMPILER_WRAPPER "")
set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "17")
set(CMAKE_CXX_EXTENSIONS_COMPUTED_DEFAULT "ON")
set(CMAKE_CXX_STANDARD_LATEST "26")
set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20;cxx_std_23;cxx_std_26")
set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters")
set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates")
set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates")
set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17")
set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20")
set(CMAKE_CXX23_COMPILE_FEATURES "cxx_std_23")
set(CMAKE_CXX26_COMPILE_FEATURES "cxx_std_26")
set(CMAKE_CXX_PLATFORM_ID "")
set(CMAKE_CXX_SIMULATE_ID "")
set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "GNU")
set(CMAKE_CXX_COMPILER_APPLE_SYSROOT "")
set(CMAKE_CXX_SIMULATE_VERSION "")
set(CMAKE_AR "/usr/bin/arm-none-eabi-ar")
set(CMAKE_CXX_COMPILER_AR "/usr/bin/arm-none-eabi-gcc-ar")
set(CMAKE_RANLIB "/usr/bin/arm-none-eabi-ranlib")
set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/arm-none-eabi-gcc-ranlib")
set(CMAKE_LINKER "/usr/bin/arm-none-eabi-g++")
set(CMAKE_LINKER_LINK "")
set(CMAKE_LINKER_LLD "")
set(CMAKE_CXX_COMPILER_LINKER "[1/2] /usr/bin/arm-none-eabi-g++")
set(CMAKE_CXX_COMPILER_LINKER_ID "")
set(CMAKE_CXX_COMPILER_LINKER_VERSION )
set(CMAKE_CXX_COMPILER_LINKER_FRONTEND_VARIANT )
set(CMAKE_MT "")
set(CMAKE_TAPI "CMAKE_TAPI-NOTFOUND")
set(CMAKE_COMPILER_IS_GNUCXX 1)
set(CMAKE_CXX_COMPILER_LOADED 1)
set(CMAKE_CXX_COMPILER_WORKS TRUE)
set(CMAKE_CXX_ABI_COMPILED TRUE)
set(CMAKE_CXX_COMPILER_ENV_VAR "CXX")
set(CMAKE_CXX_COMPILER_ID_RUN 1)
set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;mpp;CPP;ixx;cppm;ccm;cxxm;c++m)
set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC)
foreach (lang IN ITEMS C OBJC OBJCXX)
if (CMAKE_${lang}_COMPILER_ID_RUN)
foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS)
list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension})
endforeach()
endif()
endforeach()
set(CMAKE_CXX_LINKER_PREFERENCE 30)
set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1)
set(CMAKE_CXX_LINKER_DEPFILE_SUPPORTED )
set(CMAKE_LINKER_PUSHPOP_STATE_SUPPORTED )
set(CMAKE_CXX_LINKER_PUSHPOP_STATE_SUPPORTED )
# Save compiler ABI information.
set(CMAKE_CXX_SIZEOF_DATA_PTR "4")
set(CMAKE_CXX_COMPILER_ABI "ELF")
set(CMAKE_CXX_BYTE_ORDER "LITTLE_ENDIAN")
set(CMAKE_CXX_LIBRARY_ARCHITECTURE "")
if(CMAKE_CXX_SIZEOF_DATA_PTR)
set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}")
endif()
if(CMAKE_CXX_COMPILER_ABI)
set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}")
endif()
if(CMAKE_CXX_LIBRARY_ARCHITECTURE)
set(CMAKE_LIBRARY_ARCHITECTURE "")
endif()
set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "")
if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX)
set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}")
endif()
set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/arm-none-eabi/include/c++/14.2.0;/usr/arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard;/usr/arm-none-eabi/include/c++/14.2.0/backward;/usr/lib/gcc/arm-none-eabi/14.2.0/include;/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed;/usr/arm-none-eabi/include")
set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "")
set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "")
set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "")
set(CMAKE_CXX_COMPILER_CLANG_RESOURCE_DIR "")
set(CMAKE_CXX_COMPILER_IMPORT_STD "")
### Imported target for C++23 standard library
set(CMAKE_CXX23_COMPILER_IMPORT_STD_NOT_FOUND_MESSAGE "Experimental `import std` support not enabled when detecting toolchain; it must be set before `CXX` is enabled (usually a `project()` call)")
### Imported target for C++26 standard library
set(CMAKE_CXX26_COMPILER_IMPORT_STD_NOT_FOUND_MESSAGE "Experimental `import std` support not enabled when detecting toolchain; it must be set before `CXX` is enabled (usually a `project()` call)")

BIN
CMakeFiles/4.0.2-dirty/CMakeDetermineCompilerABI_C.bin Normal file
View file

Binary file not shown.

BIN
CMakeFiles/4.0.2-dirty/CMakeDetermineCompilerABI_CXX.bin Normal file
View file

Binary file not shown.

15
CMakeFiles/4.0.2-dirty/CMakeSystem.cmake Normal file
View file

@ -0,0 +1,15 @@
set(CMAKE_HOST_SYSTEM "Linux-6.14.10-arch1-1")
set(CMAKE_HOST_SYSTEM_NAME "Linux")
set(CMAKE_HOST_SYSTEM_VERSION "6.14.10-arch1-1")
set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64")
set(CMAKE_SYSTEM "Generic")
set(CMAKE_SYSTEM_NAME "Generic")
set(CMAKE_SYSTEM_VERSION "")
set(CMAKE_SYSTEM_PROCESSOR "arm")
set(CMAKE_CROSSCOMPILING "TRUE")
set(CMAKE_SYSTEM_LOADED 1)

905
CMakeFiles/4.0.2-dirty/CompilerIdC/CMakeCCompilerId.c Normal file
View file

@ -0,0 +1,905 @@
#ifdef __cplusplus
# error "A C++ compiler has been selected for C."
#endif
#if defined(__18CXX)
# define ID_VOID_MAIN
#endif
#if defined(__CLASSIC_C__)
/* cv-qualifiers did not exist in K&R C */
# define const
# define volatile
#endif
#if !defined(__has_include)
/* If the compiler does not have __has_include, pretend the answer is
always no. */
# define __has_include(x) 0
#endif
/* Version number components: V=Version, R=Revision, P=Patch
Version date components: YYYY=Year, MM=Month, DD=Day */
#if defined(__INTEL_COMPILER) || defined(__ICC)
# define COMPILER_ID "Intel"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# if defined(__GNUC__)
# define SIMULATE_ID "GNU"
# endif
/* __INTEL_COMPILER = VRP prior to 2021, and then VVVV for 2021 and later,
except that a few beta releases use the old format with V=2021. */
# if __INTEL_COMPILER < 2021 || __INTEL_COMPILER == 202110 || __INTEL_COMPILER == 202111
# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100)
# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10)
# if defined(__INTEL_COMPILER_UPDATE)
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE)
# else
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10)
# endif
# else
# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER)
# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE)
/* The third version component from --version is an update index,
but no macro is provided for it. */
# define COMPILER_VERSION_PATCH DEC(0)
# endif
# if defined(__INTEL_COMPILER_BUILD_DATE)
/* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */
# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE)
# endif
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
# if defined(__GNUC__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
# elif defined(__GNUG__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
# endif
# if defined(__GNUC_MINOR__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
# endif
# if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER)
# define COMPILER_ID "IntelLLVM"
#if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
#endif
#if defined(__GNUC__)
# define SIMULATE_ID "GNU"
#endif
/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and
* later. Look for 6 digit vs. 8 digit version number to decide encoding.
* VVVV is no smaller than the current year when a version is released.
*/
#if __INTEL_LLVM_COMPILER < 1000000L
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10)
#else
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100)
#endif
#if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
#endif
#if defined(__GNUC__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
#elif defined(__GNUG__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
#endif
#if defined(__GNUC_MINOR__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
#endif
#if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
#endif
#elif defined(__PATHCC__)
# define COMPILER_ID "PathScale"
# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
# if defined(__PATHCC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
# endif
#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
# define COMPILER_ID "Embarcadero"
# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF)
#elif defined(__BORLANDC__)
# define COMPILER_ID "Borland"
/* __BORLANDC__ = 0xVRR */
# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
# define COMPILER_ID "Watcom"
/* __WATCOMC__ = VVRR */
# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__WATCOMC__)
# define COMPILER_ID "OpenWatcom"
/* __WATCOMC__ = VVRP + 1100 */
# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__SUNPRO_C)
# define COMPILER_ID "SunPro"
# if __SUNPRO_C >= 0x5100
/* __SUNPRO_C = 0xVRRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF)
# else
/* __SUNPRO_CC = 0xVRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF)
# endif
#elif defined(__HP_cc)
# define COMPILER_ID "HP"
/* __HP_cc = VVRRPP */
# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000)
# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100)
#elif defined(__DECC)
# define COMPILER_ID "Compaq"
/* __DECC_VER = VVRRTPPPP */
# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000)
# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100)
# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000)
#elif defined(__IBMC__) && defined(__COMPILER_VER__)
# define COMPILER_ID "zOS"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__open_xl__) && defined(__clang__)
# define COMPILER_ID "IBMClang"
# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__)
# define COMPILER_VERSION_MINOR DEC(__open_xl_release__)
# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(__ibmxl__) && defined(__clang__)
# define COMPILER_ID "XLClang"
# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800
# define COMPILER_ID "XL"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800
# define COMPILER_ID "VisualAge"
/* __IBMC__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
#elif defined(__NVCOMPILER)
# define COMPILER_ID "NVHPC"
# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
# if defined(__NVCOMPILER_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
# endif
#elif defined(__PGI)
# define COMPILER_ID "PGI"
# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
# if defined(__PGIC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
# endif
#elif defined(__clang__) && defined(__cray__)
# define COMPILER_ID "CrayClang"
# define COMPILER_VERSION_MAJOR DEC(__cray_major__)
# define COMPILER_VERSION_MINOR DEC(__cray_minor__)
# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(_CRAYC)
# define COMPILER_ID "Cray"
# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
#elif defined(__TI_COMPILER_VERSION__)
# define COMPILER_ID "TI"
/* __TI_COMPILER_VERSION__ = VVVRRRPPP */
# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000)
# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000)
#elif defined(__CLANG_FUJITSU)
# define COMPILER_ID "FujitsuClang"
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(__FUJITSU)
# define COMPILER_ID "Fujitsu"
# if defined(__FCC_version__)
# define COMPILER_VERSION __FCC_version__
# elif defined(__FCC_major__)
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# endif
# if defined(__fcc_version)
# define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
# elif defined(__FCC_VERSION)
# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
# endif
#elif defined(__ghs__)
# define COMPILER_ID "GHS"
/* __GHS_VERSION_NUMBER = VVVVRP */
# ifdef __GHS_VERSION_NUMBER
# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10)
# endif
#elif defined(__TASKING__)
# define COMPILER_ID "Tasking"
# define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000)
# define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100)
# define COMPILER_VERSION_INTERNAL DEC(__VERSION__)
#elif defined(__ORANGEC__)
# define COMPILER_ID "OrangeC"
# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__)
#elif defined(__TINYC__)
# define COMPILER_ID "TinyCC"
#elif defined(__BCC__)
# define COMPILER_ID "Bruce"
#elif defined(__SCO_VERSION__)
# define COMPILER_ID "SCO"
#elif defined(__ARMCC_VERSION) && !defined(__clang__)
# define COMPILER_ID "ARMCC"
#if __ARMCC_VERSION >= 1000000
/* __ARMCC_VERSION = VRRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#else
/* __ARMCC_VERSION = VRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#endif
#elif defined(__clang__) && defined(__apple_build_version__)
# define COMPILER_ID "AppleClang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
# define COMPILER_ID "ARMClang"
# define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100)
# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
#elif defined(__clang__) && defined(__ti__)
# define COMPILER_ID "TIClang"
# define COMPILER_VERSION_MAJOR DEC(__ti_major__)
# define COMPILER_VERSION_MINOR DEC(__ti_minor__)
# define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__)
# define COMPILER_VERSION_INTERNAL DEC(__ti_version__)
#elif defined(__clang__)
# define COMPILER_ID "Clang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
# define COMPILER_ID "LCC"
# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100)
# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100)
# if defined(__LCC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
# endif
# if defined(__GNUC__) && defined(__GNUC_MINOR__)
# define SIMULATE_ID "GNU"
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
# if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
# endif
#elif defined(__GNUC__)
# define COMPILER_ID "GNU"
# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
# if defined(__GNUC_MINOR__)
# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
# endif
# if defined(__GNUC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
#elif defined(_MSC_VER)
# define COMPILER_ID "MSVC"
/* _MSC_VER = VVRR */
# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
# if defined(_MSC_FULL_VER)
# if _MSC_VER >= 1400
/* _MSC_FULL_VER = VVRRPPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
# else
/* _MSC_FULL_VER = VVRRPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
# endif
# endif
# if defined(_MSC_BUILD)
# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
# endif
#elif defined(_ADI_COMPILER)
# define COMPILER_ID "ADSP"
#if defined(__VERSIONNUM__)
/* __VERSIONNUM__ = 0xVVRRPPTT */
# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
#endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# define COMPILER_ID "IAR"
# if defined(__VER__) && defined(__ICCARM__)
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# endif
#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC)
# define COMPILER_ID "SDCC"
# if defined(__SDCC_VERSION_MAJOR)
# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR)
# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR)
# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH)
# else
/* SDCC = VRP */
# define COMPILER_VERSION_MAJOR DEC(SDCC/100)
# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10)
# define COMPILER_VERSION_PATCH DEC(SDCC % 10)
# endif
/* These compilers are either not known or too old to define an
identification macro. Try to identify the platform and guess that
it is the native compiler. */
#elif defined(__hpux) || defined(__hpua)
# define COMPILER_ID "HP"
#else /* unknown compiler */
# define COMPILER_ID ""
#endif
/* Construct the string literal in pieces to prevent the source from
getting matched. Store it in a pointer rather than an array
because some compilers will just produce instructions to fill the
array rather than assigning a pointer to a static array. */
char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
#ifdef SIMULATE_ID
char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
#endif
#ifdef __QNXNTO__
char const* qnxnto = "INFO" ":" "qnxnto[]";
#endif
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
#endif
#define STRINGIFY_HELPER(X) #X
#define STRINGIFY(X) STRINGIFY_HELPER(X)
/* Identify known platforms by name. */
#if defined(__linux) || defined(__linux__) || defined(linux)
# define PLATFORM_ID "Linux"
#elif defined(__MSYS__)
# define PLATFORM_ID "MSYS"
#elif defined(__CYGWIN__)
# define PLATFORM_ID "Cygwin"
#elif defined(__MINGW32__)
# define PLATFORM_ID "MinGW"
#elif defined(__APPLE__)
# define PLATFORM_ID "Darwin"
#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
# define PLATFORM_ID "Windows"
#elif defined(__FreeBSD__) || defined(__FreeBSD)
# define PLATFORM_ID "FreeBSD"
#elif defined(__NetBSD__) || defined(__NetBSD)
# define PLATFORM_ID "NetBSD"
#elif defined(__OpenBSD__) || defined(__OPENBSD)
# define PLATFORM_ID "OpenBSD"
#elif defined(__sun) || defined(sun)
# define PLATFORM_ID "SunOS"
#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
# define PLATFORM_ID "AIX"
#elif defined(__hpux) || defined(__hpux__)
# define PLATFORM_ID "HP-UX"
#elif defined(__HAIKU__)
# define PLATFORM_ID "Haiku"
#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
# define PLATFORM_ID "BeOS"
#elif defined(__QNX__) || defined(__QNXNTO__)
# define PLATFORM_ID "QNX"
#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
# define PLATFORM_ID "Tru64"
#elif defined(__riscos) || defined(__riscos__)
# define PLATFORM_ID "RISCos"
#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
# define PLATFORM_ID "SINIX"
#elif defined(__UNIX_SV__)
# define PLATFORM_ID "UNIX_SV"
#elif defined(__bsdos__)
# define PLATFORM_ID "BSDOS"
#elif defined(_MPRAS) || defined(MPRAS)
# define PLATFORM_ID "MP-RAS"
#elif defined(__osf) || defined(__osf__)
# define PLATFORM_ID "OSF1"
#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
# define PLATFORM_ID "SCO_SV"
#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
# define PLATFORM_ID "ULTRIX"
#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
# define PLATFORM_ID "Xenix"
#elif defined(__WATCOMC__)
# if defined(__LINUX__)
# define PLATFORM_ID "Linux"
# elif defined(__DOS__)
# define PLATFORM_ID "DOS"
# elif defined(__OS2__)
# define PLATFORM_ID "OS2"
# elif defined(__WINDOWS__)
# define PLATFORM_ID "Windows3x"
# elif defined(__VXWORKS__)
# define PLATFORM_ID "VxWorks"
# else /* unknown platform */
# define PLATFORM_ID
# endif
#elif defined(__INTEGRITY)
# if defined(INT_178B)
# define PLATFORM_ID "Integrity178"
# else /* regular Integrity */
# define PLATFORM_ID "Integrity"
# endif
# elif defined(_ADI_COMPILER)
# define PLATFORM_ID "ADSP"
#else /* unknown platform */
# define PLATFORM_ID
#endif
/* For windows compilers MSVC and Intel we can determine
the architecture of the compiler being used. This is because
the compilers do not have flags that can change the architecture,
but rather depend on which compiler is being used
*/
#if defined(_WIN32) && defined(_MSC_VER)
# if defined(_M_IA64)
# define ARCHITECTURE_ID "IA64"
# elif defined(_M_ARM64EC)
# define ARCHITECTURE_ID "ARM64EC"
# elif defined(_M_X64) || defined(_M_AMD64)
# define ARCHITECTURE_ID "x64"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# elif defined(_M_ARM64)
# define ARCHITECTURE_ID "ARM64"
# elif defined(_M_ARM)
# if _M_ARM == 4
# define ARCHITECTURE_ID "ARMV4I"
# elif _M_ARM == 5
# define ARCHITECTURE_ID "ARMV5I"
# else
# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
# endif
# elif defined(_M_MIPS)
# define ARCHITECTURE_ID "MIPS"
# elif defined(_M_SH)
# define ARCHITECTURE_ID "SHx"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__WATCOMC__)
# if defined(_M_I86)
# define ARCHITECTURE_ID "I86"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# if defined(__ICCARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__ICCRX__)
# define ARCHITECTURE_ID "RX"
# elif defined(__ICCRH850__)
# define ARCHITECTURE_ID "RH850"
# elif defined(__ICCRL78__)
# define ARCHITECTURE_ID "RL78"
# elif defined(__ICCRISCV__)
# define ARCHITECTURE_ID "RISCV"
# elif defined(__ICCAVR__)
# define ARCHITECTURE_ID "AVR"
# elif defined(__ICC430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__ICCV850__)
# define ARCHITECTURE_ID "V850"
# elif defined(__ICC8051__)
# define ARCHITECTURE_ID "8051"
# elif defined(__ICCSTM8__)
# define ARCHITECTURE_ID "STM8"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__ghs__)
# if defined(__PPC64__)
# define ARCHITECTURE_ID "PPC64"
# elif defined(__ppc__)
# define ARCHITECTURE_ID "PPC"
# elif defined(__ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__x86_64__)
# define ARCHITECTURE_ID "x64"
# elif defined(__i386__)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__clang__) && defined(__ti__)
# if defined(__ARM_ARCH)
# define ARCHITECTURE_ID "ARM"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__TI_COMPILER_VERSION__)
# if defined(__TI_ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__MSP430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__TMS320C28XX__)
# define ARCHITECTURE_ID "TMS320C28x"
# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
# define ARCHITECTURE_ID "TMS320C6x"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
# elif defined(__ADSPSHARC__)
# define ARCHITECTURE_ID "SHARC"
# elif defined(__ADSPBLACKFIN__)
# define ARCHITECTURE_ID "Blackfin"
#elif defined(__TASKING__)
# if defined(__CTC__) || defined(__CPTC__)
# define ARCHITECTURE_ID "TriCore"
# elif defined(__CMCS__)
# define ARCHITECTURE_ID "MCS"
# elif defined(__CARM__) || defined(__CPARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__CARC__)
# define ARCHITECTURE_ID "ARC"
# elif defined(__C51__)
# define ARCHITECTURE_ID "8051"
# elif defined(__CPCP__)
# define ARCHITECTURE_ID "PCP"
# else
# define ARCHITECTURE_ID ""
# endif
#else
# define ARCHITECTURE_ID
#endif
/* Convert integer to decimal digit literals. */
#define DEC(n) \
('0' + (((n) / 10000000)%10)), \
('0' + (((n) / 1000000)%10)), \
('0' + (((n) / 100000)%10)), \
('0' + (((n) / 10000)%10)), \
('0' + (((n) / 1000)%10)), \
('0' + (((n) / 100)%10)), \
('0' + (((n) / 10)%10)), \
('0' + ((n) % 10))
/* Convert integer to hex digit literals. */
#define HEX(n) \
('0' + ((n)>>28 & 0xF)), \
('0' + ((n)>>24 & 0xF)), \
('0' + ((n)>>20 & 0xF)), \
('0' + ((n)>>16 & 0xF)), \
('0' + ((n)>>12 & 0xF)), \
('0' + ((n)>>8 & 0xF)), \
('0' + ((n)>>4 & 0xF)), \
('0' + ((n) & 0xF))
/* Construct a string literal encoding the version number. */
#ifdef COMPILER_VERSION
char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]";
/* Construct a string literal encoding the version number components. */
#elif defined(COMPILER_VERSION_MAJOR)
char const info_version[] = {
'I', 'N', 'F', 'O', ':',
'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[',
COMPILER_VERSION_MAJOR,
# ifdef COMPILER_VERSION_MINOR
'.', COMPILER_VERSION_MINOR,
# ifdef COMPILER_VERSION_PATCH
'.', COMPILER_VERSION_PATCH,
# ifdef COMPILER_VERSION_TWEAK
'.', COMPILER_VERSION_TWEAK,
# endif
# endif
# endif
']','\0'};
#endif
/* Construct a string literal encoding the internal version number. */
#ifdef COMPILER_VERSION_INTERNAL
char const info_version_internal[] = {
'I', 'N', 'F', 'O', ':',
'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
'i','n','t','e','r','n','a','l','[',
COMPILER_VERSION_INTERNAL,']','\0'};
#elif defined(COMPILER_VERSION_INTERNAL_STR)
char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]";
#endif
/* Construct a string literal encoding the version number components. */
#ifdef SIMULATE_VERSION_MAJOR
char const info_simulate_version[] = {
'I', 'N', 'F', 'O', ':',
's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
SIMULATE_VERSION_MAJOR,
# ifdef SIMULATE_VERSION_MINOR
'.', SIMULATE_VERSION_MINOR,
# ifdef SIMULATE_VERSION_PATCH
'.', SIMULATE_VERSION_PATCH,
# ifdef SIMULATE_VERSION_TWEAK
'.', SIMULATE_VERSION_TWEAK,
# endif
# endif
# endif
']','\0'};
#endif
/* Construct the string literal in pieces to prevent the source from
getting matched. Store it in a pointer rather than an array
because some compilers will just produce instructions to fill the
array rather than assigning a pointer to a static array. */
char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
#define C_STD_99 199901L
#define C_STD_11 201112L
#define C_STD_17 201710L
#define C_STD_23 202311L
#ifdef __STDC_VERSION__
# define C_STD __STDC_VERSION__
#endif
#if !defined(__STDC__) && !defined(__clang__)
# if defined(_MSC_VER) || defined(__ibmxl__) || defined(__IBMC__)
# define C_VERSION "90"
# else
# define C_VERSION
# endif
#elif C_STD > C_STD_17
# define C_VERSION "23"
#elif C_STD > C_STD_11
# define C_VERSION "17"
#elif C_STD > C_STD_99
# define C_VERSION "11"
#elif C_STD >= C_STD_99
# define C_VERSION "99"
#else
# define C_VERSION "90"
#endif
const char* info_language_standard_default =
"INFO" ":" "standard_default[" C_VERSION "]";
const char* info_language_extensions_default = "INFO" ":" "extensions_default["
#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) || \
defined(__TI_COMPILER_VERSION__)) && \
!defined(__STRICT_ANSI__)
"ON"
#else
"OFF"
#endif
"]";
/*--------------------------------------------------------------------------*/
#ifdef ID_VOID_MAIN
void main() {}
#else
# if defined(__CLASSIC_C__)
int main(argc, argv) int argc; char *argv[];
# else
int main(int argc, char* argv[])
# endif
{
int require = 0;
require += info_compiler[argc];
require += info_platform[argc];
require += info_arch[argc];
#ifdef COMPILER_VERSION_MAJOR
require += info_version[argc];
#endif
#if defined(COMPILER_VERSION_INTERNAL) || defined(COMPILER_VERSION_INTERNAL_STR)
require += info_version_internal[argc];
#endif
#ifdef SIMULATE_ID
require += info_simulate[argc];
#endif
#ifdef SIMULATE_VERSION_MAJOR
require += info_simulate_version[argc];
#endif
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
require += info_cray[argc];
#endif
require += info_language_standard_default[argc];
require += info_language_extensions_default[argc];
(void)argv;
return require;
}
#endif

BIN
CMakeFiles/4.0.2-dirty/CompilerIdC/CMakeCCompilerId.o Normal file
View file

Binary file not shown.

920
CMakeFiles/4.0.2-dirty/CompilerIdCXX/CMakeCXXCompilerId.cpp Normal file
View file

@ -0,0 +1,920 @@
/* This source file must have a .cpp extension so that all C++ compilers
recognize the extension without flags. Borland does not know .cxx for
example. */
#ifndef __cplusplus
# error "A C compiler has been selected for C++."
#endif
#if !defined(__has_include)
/* If the compiler does not have __has_include, pretend the answer is
always no. */
# define __has_include(x) 0
#endif
/* Version number components: V=Version, R=Revision, P=Patch
Version date components: YYYY=Year, MM=Month, DD=Day */
#if defined(__INTEL_COMPILER) || defined(__ICC)
# define COMPILER_ID "Intel"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# if defined(__GNUC__)
# define SIMULATE_ID "GNU"
# endif
/* __INTEL_COMPILER = VRP prior to 2021, and then VVVV for 2021 and later,
except that a few beta releases use the old format with V=2021. */
# if __INTEL_COMPILER < 2021 || __INTEL_COMPILER == 202110 || __INTEL_COMPILER == 202111
# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100)
# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10)
# if defined(__INTEL_COMPILER_UPDATE)
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE)
# else
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10)
# endif
# else
# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER)
# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE)
/* The third version component from --version is an update index,
but no macro is provided for it. */
# define COMPILER_VERSION_PATCH DEC(0)
# endif
# if defined(__INTEL_COMPILER_BUILD_DATE)
/* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */
# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE)
# endif
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
# if defined(__GNUC__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
# elif defined(__GNUG__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
# endif
# if defined(__GNUC_MINOR__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
# endif
# if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER)
# define COMPILER_ID "IntelLLVM"
#if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
#endif
#if defined(__GNUC__)
# define SIMULATE_ID "GNU"
#endif
/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and
* later. Look for 6 digit vs. 8 digit version number to decide encoding.
* VVVV is no smaller than the current year when a version is released.
*/
#if __INTEL_LLVM_COMPILER < 1000000L
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10)
#else
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000)
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100)
#endif
#if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
#endif
#if defined(__GNUC__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
#elif defined(__GNUG__)
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
#endif
#if defined(__GNUC_MINOR__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
#endif
#if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
#endif
#elif defined(__PATHCC__)
# define COMPILER_ID "PathScale"
# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
# if defined(__PATHCC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
# endif
#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
# define COMPILER_ID "Embarcadero"
# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF)
#elif defined(__BORLANDC__)
# define COMPILER_ID "Borland"
/* __BORLANDC__ = 0xVRR */
# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
# define COMPILER_ID "Watcom"
/* __WATCOMC__ = VVRR */
# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__WATCOMC__)
# define COMPILER_ID "OpenWatcom"
/* __WATCOMC__ = VVRP + 1100 */
# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
# if (__WATCOMC__ % 10) > 0
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
# endif
#elif defined(__SUNPRO_CC)
# define COMPILER_ID "SunPro"
# if __SUNPRO_CC >= 0x5100
/* __SUNPRO_CC = 0xVRRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF)
# else
/* __SUNPRO_CC = 0xVRP */
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8)
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF)
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF)
# endif
#elif defined(__HP_aCC)
# define COMPILER_ID "HP"
/* __HP_aCC = VVRRPP */
# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000)
# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100)
# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100)
#elif defined(__DECCXX)
# define COMPILER_ID "Compaq"
/* __DECCXX_VER = VVRRTPPPP */
# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000)
# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100)
# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000)
#elif defined(__IBMCPP__) && defined(__COMPILER_VER__)
# define COMPILER_ID "zOS"
/* __IBMCPP__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
#elif defined(__open_xl__) && defined(__clang__)
# define COMPILER_ID "IBMClang"
# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__)
# define COMPILER_VERSION_MINOR DEC(__open_xl_release__)
# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(__ibmxl__) && defined(__clang__)
# define COMPILER_ID "XLClang"
# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800
# define COMPILER_ID "XL"
/* __IBMCPP__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800
# define COMPILER_ID "VisualAge"
/* __IBMCPP__ = VRP */
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
#elif defined(__NVCOMPILER)
# define COMPILER_ID "NVHPC"
# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
# if defined(__NVCOMPILER_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
# endif
#elif defined(__PGI)
# define COMPILER_ID "PGI"
# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
# if defined(__PGIC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
# endif
#elif defined(__clang__) && defined(__cray__)
# define COMPILER_ID "CrayClang"
# define COMPILER_VERSION_MAJOR DEC(__cray_major__)
# define COMPILER_VERSION_MINOR DEC(__cray_minor__)
# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(_CRAYC)
# define COMPILER_ID "Cray"
# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
#elif defined(__TI_COMPILER_VERSION__)
# define COMPILER_ID "TI"
/* __TI_COMPILER_VERSION__ = VVVRRRPPP */
# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000)
# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000)
#elif defined(__CLANG_FUJITSU)
# define COMPILER_ID "FujitsuClang"
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
#elif defined(__FUJITSU)
# define COMPILER_ID "Fujitsu"
# if defined(__FCC_version__)
# define COMPILER_VERSION __FCC_version__
# elif defined(__FCC_major__)
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
# endif
# if defined(__fcc_version)
# define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
# elif defined(__FCC_VERSION)
# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
# endif
#elif defined(__ghs__)
# define COMPILER_ID "GHS"
/* __GHS_VERSION_NUMBER = VVVVRP */
# ifdef __GHS_VERSION_NUMBER
# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10)
# endif
#elif defined(__TASKING__)
# define COMPILER_ID "Tasking"
# define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000)
# define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100)
# define COMPILER_VERSION_INTERNAL DEC(__VERSION__)
#elif defined(__ORANGEC__)
# define COMPILER_ID "OrangeC"
# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__)
# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__)
#elif defined(__SCO_VERSION__)
# define COMPILER_ID "SCO"
#elif defined(__ARMCC_VERSION) && !defined(__clang__)
# define COMPILER_ID "ARMCC"
#if __ARMCC_VERSION >= 1000000
/* __ARMCC_VERSION = VRRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#else
/* __ARMCC_VERSION = VRPPPP */
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
#endif
#elif defined(__clang__) && defined(__apple_build_version__)
# define COMPILER_ID "AppleClang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
# define COMPILER_ID "ARMClang"
# define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
# define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
# define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100)
# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
#elif defined(__clang__) && defined(__ti__)
# define COMPILER_ID "TIClang"
# define COMPILER_VERSION_MAJOR DEC(__ti_major__)
# define COMPILER_VERSION_MINOR DEC(__ti_minor__)
# define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__)
# define COMPILER_VERSION_INTERNAL DEC(__ti_version__)
#elif defined(__clang__)
# define COMPILER_ID "Clang"
# if defined(_MSC_VER)
# define SIMULATE_ID "MSVC"
# endif
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
# if defined(_MSC_VER)
/* _MSC_VER = VVRR */
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
# endif
#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
# define COMPILER_ID "LCC"
# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100)
# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100)
# if defined(__LCC_MINOR__)
# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
# endif
# if defined(__GNUC__) && defined(__GNUC_MINOR__)
# define SIMULATE_ID "GNU"
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
# if defined(__GNUC_PATCHLEVEL__)
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
# endif
#elif defined(__GNUC__) || defined(__GNUG__)
# define COMPILER_ID "GNU"
# if defined(__GNUC__)
# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
# else
# define COMPILER_VERSION_MAJOR DEC(__GNUG__)
# endif
# if defined(__GNUC_MINOR__)
# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
# endif
# if defined(__GNUC_PATCHLEVEL__)
# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
# endif
#elif defined(_MSC_VER)
# define COMPILER_ID "MSVC"
/* _MSC_VER = VVRR */
# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
# if defined(_MSC_FULL_VER)
# if _MSC_VER >= 1400
/* _MSC_FULL_VER = VVRRPPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
# else
/* _MSC_FULL_VER = VVRRPPPP */
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
# endif
# endif
# if defined(_MSC_BUILD)
# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
# endif
#elif defined(_ADI_COMPILER)
# define COMPILER_ID "ADSP"
#if defined(__VERSIONNUM__)
/* __VERSIONNUM__ = 0xVVRRPPTT */
# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
#endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# define COMPILER_ID "IAR"
# if defined(__VER__) && defined(__ICCARM__)
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
# endif
/* These compilers are either not known or too old to define an
identification macro. Try to identify the platform and guess that
it is the native compiler. */
#elif defined(__hpux) || defined(__hpua)
# define COMPILER_ID "HP"
#else /* unknown compiler */
# define COMPILER_ID ""
#endif
/* Construct the string literal in pieces to prevent the source from
getting matched. Store it in a pointer rather than an array
because some compilers will just produce instructions to fill the
array rather than assigning a pointer to a static array. */
char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
#ifdef SIMULATE_ID
char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
#endif
#ifdef __QNXNTO__
char const* qnxnto = "INFO" ":" "qnxnto[]";
#endif
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
#endif
#define STRINGIFY_HELPER(X) #X
#define STRINGIFY(X) STRINGIFY_HELPER(X)
/* Identify known platforms by name. */
#if defined(__linux) || defined(__linux__) || defined(linux)
# define PLATFORM_ID "Linux"
#elif defined(__MSYS__)
# define PLATFORM_ID "MSYS"
#elif defined(__CYGWIN__)
# define PLATFORM_ID "Cygwin"
#elif defined(__MINGW32__)
# define PLATFORM_ID "MinGW"
#elif defined(__APPLE__)
# define PLATFORM_ID "Darwin"
#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
# define PLATFORM_ID "Windows"
#elif defined(__FreeBSD__) || defined(__FreeBSD)
# define PLATFORM_ID "FreeBSD"
#elif defined(__NetBSD__) || defined(__NetBSD)
# define PLATFORM_ID "NetBSD"
#elif defined(__OpenBSD__) || defined(__OPENBSD)
# define PLATFORM_ID "OpenBSD"
#elif defined(__sun) || defined(sun)
# define PLATFORM_ID "SunOS"
#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
# define PLATFORM_ID "AIX"
#elif defined(__hpux) || defined(__hpux__)
# define PLATFORM_ID "HP-UX"
#elif defined(__HAIKU__)
# define PLATFORM_ID "Haiku"
#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
# define PLATFORM_ID "BeOS"
#elif defined(__QNX__) || defined(__QNXNTO__)
# define PLATFORM_ID "QNX"
#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
# define PLATFORM_ID "Tru64"
#elif defined(__riscos) || defined(__riscos__)
# define PLATFORM_ID "RISCos"
#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
# define PLATFORM_ID "SINIX"
#elif defined(__UNIX_SV__)
# define PLATFORM_ID "UNIX_SV"
#elif defined(__bsdos__)
# define PLATFORM_ID "BSDOS"
#elif defined(_MPRAS) || defined(MPRAS)
# define PLATFORM_ID "MP-RAS"
#elif defined(__osf) || defined(__osf__)
# define PLATFORM_ID "OSF1"
#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
# define PLATFORM_ID "SCO_SV"
#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
# define PLATFORM_ID "ULTRIX"
#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
# define PLATFORM_ID "Xenix"
#elif defined(__WATCOMC__)
# if defined(__LINUX__)
# define PLATFORM_ID "Linux"
# elif defined(__DOS__)
# define PLATFORM_ID "DOS"
# elif defined(__OS2__)
# define PLATFORM_ID "OS2"
# elif defined(__WINDOWS__)
# define PLATFORM_ID "Windows3x"
# elif defined(__VXWORKS__)
# define PLATFORM_ID "VxWorks"
# else /* unknown platform */
# define PLATFORM_ID
# endif
#elif defined(__INTEGRITY)
# if defined(INT_178B)
# define PLATFORM_ID "Integrity178"
# else /* regular Integrity */
# define PLATFORM_ID "Integrity"
# endif
# elif defined(_ADI_COMPILER)
# define PLATFORM_ID "ADSP"
#else /* unknown platform */
# define PLATFORM_ID
#endif
/* For windows compilers MSVC and Intel we can determine
the architecture of the compiler being used. This is because
the compilers do not have flags that can change the architecture,
but rather depend on which compiler is being used
*/
#if defined(_WIN32) && defined(_MSC_VER)
# if defined(_M_IA64)
# define ARCHITECTURE_ID "IA64"
# elif defined(_M_ARM64EC)
# define ARCHITECTURE_ID "ARM64EC"
# elif defined(_M_X64) || defined(_M_AMD64)
# define ARCHITECTURE_ID "x64"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# elif defined(_M_ARM64)
# define ARCHITECTURE_ID "ARM64"
# elif defined(_M_ARM)
# if _M_ARM == 4
# define ARCHITECTURE_ID "ARMV4I"
# elif _M_ARM == 5
# define ARCHITECTURE_ID "ARMV5I"
# else
# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
# endif
# elif defined(_M_MIPS)
# define ARCHITECTURE_ID "MIPS"
# elif defined(_M_SH)
# define ARCHITECTURE_ID "SHx"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__WATCOMC__)
# if defined(_M_I86)
# define ARCHITECTURE_ID "I86"
# elif defined(_M_IX86)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
# if defined(__ICCARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__ICCRX__)
# define ARCHITECTURE_ID "RX"
# elif defined(__ICCRH850__)
# define ARCHITECTURE_ID "RH850"
# elif defined(__ICCRL78__)
# define ARCHITECTURE_ID "RL78"
# elif defined(__ICCRISCV__)
# define ARCHITECTURE_ID "RISCV"
# elif defined(__ICCAVR__)
# define ARCHITECTURE_ID "AVR"
# elif defined(__ICC430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__ICCV850__)
# define ARCHITECTURE_ID "V850"
# elif defined(__ICC8051__)
# define ARCHITECTURE_ID "8051"
# elif defined(__ICCSTM8__)
# define ARCHITECTURE_ID "STM8"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__ghs__)
# if defined(__PPC64__)
# define ARCHITECTURE_ID "PPC64"
# elif defined(__ppc__)
# define ARCHITECTURE_ID "PPC"
# elif defined(__ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__x86_64__)
# define ARCHITECTURE_ID "x64"
# elif defined(__i386__)
# define ARCHITECTURE_ID "X86"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__clang__) && defined(__ti__)
# if defined(__ARM_ARCH)
# define ARCHITECTURE_ID "ARM"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
#elif defined(__TI_COMPILER_VERSION__)
# if defined(__TI_ARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__MSP430__)
# define ARCHITECTURE_ID "MSP430"
# elif defined(__TMS320C28XX__)
# define ARCHITECTURE_ID "TMS320C28x"
# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
# define ARCHITECTURE_ID "TMS320C6x"
# else /* unknown architecture */
# define ARCHITECTURE_ID ""
# endif
# elif defined(__ADSPSHARC__)
# define ARCHITECTURE_ID "SHARC"
# elif defined(__ADSPBLACKFIN__)
# define ARCHITECTURE_ID "Blackfin"
#elif defined(__TASKING__)
# if defined(__CTC__) || defined(__CPTC__)
# define ARCHITECTURE_ID "TriCore"
# elif defined(__CMCS__)
# define ARCHITECTURE_ID "MCS"
# elif defined(__CARM__) || defined(__CPARM__)
# define ARCHITECTURE_ID "ARM"
# elif defined(__CARC__)
# define ARCHITECTURE_ID "ARC"
# elif defined(__C51__)
# define ARCHITECTURE_ID "8051"
# elif defined(__CPCP__)
# define ARCHITECTURE_ID "PCP"
# else
# define ARCHITECTURE_ID ""
# endif
#else
# define ARCHITECTURE_ID
#endif
/* Convert integer to decimal digit literals. */
#define DEC(n) \
('0' + (((n) / 10000000)%10)), \
('0' + (((n) / 1000000)%10)), \
('0' + (((n) / 100000)%10)), \
('0' + (((n) / 10000)%10)), \
('0' + (((n) / 1000)%10)), \
('0' + (((n) / 100)%10)), \
('0' + (((n) / 10)%10)), \
('0' + ((n) % 10))
/* Convert integer to hex digit literals. */
#define HEX(n) \
('0' + ((n)>>28 & 0xF)), \
('0' + ((n)>>24 & 0xF)), \
('0' + ((n)>>20 & 0xF)), \
('0' + ((n)>>16 & 0xF)), \
('0' + ((n)>>12 & 0xF)), \
('0' + ((n)>>8 & 0xF)), \
('0' + ((n)>>4 & 0xF)), \
('0' + ((n) & 0xF))
/* Construct a string literal encoding the version number. */
#ifdef COMPILER_VERSION
char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]";
/* Construct a string literal encoding the version number components. */
#elif defined(COMPILER_VERSION_MAJOR)
char const info_version[] = {
'I', 'N', 'F', 'O', ':',
'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[',
COMPILER_VERSION_MAJOR,
# ifdef COMPILER_VERSION_MINOR
'.', COMPILER_VERSION_MINOR,
# ifdef COMPILER_VERSION_PATCH
'.', COMPILER_VERSION_PATCH,
# ifdef COMPILER_VERSION_TWEAK
'.', COMPILER_VERSION_TWEAK,
# endif
# endif
# endif
']','\0'};
#endif
/* Construct a string literal encoding the internal version number. */
#ifdef COMPILER_VERSION_INTERNAL
char const info_version_internal[] = {
'I', 'N', 'F', 'O', ':',
'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
'i','n','t','e','r','n','a','l','[',
COMPILER_VERSION_INTERNAL,']','\0'};
#elif defined(COMPILER_VERSION_INTERNAL_STR)
char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]";
#endif
/* Construct a string literal encoding the version number components. */
#ifdef SIMULATE_VERSION_MAJOR
char const info_simulate_version[] = {
'I', 'N', 'F', 'O', ':',
's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
SIMULATE_VERSION_MAJOR,
# ifdef SIMULATE_VERSION_MINOR
'.', SIMULATE_VERSION_MINOR,
# ifdef SIMULATE_VERSION_PATCH
'.', SIMULATE_VERSION_PATCH,
# ifdef SIMULATE_VERSION_TWEAK
'.', SIMULATE_VERSION_TWEAK,
# endif
# endif
# endif
']','\0'};
#endif
/* Construct the string literal in pieces to prevent the source from
getting matched. Store it in a pointer rather than an array
because some compilers will just produce instructions to fill the
array rather than assigning a pointer to a static array. */
char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
#define CXX_STD_98 199711L
#define CXX_STD_11 201103L
#define CXX_STD_14 201402L
#define CXX_STD_17 201703L
#define CXX_STD_20 202002L
#define CXX_STD_23 202302L
#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG)
# if _MSVC_LANG > CXX_STD_17
# define CXX_STD _MSVC_LANG
# elif _MSVC_LANG == CXX_STD_17 && defined(__cpp_aggregate_paren_init)
# define CXX_STD CXX_STD_20
# elif _MSVC_LANG > CXX_STD_14 && __cplusplus > CXX_STD_17
# define CXX_STD CXX_STD_20
# elif _MSVC_LANG > CXX_STD_14
# define CXX_STD CXX_STD_17
# elif defined(__INTEL_CXX11_MODE__) && defined(__cpp_aggregate_nsdmi)
# define CXX_STD CXX_STD_14
# elif defined(__INTEL_CXX11_MODE__)
# define CXX_STD CXX_STD_11
# else
# define CXX_STD CXX_STD_98
# endif
#elif defined(_MSC_VER) && defined(_MSVC_LANG)
# if _MSVC_LANG > __cplusplus
# define CXX_STD _MSVC_LANG
# else
# define CXX_STD __cplusplus
# endif
#elif defined(__NVCOMPILER)
# if __cplusplus == CXX_STD_17 && defined(__cpp_aggregate_paren_init)
# define CXX_STD CXX_STD_20
# else
# define CXX_STD __cplusplus
# endif
#elif defined(__INTEL_COMPILER) || defined(__PGI)
# if __cplusplus == CXX_STD_11 && defined(__cpp_namespace_attributes)
# define CXX_STD CXX_STD_17
# elif __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi)
# define CXX_STD CXX_STD_14
# else
# define CXX_STD __cplusplus
# endif
#elif (defined(__IBMCPP__) || defined(__ibmxl__)) && defined(__linux__)
# if __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi)
# define CXX_STD CXX_STD_14
# else
# define CXX_STD __cplusplus
# endif
#elif __cplusplus == 1 && defined(__GXX_EXPERIMENTAL_CXX0X__)
# define CXX_STD CXX_STD_11
#else
# define CXX_STD __cplusplus
#endif
const char* info_language_standard_default = "INFO" ":" "standard_default["
#if CXX_STD > CXX_STD_23
"26"
#elif CXX_STD > CXX_STD_20
"23"
#elif CXX_STD > CXX_STD_17
"20"
#elif CXX_STD > CXX_STD_14
"17"
#elif CXX_STD > CXX_STD_11
"14"
#elif CXX_STD >= CXX_STD_11
"11"
#else
"98"
#endif
"]";
const char* info_language_extensions_default = "INFO" ":" "extensions_default["
#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) || \
defined(__TI_COMPILER_VERSION__)) && \
!defined(__STRICT_ANSI__)
"ON"
#else
"OFF"
#endif
"]";
/*--------------------------------------------------------------------------*/
int main(int argc, char* argv[])
{
int require = 0;
require += info_compiler[argc];
require += info_platform[argc];
require += info_arch[argc];
#ifdef COMPILER_VERSION_MAJOR
require += info_version[argc];
#endif
#if defined(COMPILER_VERSION_INTERNAL) || defined(COMPILER_VERSION_INTERNAL_STR)
require += info_version_internal[argc];
#endif
#ifdef SIMULATE_ID
require += info_simulate[argc];
#endif
#ifdef SIMULATE_VERSION_MAJOR
require += info_simulate_version[argc];
#endif
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
require += info_cray[argc];
#endif
require += info_language_standard_default[argc];
require += info_language_extensions_default[argc];
(void)argv;
return require;
}

BIN
CMakeFiles/4.0.2-dirty/CompilerIdCXX/CMakeCXXCompilerId.o Normal file
View file

Binary file not shown.

427
CMakeFiles/CMakeConfigureLog.yaml Normal file
View file

@ -0,0 +1,427 @@
---
events:
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineSystem.cmake:200 (message)"
- "CMakeLists.txt:31 (project)"
message: |
The target system is: Generic - - arm
The host system is: Linux - 6.14.10-arch1-1 - x86_64
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:17 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:64 (__determine_compiler_id_test)"
- "/usr/share/cmake/Modules/CMakeDetermineCCompiler.cmake:123 (CMAKE_DETERMINE_COMPILER_ID)"
- "CMakeLists.txt:31 (project)"
message: |
Compiling the C compiler identification source file "CMakeCCompilerId.c" failed.
Compiler: /usr/bin/arm-none-eabi-gcc
Build flags: -mcpu=cortex-m4;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-Wall;-Wextra;-Wpedantic;-fdata-sections;-ffunction-sections
Id flags:
The output was:
1
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-exit.o): in function `exit':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/stdlib/exit.c:65:(.text.exit+0x14): undefined reference to `_exit'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-closer.o): in function `_close_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/closer.c:47:(.text._close_r+0xc): undefined reference to `_close'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lseekr.o): in function `_lseek_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/lseekr.c:49:(.text._lseek_r+0x14): undefined reference to `_lseek'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-readr.o): in function `_read_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/readr.c:49:(.text._read_r+0x14): undefined reference to `_read'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-writer.o): in function `_write_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/writer.c:49:(.text._write_r+0x14): undefined reference to `_write'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-sbrkr.o): in function `_sbrk_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/sbrkr.c:51:(.text._sbrk_r+0xc): undefined reference to `_sbrk'
collect2: error: ld returned 1 exit status
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:17 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:64 (__determine_compiler_id_test)"
- "/usr/share/cmake/Modules/CMakeDetermineCCompiler.cmake:123 (CMAKE_DETERMINE_COMPILER_ID)"
- "CMakeLists.txt:31 (project)"
message: |
Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded.
Compiler: /usr/bin/arm-none-eabi-gcc
Build flags: -mcpu=cortex-m4;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-Wall;-Wextra;-Wpedantic;-fdata-sections;-ffunction-sections
Id flags: -c
The output was:
0
Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "CMakeCCompilerId.o"
The C compiler identification is GNU, found in:
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/4.0.2-dirty/CompilerIdC/CMakeCCompilerId.o
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:17 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:64 (__determine_compiler_id_test)"
- "/usr/share/cmake/Modules/CMakeDetermineCXXCompiler.cmake:126 (CMAKE_DETERMINE_COMPILER_ID)"
- "CMakeLists.txt:31 (project)"
message: |
Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" failed.
Compiler: /usr/bin/arm-none-eabi-g++
Build flags: -mcpu=cortex-m4;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-Wall;-Wextra;-Wpedantic;-fdata-sections;-ffunction-sections;-fno-rtti;-fno-exceptions;-fno-threadsafe-statics
Id flags:
The output was:
1
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-exit.o): in function `exit':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/stdlib/exit.c:65:(.text.exit+0x14): undefined reference to `_exit'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-closer.o): in function `_close_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/closer.c:47:(.text._close_r+0xc): undefined reference to `_close'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-lseekr.o): in function `_lseek_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/lseekr.c:49:(.text._lseek_r+0x14): undefined reference to `_lseek'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-readr.o): in function `_read_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/readr.c:49:(.text._read_r+0x14): undefined reference to `_read'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-writer.o): in function `_write_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/writer.c:49:(.text._write_r+0x14): undefined reference to `_write'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/ld: /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a(libc_a-sbrkr.o): in function `_sbrk_r':
/build/arm-none-eabi-newlib/src/build-newlib/arm-none-eabi/thumb/v7e-m+fp/hard/newlib/../../../../../../newlib-4.5.0.20241231/newlib/libc/reent/sbrkr.c:51:(.text._sbrk_r+0xc): undefined reference to `_sbrk'
collect2: error: ld returned 1 exit status
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:17 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:64 (__determine_compiler_id_test)"
- "/usr/share/cmake/Modules/CMakeDetermineCXXCompiler.cmake:126 (CMAKE_DETERMINE_COMPILER_ID)"
- "CMakeLists.txt:31 (project)"
message: |
Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded.
Compiler: /usr/bin/arm-none-eabi-g++
Build flags: -mcpu=cortex-m4;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-Wall;-Wextra;-Wpedantic;-fdata-sections;-ffunction-sections;-fno-rtti;-fno-exceptions;-fno-threadsafe-statics
Id flags: -c
The output was:
0
Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "CMakeCXXCompilerId.o"
The CXX compiler identification is GNU, found in:
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/4.0.2-dirty/CompilerIdCXX/CMakeCXXCompilerId.o
-
kind: "try_compile-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:83 (try_compile)"
- "/usr/share/cmake/Modules/CMakeTestCCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
checks:
- "Detecting C compiler ABI info"
directories:
source: "/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-0uJKHn"
binary: "/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-0uJKHn"
cmakeVariables:
CMAKE_C_FLAGS: " -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections"
CMAKE_C_FLAGS_DEBUG: "-O0 -g3"
CMAKE_EXE_LINKER_FLAGS: ""
buildResult:
variable: "CMAKE_C_ABI_COMPILED"
cached: true
stdout: |
Change Dir: '/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-0uJKHn'
Run Build Command(s): /usr/bin/ninja -v cmTC_b8b21
[1/2] /usr/bin/arm-none-eabi-gcc -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections -std=gnu11 -v -o CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj -c /usr/share/cmake/Modules/CMakeCCompilerABI.c
Using built-in specs.
COLLECT_GCC=/usr/bin/arm-none-eabi-gcc
Target: arm-none-eabi
Configured with: /build/arm-none-eabi-gcc/src/gcc-14.2.0/configure --target=arm-none-eabi --prefix=/usr --with-sysroot=/usr/arm-none-eabi --with-native-system-header-dir=/include --libexecdir=/usr/lib --enable-languages=c,c++ --enable-plugins --disable-decimal-float --disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadmath --disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared --disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-zlib --with-newlib --with-headers=/usr/arm-none-eabi/include --with-python-dir=share/gcc-arm-none-eabi --with-gmp --with-mpfr --with-mpc --with-isl --with-libelf --enable-gnu-indirect-function --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-pkgversion='Arch Repository' --with-bugurl=https://gitlab.archlinux.org/archlinux/packaging/packages/arm-none-eabi-gcc/-/issues --with-multilib-list=rmprofile
Thread model: single
Supported LTO compression algorithms: zlib zstd
gcc version 14.2.0 (Arch Repository)
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/'
/usr/lib/gcc/arm-none-eabi/14.2.0/cc1 -quiet -v -imultilib thumb/v7e-m+fp/hard -D__USES_INITFINI__ /usr/share/cmake/Modules/CMakeCCompilerABI.c -quiet -dumpdir CMakeFiles/cmTC_b8b21.dir/ -dumpbase CMakeCCompilerABI.c.c -dumpbase-ext .c -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -mlibarch=armv7e-m+fp -march=armv7e-m+fp -Wall -Wextra -Wpedantic -std=gnu11 -version -fdata-sections -ffunction-sections -o /tmp/ccOBzrlD.s
GNU C11 (Arch Repository) version 14.2.0 (arm-none-eabi)
compiled by GNU C version 14.2.1 20240910, GMP version 6.3.0, MPFR version 4.2.1, MPC version 1.3.1, isl version isl-0.27-GMP
warning: MPFR header version 4.2.1 differs from library version 4.2.2.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
ignoring nonexistent directory "/usr/arm-none-eabi/usr/local/include"
ignoring duplicate directory "/usr/arm-none-eabi/include"
#include "..." search starts here:
#include <...> search starts here:
/usr/lib/gcc/arm-none-eabi/14.2.0/include
/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include
End of search list.
Compiler executable checksum: 27ee4863632474af78fa6d6c36d3934a
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/as -v -march=armv7e-m+fp -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -o CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj /tmp/ccOBzrlD.s
GNU assembler version 2.43 (arm-none-eabi) using BFD version (GNU Binutils) 2.43
COMPILER_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/
LIBRARY_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/:/usr/arm-none-eabi/lib/
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.'
[2/2] : && /usr/bin/cmake -E rm -f libcmTC_b8b21.a && /usr/bin/arm-none-eabi-ar qc libcmTC_b8b21.a CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj && /usr/bin/arm-none-eabi-ranlib libcmTC_b8b21.a && :
exitCode: 0
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:191 (message)"
- "/usr/share/cmake/Modules/CMakeTestCCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Parsed C implicit include dir info: rv=done
found start of include info
found start of implicit include info
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/include]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include]
end of search list found
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/include] ==> [/usr/lib/gcc/arm-none-eabi/14.2.0/include]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed] ==> [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include] ==> [/usr/arm-none-eabi/include]
implicit include dirs: [/usr/lib/gcc/arm-none-eabi/14.2.0/include;/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed;/usr/arm-none-eabi/include]
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:227 (message)"
- "/usr/share/cmake/Modules/CMakeTestCCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Parsed C implicit link information:
link line regex: [^( *|.*[/\\])(arm-none-eabi-g\\+\\+|;ld[0-9]*(|\\.[a-rt-z][a-z]*|\\.s[a-np-z][a-z]*|\\.so[a-z]+)|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\\]+-)?ld|collect2)[^/\\]*( |$)]
linker tool regex: [^[ ]*(->|")?[ ]*(([^"]*[/\\])?(arm-none-eabi-g\\+\\+|;ld[0-9]*(|\\.[a-rt-z][a-z]*|\\.s[a-np-z][a-z]*|\\.so[a-z]+)))("|,| |$)]
ignore line: [Change Dir: '/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-0uJKHn']
ignore line: []
ignore line: [Run Build Command(s): /usr/bin/ninja -v cmTC_b8b21]
ignore line: [[1/2] /usr/bin/arm-none-eabi-gcc -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections -std=gnu11 -v -o CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj -c /usr/share/cmake/Modules/CMakeCCompilerABI.c]
ignore line: [Using built-in specs.]
ignore line: [COLLECT_GCC=/usr/bin/arm-none-eabi-gcc]
ignore line: [Target: arm-none-eabi]
ignore line: [Configured with: /build/arm-none-eabi-gcc/src/gcc-14.2.0/configure --target=arm-none-eabi --prefix=/usr --with-sysroot=/usr/arm-none-eabi --with-native-system-header-dir=/include --libexecdir=/usr/lib --enable-languages=c,c++ --enable-plugins --disable-decimal-float --disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadmath --disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared --disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-zlib --with-newlib --with-headers=/usr/arm-none-eabi/include --with-python-dir=share/gcc-arm-none-eabi --with-gmp --with-mpfr --with-mpc --with-isl --with-libelf --enable-gnu-indirect-function --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-pkgversion='Arch Repository' --with-bugurl=https://gitlab.archlinux.org/archlinux/packaging/packages/arm-none-eabi-gcc/-/issues --with-multilib-list=rmprofile]
ignore line: [Thread model: single]
ignore line: [Supported LTO compression algorithms: zlib zstd]
ignore line: [gcc version 14.2.0 (Arch Repository) ]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/']
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/cc1 -quiet -v -imultilib thumb/v7e-m+fp/hard -D__USES_INITFINI__ /usr/share/cmake/Modules/CMakeCCompilerABI.c -quiet -dumpdir CMakeFiles/cmTC_b8b21.dir/ -dumpbase CMakeCCompilerABI.c.c -dumpbase-ext .c -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -mlibarch=armv7e-m+fp -march=armv7e-m+fp -Wall -Wextra -Wpedantic -std=gnu11 -version -fdata-sections -ffunction-sections -o /tmp/ccOBzrlD.s]
ignore line: [GNU C11 (Arch Repository) version 14.2.0 (arm-none-eabi)]
ignore line: [ compiled by GNU C version 14.2.1 20240910 GMP version 6.3.0 MPFR version 4.2.1 MPC version 1.3.1 isl version isl-0.27-GMP]
ignore line: []
ignore line: [warning: MPFR header version 4.2.1 differs from library version 4.2.2.]
ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072]
ignore line: [ignoring nonexistent directory "/usr/arm-none-eabi/usr/local/include"]
ignore line: [ignoring duplicate directory "/usr/arm-none-eabi/include"]
ignore line: [#include "..." search starts here:]
ignore line: [#include <...> search starts here:]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/include]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include]
ignore line: [End of search list.]
ignore line: [Compiler executable checksum: 27ee4863632474af78fa6d6c36d3934a]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/']
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/as -v -march=armv7e-m+fp -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -o CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj /tmp/ccOBzrlD.s]
ignore line: [GNU assembler version 2.43 (arm-none-eabi) using BFD version (GNU Binutils) 2.43]
ignore line: [COMPILER_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/]
ignore line: [LIBRARY_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/:/usr/arm-none-eabi/lib/]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-std=gnu11' '-v' '-o' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.']
ignore line: [[2/2] : && /usr/bin/cmake -E rm -f libcmTC_b8b21.a && /usr/bin/arm-none-eabi-ar qc libcmTC_b8b21.a CMakeFiles/cmTC_b8b21.dir/CMakeCCompilerABI.c.obj && /usr/bin/arm-none-eabi-ranlib libcmTC_b8b21.a && :]
ignore line: []
ignore line: []
implicit libs: []
implicit objs: []
implicit dirs: []
implicit fwks: []
-
kind: "try_compile-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:83 (try_compile)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
checks:
- "Detecting CXX compiler ABI info"
directories:
source: "/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-Gu88ub"
binary: "/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-Gu88ub"
cmakeVariables:
CMAKE_CXX_FLAGS: " -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics"
CMAKE_CXX_FLAGS_DEBUG: "-O0 -g3"
CMAKE_CXX_SCAN_FOR_MODULES: "OFF"
CMAKE_EXE_LINKER_FLAGS: ""
buildResult:
variable: "CMAKE_CXX_ABI_COMPILED"
cached: true
stdout: |
Change Dir: '/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-Gu88ub'
Run Build Command(s): /usr/bin/ninja -v cmTC_882fd
[1/2] /usr/bin/arm-none-eabi-g++ -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics -v -o CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj -c /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp
Using built-in specs.
COLLECT_GCC=/usr/bin/arm-none-eabi-g++
Target: arm-none-eabi
Configured with: /build/arm-none-eabi-gcc/src/gcc-14.2.0/configure --target=arm-none-eabi --prefix=/usr --with-sysroot=/usr/arm-none-eabi --with-native-system-header-dir=/include --libexecdir=/usr/lib --enable-languages=c,c++ --enable-plugins --disable-decimal-float --disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadmath --disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared --disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-zlib --with-newlib --with-headers=/usr/arm-none-eabi/include --with-python-dir=share/gcc-arm-none-eabi --with-gmp --with-mpfr --with-mpc --with-isl --with-libelf --enable-gnu-indirect-function --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-pkgversion='Arch Repository' --with-bugurl=https://gitlab.archlinux.org/archlinux/packaging/packages/arm-none-eabi-gcc/-/issues --with-multilib-list=rmprofile
Thread model: single
Supported LTO compression algorithms: zlib zstd
gcc version 14.2.0 (Arch Repository)
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/'
/usr/lib/gcc/arm-none-eabi/14.2.0/cc1plus -quiet -v -imultilib thumb/v7e-m+fp/hard -D__USES_INITFINI__ /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpdir CMakeFiles/cmTC_882fd.dir/ -dumpbase CMakeCXXCompilerABI.cpp.cpp -dumpbase-ext .cpp -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -mlibarch=armv7e-m+fp -march=armv7e-m+fp -Wall -Wextra -Wpedantic -version -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics -o /tmp/ccg0m4TD.s
GNU C++17 (Arch Repository) version 14.2.0 (arm-none-eabi)
compiled by GNU C version 14.2.1 20240910, GMP version 6.3.0, MPFR version 4.2.1, MPC version 1.3.1, isl version isl-0.27-GMP
warning: MPFR header version 4.2.1 differs from library version 4.2.2.
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
ignoring nonexistent directory "/usr/arm-none-eabi/usr/local/include"
ignoring duplicate directory "/usr/arm-none-eabi/include"
#include "..." search starts here:
#include <...> search starts here:
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/backward
/usr/lib/gcc/arm-none-eabi/14.2.0/include
/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include
End of search list.
Compiler executable checksum: de4da0f09cac33582cfad65715a8fb07
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/'
/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/as -v -march=armv7e-m+fp -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -o CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj /tmp/ccg0m4TD.s
GNU assembler version 2.43 (arm-none-eabi) using BFD version (GNU Binutils) 2.43
COMPILER_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/
LIBRARY_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/:/usr/arm-none-eabi/lib/
COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.'
[2/2] : && /usr/bin/cmake -E rm -f libcmTC_882fd.a && /usr/bin/arm-none-eabi-ar qc libcmTC_882fd.a CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj && /usr/bin/arm-none-eabi-ranlib libcmTC_882fd.a && :
exitCode: 0
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:191 (message)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Parsed CXX implicit include dir info: rv=done
found start of include info
found start of implicit include info
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/backward]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/include]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
add: [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include]
end of search list found
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0] ==> [/usr/arm-none-eabi/include/c++/14.2.0]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard] ==> [/usr/arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/backward] ==> [/usr/arm-none-eabi/include/c++/14.2.0/backward]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/include] ==> [/usr/lib/gcc/arm-none-eabi/14.2.0/include]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed] ==> [/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
collapse include dir [/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include] ==> [/usr/arm-none-eabi/include]
implicit include dirs: [/usr/arm-none-eabi/include/c++/14.2.0;/usr/arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard;/usr/arm-none-eabi/include/c++/14.2.0/backward;/usr/lib/gcc/arm-none-eabi/14.2.0/include;/usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed;/usr/arm-none-eabi/include]
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:227 (message)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Parsed CXX implicit link information:
link line regex: [^( *|.*[/\\])(arm-none-eabi-g\\+\\+|;ld[0-9]*(|\\.[a-rt-z][a-z]*|\\.s[a-np-z][a-z]*|\\.so[a-z]+)|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\\]+-)?ld|collect2)[^/\\]*( |$)]
linker tool regex: [^[ ]*(->|")?[ ]*(([^"]*[/\\])?(arm-none-eabi-g\\+\\+|;ld[0-9]*(|\\.[a-rt-z][a-z]*|\\.s[a-np-z][a-z]*|\\.so[a-z]+)))("|,| |$)]
ignore line: [Change Dir: '/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/CMakeScratch/TryCompile-Gu88ub']
ignore line: []
ignore line: [Run Build Command(s): /usr/bin/ninja -v cmTC_882fd]
ignore line: [[1/2] /usr/bin/arm-none-eabi-g++ -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wall -Wextra -Wpedantic -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics -v -o CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj -c /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp]
ignore line: [Using built-in specs.]
ignore line: [COLLECT_GCC=/usr/bin/arm-none-eabi-g++]
ignore line: [Target: arm-none-eabi]
ignore line: [Configured with: /build/arm-none-eabi-gcc/src/gcc-14.2.0/configure --target=arm-none-eabi --prefix=/usr --with-sysroot=/usr/arm-none-eabi --with-native-system-header-dir=/include --libexecdir=/usr/lib --enable-languages=c,c++ --enable-plugins --disable-decimal-float --disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadmath --disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared --disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-zlib --with-newlib --with-headers=/usr/arm-none-eabi/include --with-python-dir=share/gcc-arm-none-eabi --with-gmp --with-mpfr --with-mpc --with-isl --with-libelf --enable-gnu-indirect-function --with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-pkgversion='Arch Repository' --with-bugurl=https://gitlab.archlinux.org/archlinux/packaging/packages/arm-none-eabi-gcc/-/issues --with-multilib-list=rmprofile]
ignore line: [Thread model: single]
ignore line: [Supported LTO compression algorithms: zlib zstd]
ignore line: [gcc version 14.2.0 (Arch Repository) ]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/']
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/cc1plus -quiet -v -imultilib thumb/v7e-m+fp/hard -D__USES_INITFINI__ /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpdir CMakeFiles/cmTC_882fd.dir/ -dumpbase CMakeCXXCompilerABI.cpp.cpp -dumpbase-ext .cpp -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -mlibarch=armv7e-m+fp -march=armv7e-m+fp -Wall -Wextra -Wpedantic -version -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics -o /tmp/ccg0m4TD.s]
ignore line: [GNU C++17 (Arch Repository) version 14.2.0 (arm-none-eabi)]
ignore line: [ compiled by GNU C version 14.2.1 20240910 GMP version 6.3.0 MPFR version 4.2.1 MPC version 1.3.1 isl version isl-0.27-GMP]
ignore line: []
ignore line: [warning: MPFR header version 4.2.1 differs from library version 4.2.2.]
ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072]
ignore line: [ignoring nonexistent directory "/usr/arm-none-eabi/usr/local/include"]
ignore line: [ignoring duplicate directory "/usr/arm-none-eabi/include"]
ignore line: [#include "..." search starts here:]
ignore line: [#include <...> search starts here:]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/arm-none-eabi/thumb/v7e-m+fp/hard]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include/c++/14.2.0/backward]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/include]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/include-fixed]
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/include]
ignore line: [End of search list.]
ignore line: [Compiler executable checksum: de4da0f09cac33582cfad65715a8fb07]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/']
ignore line: [ /usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/as -v -march=armv7e-m+fp -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -o CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj /tmp/ccg0m4TD.s]
ignore line: [GNU assembler version 2.43 (arm-none-eabi) using BFD version (GNU Binutils) 2.43]
ignore line: [COMPILER_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/bin/]
ignore line: [LIBRARY_PATH=/usr/lib/gcc/arm-none-eabi/14.2.0/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/arm-none-eabi/lib/thumb/v7e-m+fp/hard/:/usr/lib/gcc/arm-none-eabi/14.2.0/:/usr/lib/gcc/arm-none-eabi/14.2.0/../../../../arm-none-eabi/lib/:/usr/arm-none-eabi/lib/]
ignore line: [COLLECT_GCC_OPTIONS='-mcpu=cortex-m4' '-mfpu=fpv4-sp-d16' '-mfloat-abi=hard' '-Wall' '-Wextra' '-Wpedantic' '-fdata-sections' '-ffunction-sections' '-fno-rtti' '-fno-exceptions' '-fno-threadsafe-statics' '-v' '-o' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj' '-c' '-mthumb' '-mlibarch=armv7e-m+fp' '-march=armv7e-m+fp' '-dumpdir' 'CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.']
ignore line: [[2/2] : && /usr/bin/cmake -E rm -f libcmTC_882fd.a && /usr/bin/arm-none-eabi-ar qc libcmTC_882fd.a CMakeFiles/cmTC_882fd.dir/CMakeCXXCompilerABI.cpp.obj && /usr/bin/arm-none-eabi-ranlib libcmTC_882fd.a && :]
ignore line: []
ignore line: []
linker tool for 'CXX': [1/2] /usr/bin/arm-none-eabi-g++
implicit libs: []
implicit objs: []
implicit dirs: []
implicit fwks: []
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/Internal/CMakeDetermineLinkerId.cmake:36 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:270 (cmake_determine_linker_id)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Running the CXX compiler's linker: "[1/2] /usr/bin/arm-none-eabi-g++" "-v"
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/Internal/CMakeDetermineLinkerId.cmake:36 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:270 (cmake_determine_linker_id)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Running the CXX compiler's linker: "[1/2] /usr/bin/arm-none-eabi-g++" "-V"
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/Internal/CMakeDetermineLinkerId.cmake:36 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake:270 (cmake_determine_linker_id)"
- "/usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
- "CMakeLists.txt:31 (project)"
message: |
Running the CXX compiler's linker: "[1/2] /usr/bin/arm-none-eabi-g++" "--version"
-
kind: "message-v1"
backtrace:
- "/usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake:1271 (message)"
- "/usr/share/cmake/Modules/CMakeDetermineASMCompiler.cmake:139 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
- "CMakeLists.txt:35 (enable_language)"
message: |
Checking whether the ASM compiler is GNU using "--version" matched "(GNU assembler)|(GCC)|(Free Software Foundation)":
arm-none-eabi-gcc (Arch Repository) 14.2.0
Copyright (C) 2024 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
...

8
CMakeFiles/InstallScripts.json Normal file
View file

@ -0,0 +1,8 @@
{
"InstallScripts" :
[
"/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake_install.cmake",
"/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake/stm32cubemx/cmake_install.cmake"
],
"Parallel" : false
}

7
CMakeFiles/TargetDirectories.txt Normal file
View file

@ -0,0 +1,7 @@
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/f407ve_hs_uart.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/edit_cache.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/CMakeFiles/rebuild_cache.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake/stm32cubemx/CMakeFiles/FatFs.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake/stm32cubemx/CMakeFiles/edit_cache.dir
/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/cmake/stm32cubemx/CMakeFiles/rebuild_cache.dir

8
CMakeFiles/clean_additional.cmake Normal file
View file

@ -0,0 +1,8 @@
# Additional clean files
cmake_minimum_required(VERSION 3.16)
if("${CONFIG}" STREQUAL "" OR "${CONFIG}" STREQUAL "Debug")
file(REMOVE_RECURSE
"f407ve_hs_uart.map"
)
endif()

1
CMakeFiles/cmake.check_cache Normal file
View file

@ -0,0 +1 @@
# This file is generated by cmake for dependency checking of the CMakeCache.txt file

102
CMakeFiles/rules.ninja Normal file
View file

@ -0,0 +1,102 @@
# CMAKE generated file: DO NOT EDIT!
# Generated by "Ninja" Generator, CMake Version 4.0
# This file contains all the rules used to get the outputs files
# built from the input files.
# It is included in the main 'build.ninja'.
# =============================================================================
# Project: f407ve_hs_uart
# Configurations: Debug
# =============================================================================
# =============================================================================
#############################################
# Rule for compiling ASM files.
rule ASM_COMPILER__f407ve_hs_uart_unscanned_Debug
depfile = $DEP_FILE
deps = gcc
command = ${LAUNCHER}${CODE_CHECK}/usr/bin/arm-none-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
description = Building ASM object $out
#############################################
# Rule for compiling C files.
rule C_COMPILER__f407ve_hs_uart_unscanned_Debug
depfile = $DEP_FILE
deps = gcc
command = ${LAUNCHER}${CODE_CHECK}/usr/bin/arm-none-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
description = Building C object $out
#############################################
# Rule for linking C executable.
rule C_EXECUTABLE_LINKER__f407ve_hs_uart_Debug
command = $PRE_LINK && /usr/bin/arm-none-eabi-gcc $FLAGS -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -T "/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart/STM32F407XX_FLASH.ld" --specs=nano.specs -Wl,-Map=f407ve_hs_uart.map -Wl,--gc-sections -Wl,--start-group -lc -lm -Wl,--end-group -Wl,--print-memory-usage $LINK_FLAGS $in -o $TARGET_FILE $LINK_PATH $LINK_LIBRARIES && $POST_BUILD
description = Linking C executable $TARGET_FILE
restat = $RESTAT
#############################################
# Rule for running custom commands.
rule CUSTOM_COMMAND
command = $COMMAND
description = $DESC
#############################################
# Rule for compiling C files.
rule C_COMPILER__STM32_Drivers_unscanned_Debug
depfile = $DEP_FILE
deps = gcc
command = ${LAUNCHER}${CODE_CHECK}/usr/bin/arm-none-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
description = Building C object $out
#############################################
# Rule for compiling C files.
rule C_COMPILER__FatFs_unscanned_Debug
depfile = $DEP_FILE
deps = gcc
command = ${LAUNCHER}${CODE_CHECK}/usr/bin/arm-none-eabi-gcc $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
description = Building C object $out
#############################################
# Rule for re-running cmake.
rule RERUN_CMAKE
command = /usr/bin/cmake --regenerate-during-build -S/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart -B/mnt/userdata/abody/work/playground/stm32/f407ve_hs_uart
description = Re-running CMake...
generator = 1
#############################################
# Rule for cleaning additional files.
rule CLEAN_ADDITIONAL
command = /usr/bin/cmake -DCONFIG=$CONFIG -P CMakeFiles/clean_additional.cmake
description = Cleaning additional files...
#############################################
# Rule for cleaning all built files.
rule CLEAN
command = /usr/bin/ninja $FILE_ARG -t clean $TARGETS
description = Cleaning all built files...
#############################################
# Rule for printing all primary targets available.
rule HELP
command = /usr/bin/ninja -t targets
description = All primary targets available:

74
CMakeLists.txt Normal file
View file

@ -0,0 +1,74 @@
cmake_minimum_required(VERSION 3.22)
#
# This file is generated only once,
# and is not re-generated if converter is called multiple times.
#
# User is free to modify the file as much as necessary
#
# Setup compiler settings
set(CMAKE_C_STANDARD 11)
set(CMAKE_C_STANDARD_REQUIRED ON)
set(CMAKE_C_EXTENSIONS ON)
# Define the build type
if(NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE "Debug")
endif()
# Set the project name
set(CMAKE_PROJECT_NAME f407ve_hs_uart)
# Include toolchain file
include("cmake/gcc-arm-none-eabi.cmake")
# Enable compile command to ease indexing with e.g. clangd
set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)
# Core project settings
project(${CMAKE_PROJECT_NAME})
message("Build type: " ${CMAKE_BUILD_TYPE})
# Enable CMake support for ASM and C languages
enable_language(C CXX ASM)
# Create an executable object type
add_executable(${CMAKE_PROJECT_NAME})
# Add STM32CubeMX generated sources
add_subdirectory(cmake/stm32cubemx)
add_subdirectory(components/platform)
add_subdirectory(components/f4ll)
# Link directories setup
target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined library search paths
)
# Add sources to executable
target_sources(${CMAKE_PROJECT_NAME} PRIVATE
# Add user sources here
)
# Add include paths
target_include_directories(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined include paths
)
# Add project symbols (macros)
target_compile_definitions(${CMAKE_PROJECT_NAME} PRIVATE
# Add user defined symbols
)
# Add linked libraries
target_link_libraries(${CMAKE_PROJECT_NAME}
stm32cubemx
# Add user defined libraries
)
# Poor quality LL code from ST
target_compile_options(stm32cubemx INTERFACE -Wno-unused-parameter)

60
CMakePresets.json Normal file
View file

@ -0,0 +1,60 @@
{
"version": 3,
"configurePresets": [
{
"name": "default",
"hidden": true,
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"toolchainFile": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake",
"cacheVariables": {
}
},
{
"name": "Debug",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Debug"
}
},
{
"name": "RelWithDebInfo",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "RelWithDebInfo"
}
},
{
"name": "Release",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "Release"
}
},
{
"name": "MinSizeRel",
"inherits": "default",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "MinSizeRel"
}
}
],
"buildPresets": [
{
"name": "Debug",
"configurePreset": "Debug"
},
{
"name": "RelWithDebInfo",
"configurePreset": "RelWithDebInfo"
},
{
"name": "Release",
"configurePreset": "Release"
},
{
"name": "MinSizeRel",
"configurePreset": "MinSizeRel"
}
]
}

50
Core/Inc/crc.h Normal file
View file

@ -0,0 +1,50 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file crc.h
* @brief This file contains all the function prototypes for
* the crc.c file
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CRC_H__
#define __CRC_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_CRC_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __CRC_H__ */

32
Inc/dma.h → Core/Inc/dma.h
View file

@ -1,27 +1,28 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : dma.h * @file dma.h
* Description : This file contains all the function prototypes for * @brief This file contains all the function prototypes for
* the dma.c file * the dma.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __dma_H #ifndef __DMA_H__
#define __dma_H #define __DMA_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -47,10 +48,5 @@ void MX_DMA_Init(void);
} }
#endif #endif
#endif /* __dma_H */ #endif /* __DMA_H__ */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

15
Inc/fsmc.h → Core/Inc/fsmc.h
View file

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : FSMC.h * File Name : FSMC.h
@ -6,16 +7,16 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FSMC_H #ifndef __FSMC_H
#define __FSMC_H #define __FSMC_H
@ -56,5 +57,3 @@ void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram);
/** /**
* @} * @}
*/ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

49
Core/Inc/gpio.h Normal file
View file

@ -0,0 +1,49 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.h
* @brief This file contains all the function prototypes for
* the gpio.c file
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __GPIO_H__
#define __GPIO_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_GPIO_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__ GPIO_H__ */

17
Inc/main.h → Core/Inc/main.h
View file

@ -7,13 +7,12 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
@ -29,13 +28,12 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h" #include "stm32f4xx_hal.h"
#include "stm32f4xx_ll_crc.h" #include "stm32f4xx_ll_crc.h"
#include "stm32f4xx_ll_dma.h" #include "stm32f4xx_ll_dma.h"
#include "stm32f4xx_hal.h"
#include "stm32f4xx_ll_spi.h" #include "stm32f4xx_ll_spi.h"
#include "stm32f4xx_ll_usart.h" #include "stm32f4xx_ll_usart.h"
#include "stm32f4xx_ll_rcc.h" #include "stm32f4xx_ll_rcc.h"
#include "stm32f4xx.h"
#include "stm32f4xx_ll_system.h" #include "stm32f4xx_ll_system.h"
#include "stm32f4xx_ll_gpio.h" #include "stm32f4xx_ll_gpio.h"
#include "stm32f4xx_ll_exti.h" #include "stm32f4xx_ll_exti.h"
@ -98,6 +96,7 @@ void Error_Handler(void);
#define NRF_CS_GPIO_Port GPIOB #define NRF_CS_GPIO_Port GPIOB
#define NRF_IRQ_Pin LL_GPIO_PIN_8 #define NRF_IRQ_Pin LL_GPIO_PIN_8
#define NRF_IRQ_GPIO_Port GPIOB #define NRF_IRQ_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */ /* USER CODE END Private defines */
@ -107,5 +106,3 @@ void Error_Handler(void);
#endif #endif
#endif /* __MAIN_H */ #endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

36
Inc/sdio.h → Core/Inc/sdio.h
View file

@ -1,26 +1,28 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : SDIO.h * @file sdio.h
* Description : This file provides code for the configuration * @brief This file contains all the function prototypes for
* of the SDIO instances. * the sdio.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __sdio_H #ifndef __SDIO_H__
#define __sdio_H #define __SDIO_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -45,14 +47,6 @@ void MX_SDIO_SD_Init(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__ sdio_H */
/** #endif /* __SDIO_H__ */
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

50
Core/Inc/spi.h Normal file
View file

@ -0,0 +1,50 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file spi.h
* @brief This file contains all the function prototypes for
* the spi.c file
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SPI_H__
#define __SPI_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_SPI2_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __SPI_H__ */

28
Inc/stm32_assert.h → Core/Inc/stm32_assert.h
View file

@ -1,27 +1,28 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32_assert.h * @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert file. * @brief STM32 assert file.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H #ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H #define __STM32_ASSERT_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
@ -31,17 +32,17 @@
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief The assert_param macro is used for function's parameters check. * @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function * @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source * which reports the name of the source file and the source
* line number of the call that failed. * line number of the call that failed.
* If expr is true, it returns no value. * If expr is true, it returns no value.
* @retval None * @retval None
*/ */
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */ /* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line); void assert_failed(uint8_t *file, uint32_t line);
#else #else
#define assert_param(expr) ((void)0U) #define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */
#ifdef __cplusplus #ifdef __cplusplus
@ -50,4 +51,3 @@
#endif /* __STM32_ASSERT_H */ #endif /* __STM32_ASSERT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

268
Inc/stm32f4xx_hal_conf.h → Core/Inc/stm32f4xx_hal_conf.h
View file

@ -1,23 +1,24 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal_conf_template.h * @file stm32f4xx_hal_conf_template.h
* @author MCD Application Team * @author MCD Application Team
* @brief HAL configuration template file. * @brief HAL configuration template file.
* This file should be copied to the application folder and renamed * This file should be copied to the application folder and renamed
* to stm32f4xx_hal_conf.h. * to stm32f4xx_hal_conf.h.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics. * Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H #ifndef __STM32F4xx_HAL_CONF_H
@ -32,52 +33,54 @@
/* ########################## Module Selection ############################## */ /* ########################## Module Selection ############################## */
/** /**
* @brief This is the list of modules to be used in the HAL driver * @brief This is the list of modules to be used in the HAL driver
*/ */
#define HAL_MODULE_ENABLED #define HAL_MODULE_ENABLED
/* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */ /* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */ /* #define HAL_CAN_LEGACY_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */ /* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */ /* #define HAL_ETH_LEGACY_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */ /* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */ /* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
#define HAL_SRAM_MODULE_ENABLED #define HAL_SRAM_MODULE_ENABLED
/* #define HAL_SDRAM_MODULE_ENABLED */ /* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */ /* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED #define HAL_SD_MODULE_ENABLED
/* #define HAL_MMC_MODULE_ENABLED */ /* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */ /* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_TIM_MODULE_ENABLED */ /* #define HAL_TIM_MODULE_ENABLED */
/* #define HAL_UART_MODULE_ENABLED */ /* #define HAL_UART_MODULE_ENABLED */
/* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED #define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */ /* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */ /* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */ /* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */ /* #define HAL_FMPSMBUS_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */ /* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */ /* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED #define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED
@ -90,20 +93,20 @@
/** /**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL). * (when HSE is used as system clock source, directly or through the PLL).
*/ */
#if !defined (HSE_VALUE) #if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT) #if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */ #endif /* HSE_STARTUP_TIMEOUT */
/** /**
* @brief Internal High Speed oscillator (HSI) value. * @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL). * (when HSI is used as system clock source, directly or through the PLL).
*/ */
#if !defined (HSI_VALUE) #if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@ -112,8 +115,8 @@
/** /**
* @brief Internal Low Speed oscillator (LSI) value. * @brief Internal Low Speed oscillator (LSI) value.
*/ */
#if !defined (LSI_VALUE) #if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations The real value may vary depending on the variations
in voltage and temperature.*/ in voltage and temperature.*/
@ -121,20 +124,20 @@
* @brief External Low Speed oscillator (LSE) value. * @brief External Low Speed oscillator (LSE) value.
*/ */
#if !defined (LSE_VALUE) #if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ #define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */ #endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT) #if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */ #endif /* LSE_STARTUP_TIMEOUT */
/** /**
* @brief External clock source for I2S peripheral * @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source * This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad. * frequency, this source is inserted directly through I2S_CKIN pad.
*/ */
#if !defined (EXTERNAL_CLOCK_VALUE) #if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */ #endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE, /* Tip: To avoid modifying this file each time you need to use different HSE,
@ -144,16 +147,56 @@
/** /**
* @brief This is the HAL system configuration section * @brief This is the HAL system configuration section
*/ */
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ #define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
#define USE_RTOS 0U #define USE_RTOS 0U
#define PREFETCH_ENABLE 1U #define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U #define DATA_CACHE_ENABLE 1U
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
/* ########################## Assert Selection ############################## */ /* ########################## Assert Selection ############################## */
/** /**
* @brief Uncomment the line below to expanse the "assert_param" macro in the * @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code * HAL drivers code
*/ */
/* #define USE_FULL_ASSERT 1U */ /* #define USE_FULL_ASSERT 1U */
@ -170,29 +213,29 @@
#define MAC_ADDR4 0U #define MAC_ADDR4 0U
#define MAC_ADDR5 0U #define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */ /* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ #define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ #define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */ /* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/ /* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U #define DP83848_PHY_ADDRESS
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) #define PHY_RESET_DELAY 0x000000FFU
/* PHY Configuration delay */ /* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) #define PHY_CONFIG_DELAY 0x00000FFFU
#define PHY_READ_TO ((uint32_t)0x0000FFFFU) #define PHY_READ_TO 0x0000FFFFU
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) #define PHY_WRITE_TO 0x0000FFFFU
/* Section 3: Common PHY Registers */ /* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ #define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ #define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ #define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ #define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
@ -207,12 +250,12 @@
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ #define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ /* Section 4: Extended PHY Registers */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ #define PHY_SR ((uint16_t)) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)) /*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */ /* ################## SPI peripheral configuration ########################## */
@ -225,25 +268,25 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
/** /**
* @brief Include module's header file * @brief Include module's header file
*/ */
#ifdef HAL_RCC_MODULE_ENABLED #ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h" #include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */ #endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED #ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h" #include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */ #endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED #ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h" #include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */ #endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED #ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h" #include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */ #endif /* HAL_CORTEX_MODULE_ENABLED */
@ -256,18 +299,18 @@
#include "stm32f4xx_hal_can.h" #include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */ #endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED #ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h" #include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */ #endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED #ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h" #include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */ #endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED #ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h" #include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */ #endif /* HAL_DMA2D_MODULE_ENABLED */
@ -284,10 +327,14 @@
#include "stm32f4xx_hal_eth.h" #include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */ #endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_ETH_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_eth_legacy.h"
#endif /* HAL_ETH_LEGACY_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED #ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h" #include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */ #endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED #ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h" #include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */ #endif /* HAL_SRAM_MODULE_ENABLED */
@ -302,11 +349,11 @@
#ifdef HAL_PCCARD_MODULE_ENABLED #ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h" #include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */ #endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED #ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h" #include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */ #endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED #ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h" #include "stm32f4xx_hal_hash.h"
@ -316,6 +363,10 @@
#include "stm32f4xx_hal_i2c.h" #include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */ #endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED #ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h" #include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */ #endif /* HAL_I2S_MODULE_ENABLED */
@ -348,10 +399,6 @@
#include "stm32f4xx_hal_sd.h" #include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */ #endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED #ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h" #include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */ #endif /* HAL_SPI_MODULE_ENABLED */
@ -387,7 +434,7 @@
#ifdef HAL_HCD_MODULE_ENABLED #ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h" #include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */ #endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED #ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h" #include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */ #endif /* HAL_DSI_MODULE_ENABLED */
@ -404,6 +451,10 @@
#include "stm32f4xx_hal_fmpi2c.h" #include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */ #endif /* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_fmpsmbus.h"
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED #ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h" #include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */ #endif /* HAL_SPDIFRX_MODULE_ENABLED */
@ -415,14 +466,18 @@
#ifdef HAL_LPTIM_MODULE_ENABLED #ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h" #include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */ #endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief The assert_param macro is used for function's parameters check. * @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function * @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source * which reports the name of the source file and the source
* line number of the call that failed. * line number of the call that failed.
* If expr is true, it returns no value. * If expr is true, it returns no value.
* @retval None * @retval None
*/ */
@ -431,13 +486,10 @@
void assert_failed(uint8_t* file, uint32_t line); void assert_failed(uint8_t* file, uint32_t line);
#else #else
#define assert_param(expr) ((void)0U) #define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F4xx_HAL_CONF_H */ #endif /* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

19
Inc/stm32f4xx_it.h → Core/Inc/stm32f4xx_it.h
View file

@ -6,15 +6,14 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */ /* USER CODE END Header */
@ -23,8 +22,8 @@
#define __STM32F4xx_IT_H #define __STM32F4xx_IT_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
@ -83,5 +82,3 @@ void USART6_IRQHandler(void);
#endif #endif
#endif /* __STM32F4xx_IT_H */ #endif /* __STM32F4xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

36
Inc/usart.h → Core/Inc/usart.h
View file

@ -1,26 +1,28 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : USART.h * @file usart.h
* Description : This file provides code for the configuration * @brief This file contains all the function prototypes for
* of the USART instances. * the usart.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __usart_H #ifndef __USART_H__
#define __usart_H #define __USART_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -47,14 +49,6 @@ void MX_USART6_UART_Init(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__ usart_H */
/** #endif /* __USART_H__ */
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

36
Inc/usb_otg.h → Core/Inc/usb_otg.h
View file

@ -1,26 +1,28 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : USB_OTG.h * @file usb_otg.h
* Description : This file provides code for the configuration * @brief This file contains all the function prototypes for
* of the USB_OTG instances. * the usb_otg.c file
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __usb_otg_H #ifndef __USB_OTG_H__
#define __usb_otg_H #define __USB_OTG_H__
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -45,14 +47,6 @@ void MX_USB_OTG_FS_PCD_Init(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__ usb_otg_H */
/** #endif /* __USB_OTG_H__ */
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

49
Core/Src/crc.c Normal file
View file

@ -0,0 +1,49 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file crc.c
* @brief This file provides code for the configuration
* of the CRC instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "crc.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* CRC init function */
void MX_CRC_Init(void)
{
/* USER CODE BEGIN CRC_Init 0 */
/* USER CODE END CRC_Init 0 */
/* Peripheral clock enable */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
/* USER CODE BEGIN CRC_Init 1 */
/* USER CODE END CRC_Init 1 */
/* USER CODE BEGIN CRC_Init 2 */
/* USER CODE END CRC_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

32
Src/dma.c → Core/Src/dma.c
View file

@ -1,21 +1,22 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : dma.c * @file dma.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers. * of all the requested memory to memory DMA transfers.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "dma.h" #include "dma.h"
@ -32,10 +33,10 @@
/* USER CODE END 1 */ /* USER CODE END 1 */
/** /**
* Enable DMA controller clock * Enable DMA controller clock
*/ */
void MX_DMA_Init(void) void MX_DMA_Init(void)
{ {
/* Init with LL driver */ /* Init with LL driver */
@ -163,12 +164,3 @@ void MX_DMA_Init(void)
/* USER CODE END 2 */ /* USER CODE END 2 */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

50
Src/fsmc.c → Core/Src/fsmc.c
View file

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : FSMC.c * File Name : FSMC.c
@ -6,16 +7,16 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "fsmc.h" #include "fsmc.h"
@ -29,8 +30,16 @@ SRAM_HandleTypeDef hsram1;
/* FSMC initialization function */ /* FSMC initialization function */
void MX_FSMC_Init(void) void MX_FSMC_Init(void)
{ {
/* USER CODE BEGIN FSMC_Init 0 */
/* USER CODE END FSMC_Init 0 */
FSMC_NORSRAM_TimingTypeDef Timing = {0}; FSMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FSMC_Init 1 */
/* USER CODE END FSMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence /** Perform the SRAM1 memory initialization sequence
*/ */
hsram1.Instance = FSMC_NORSRAM_DEVICE; hsram1.Instance = FSMC_NORSRAM_DEVICE;
@ -65,6 +74,9 @@ void MX_FSMC_Init(void)
Error_Handler( ); Error_Handler( );
} }
/* USER CODE BEGIN FSMC_Init 2 */
/* USER CODE END FSMC_Init 2 */
} }
static uint32_t FSMC_Initialized = 0; static uint32_t FSMC_Initialized = 0;
@ -81,8 +93,8 @@ static void HAL_FSMC_MspInit(void){
/* Peripheral clock enable */ /* Peripheral clock enable */
__HAL_RCC_FSMC_CLK_ENABLE(); __HAL_RCC_FSMC_CLK_ENABLE();
/** FSMC GPIO Configuration /** FSMC GPIO Configuration
PE7 ------> FSMC_D4 PE7 ------> FSMC_D4
PE8 ------> FSMC_D5 PE8 ------> FSMC_D5
PE9 ------> FSMC_D6 PE9 ------> FSMC_D6
@ -105,8 +117,8 @@ static void HAL_FSMC_MspInit(void){
PD7 ------> FSMC_NE1 PD7 ------> FSMC_NE1
*/ */
/* GPIO_InitStruct */ /* GPIO_InitStruct */
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|GPIO_PIN_15; |GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -116,8 +128,8 @@ static void HAL_FSMC_MspInit(void){
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* GPIO_InitStruct */ /* GPIO_InitStruct */
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_13 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1 |GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7; |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -153,8 +165,8 @@ static void HAL_FSMC_MspDeInit(void){
FSMC_DeInitialized = 1; FSMC_DeInitialized = 1;
/* Peripheral clock enable */ /* Peripheral clock enable */
__HAL_RCC_FSMC_CLK_DISABLE(); __HAL_RCC_FSMC_CLK_DISABLE();
/** FSMC GPIO Configuration /** FSMC GPIO Configuration
PE7 ------> FSMC_D4 PE7 ------> FSMC_D4
PE8 ------> FSMC_D5 PE8 ------> FSMC_D5
PE9 ------> FSMC_D6 PE9 ------> FSMC_D6
@ -177,12 +189,12 @@ static void HAL_FSMC_MspDeInit(void){
PD7 ------> FSMC_NE1 PD7 ------> FSMC_NE1
*/ */
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|GPIO_PIN_15); |GPIO_PIN_15);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_13 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1 |GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7); |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7);
/* USER CODE BEGIN FSMC_MspDeInit 1 */ /* USER CODE BEGIN FSMC_MspDeInit 1 */
@ -206,5 +218,3 @@ void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* sramHandle){
/** /**
* @} * @}
*/ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

28
Src/gpio.c → Core/Src/gpio.c
View file

@ -1,24 +1,26 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : gpio.c * @file gpio.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of all used GPIO pins. * of all used GPIO pins.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "gpio.h" #include "gpio.h"
/* USER CODE BEGIN 0 */ /* USER CODE BEGIN 0 */
/* USER CODE END 0 */ /* USER CODE END 0 */
@ -30,9 +32,9 @@
/* USER CODE END 1 */ /* USER CODE END 1 */
/** Configure pins as /** Configure pins as
* Analog * Analog
* Input * Input
* Output * Output
* EVENT_OUT * EVENT_OUT
* EXTI * EXTI
@ -100,5 +102,3 @@ void MX_GPIO_Init(void)
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
/* USER CODE END 2 */ /* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

135
Src/main.c → Core/Src/main.c
View file

@ -1,38 +1,37 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file : main.c * @file : main.c
* @brief : Main program body * @brief : Main program body
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause *
* ******************************************************************************
****************************************************************************** */
*/
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "crc.h" #include "crc.h"
#include "dma.h" #include "dma.h"
#include "fatfs.h" #include "fatfs.h"
#include "fsmc.h"
#include "gpio.h"
#include "sdio.h" #include "sdio.h"
#include "spi.h" #include "spi.h"
#include "usart.h" #include "usart.h"
#include "usb_otg.h" #include "usb_otg.h"
#include "gpio.h"
#include "fsmc.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
#include "application.h" // #include <application.h>
/* USER CODE END Includes */ /* USER CODE END Includes */
@ -69,19 +68,19 @@ void SystemClock_Config(void);
/* USER CODE END 0 */ /* USER CODE END 0 */
/** /**
* @brief The application entry point. * @brief The application entry point.
* @retval int * @retval int
*/ */
int main(void) int main(void) {
{
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/ /* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */ /* Reset of all peripherals, Initializes the Flash interface and the Systick.
*/
HAL_Init(); HAL_Init();
/* USER CODE BEGIN Init */ /* USER CODE BEGIN Init */
@ -104,14 +103,19 @@ int main(void)
MX_USART3_UART_Init(); MX_USART3_UART_Init();
MX_USART6_UART_Init(); MX_USART6_UART_Init();
MX_CRC_Init(); MX_CRC_Init();
MX_FSMC_Init();
MX_SDIO_SD_Init();
MX_SPI2_Init();
MX_USB_OTG_FS_PCD_Init();
MX_FATFS_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
MainLoop(); // MainLoop();
/* USER CODE END 2 */ /* USER CODE END 2 */
/* Infinite loop */ /* Infinite loop */
/* USER CODE BEGIN WHILE */ /* USER CODE BEGIN WHILE */
while (1) while (1) {
{
/* USER CODE END WHILE */ /* USER CODE END WHILE */
/* USER CODE BEGIN 3 */ /* USER CODE BEGIN 3 */
@ -120,20 +124,21 @@ int main(void)
} }
/** /**
* @brief System Clock Configuration * @brief System Clock Configuration
* @retval None * @retval None
*/ */
void SystemClock_Config(void) void SystemClock_Config(void) {
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/ /** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@ -142,21 +147,20 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLN = 168; RCC_OscInitStruct.PLL.PLLN = 168;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7; RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
{
Error_Handler(); Error_Handler();
} }
/** Initializes the CPU, AHB and APB busses clocks
*/ /** Initializes the CPU, AHB and APB buses clocks
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK */
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
{
Error_Handler(); Error_Handler();
} }
} }
@ -166,32 +170,31 @@ void SystemClock_Config(void)
/* USER CODE END 4 */ /* USER CODE END 4 */
/** /**
* @brief This function is executed in case of error occurrence. * @brief This function is executed in case of error occurrence.
* @retval None * @retval None
*/ */
void Error_Handler(void) void Error_Handler(void) {
{
/* USER CODE BEGIN Error_Handler_Debug */ /* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */ /* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1) {
}
/* USER CODE END Error_Handler_Debug */ /* USER CODE END Error_Handler_Debug */
} }
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief Reports the name of the source file and the source line number * @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred. * where the assert_param error has occurred.
* @param file: pointer to the source file name * @param file: pointer to the source file name
* @param line: assert_param error line source number * @param line: assert_param error line source number
* @retval None * @retval None
*/ */
void assert_failed(uint8_t *file, uint32_t line) void assert_failed(uint8_t *file, uint32_t line) {
{
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number, /* User can add his own implementation to report the file name and line
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file,
line) */
/* USER CODE END 6 */ /* USER CODE END 6 */
} }
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

52
Src/sdio.c → Core/Src/sdio.c
View file

@ -1,22 +1,22 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : SDIO.c * @file sdio.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of the SDIO instances. * of the SDIO instances.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "sdio.h" #include "sdio.h"
@ -31,13 +31,23 @@ SD_HandleTypeDef hsd;
void MX_SDIO_SD_Init(void) void MX_SDIO_SD_Init(void)
{ {
/* USER CODE BEGIN SDIO_Init 0 */
/* USER CODE END SDIO_Init 0 */
/* USER CODE BEGIN SDIO_Init 1 */
/* USER CODE END SDIO_Init 1 */
hsd.Instance = SDIO; hsd.Instance = SDIO;
hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING; hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE; hsd.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE; hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
hsd.Init.BusWide = SDIO_BUS_WIDE_1B; hsd.Init.BusWide = SDIO_BUS_WIDE_4B;
hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE; hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
hsd.Init.ClockDiv = 0; hsd.Init.ClockDiv = 0;
/* USER CODE BEGIN SDIO_Init 2 */
/* USER CODE END SDIO_Init 2 */
} }
@ -52,18 +62,18 @@ void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
/* USER CODE END SDIO_MspInit 0 */ /* USER CODE END SDIO_MspInit 0 */
/* SDIO clock enable */ /* SDIO clock enable */
__HAL_RCC_SDIO_CLK_ENABLE(); __HAL_RCC_SDIO_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE();
/**SDIO GPIO Configuration /**SDIO GPIO Configuration
PC8 ------> SDIO_D0 PC8 ------> SDIO_D0
PC9 ------> SDIO_D1 PC9 ------> SDIO_D1
PC10 ------> SDIO_D2 PC10 ------> SDIO_D2
PC11 ------> SDIO_D3 PC11 ------> SDIO_D3
PC12 ------> SDIO_CK PC12 ------> SDIO_CK
PD2 ------> SDIO_CMD PD2 ------> SDIO_CMD
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12; |GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -94,16 +104,16 @@ void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle)
/* USER CODE END SDIO_MspDeInit 0 */ /* USER CODE END SDIO_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_SDIO_CLK_DISABLE(); __HAL_RCC_SDIO_CLK_DISABLE();
/**SDIO GPIO Configuration /**SDIO GPIO Configuration
PC8 ------> SDIO_D0 PC8 ------> SDIO_D0
PC9 ------> SDIO_D1 PC9 ------> SDIO_D1
PC10 ------> SDIO_D2 PC10 ------> SDIO_D2
PC11 ------> SDIO_D3 PC11 ------> SDIO_D3
PC12 ------> SDIO_CK PC12 ------> SDIO_CK
PD2 ------> SDIO_CMD PD2 ------> SDIO_CMD
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12); |GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2); HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
@ -112,10 +122,8 @@ void HAL_SD_MspDeInit(SD_HandleTypeDef* sdHandle)
/* USER CODE END SDIO_MspDeInit 1 */ /* USER CODE END SDIO_MspDeInit 1 */
} }
} }
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

39
Src/spi.c → Core/Src/spi.c
View file

@ -1,22 +1,22 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : SPI.c * @file spi.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of the SPI instances. * of the SPI instances.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "spi.h" #include "spi.h"
@ -27,18 +27,23 @@
/* SPI2 init function */ /* SPI2 init function */
void MX_SPI2_Init(void) void MX_SPI2_Init(void)
{ {
/* USER CODE BEGIN SPI2_Init 0 */
/* USER CODE END SPI2_Init 0 */
LL_SPI_InitTypeDef SPI_InitStruct = {0}; LL_SPI_InitTypeDef SPI_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
/**SPI2 GPIO Configuration /**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK PB13 ------> SPI2_SCK
PB14 ------> SPI2_MISO PB14 ------> SPI2_MISO
PB15 ------> SPI2_MOSI PB15 ------> SPI2_MOSI
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15; GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
@ -52,6 +57,9 @@ void MX_SPI2_Init(void)
NVIC_SetPriority(SPI2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_SetPriority(SPI2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
NVIC_EnableIRQ(SPI2_IRQn); NVIC_EnableIRQ(SPI2_IRQn);
/* USER CODE BEGIN SPI2_Init 1 */
/* USER CODE END SPI2_Init 1 */
SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
@ -64,11 +72,12 @@ void MX_SPI2_Init(void)
SPI_InitStruct.CRCPoly = 10; SPI_InitStruct.CRCPoly = 10;
LL_SPI_Init(SPI2, &SPI_InitStruct); LL_SPI_Init(SPI2, &SPI_InitStruct);
LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
/* USER CODE BEGIN SPI2_Init 2 */
/* USER CODE END SPI2_Init 2 */
} }
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

22
Src/stm32f4xx_hal_msp.c → Core/Src/stm32f4xx_hal_msp.c
View file

@ -1,19 +1,18 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : stm32f4xx_hal_msp.c * @file stm32f4xx_hal_msp.c
* Description : This file provides code for the MSP Initialization * @brief This file provides code for the MSP Initialization
* and de-Initialization codes. * and de-Initialization codes.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
@ -32,7 +31,7 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */ /* USER CODE BEGIN Define */
/* USER CODE END Define */ /* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
@ -63,6 +62,7 @@
*/ */
void HAL_MspInit(void) void HAL_MspInit(void)
{ {
/* USER CODE BEGIN MspInit 0 */ /* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */ /* USER CODE END MspInit 0 */
@ -80,5 +80,3 @@ void HAL_MspInit(void)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

162
Src/stm32f4xx_it.c → Core/Src/stm32f4xx_it.c
View file

@ -6,24 +6,15 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
/* This generated C file is symlinked as C++ and excluded from the build
* USE_CPLUSPLUS macro is defined externally (Preprocessor Settings or Makefile)
*/
#ifdef __cplusplus
extern "C" {
/* USER CODE END Header */ /* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -31,38 +22,16 @@ extern "C" {
#include "stm32f4xx_it.h" #include "stm32f4xx_it.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
#ifndef USE_CPLUSPLUS
#include "f4ll_c/usart_handler.h"
#include "f4ll_c/crc_handler.h"
#include "f4ll_c/console_handler.h"
#include "f4ll_c/memcpy_dma.h"
#endif
#include "globals.h"
#include "diag.h"
}
#ifdef USE_CPLUSPLUS
#include "globals_cpp.h"
#include "f4ll/memcpydma.h"
#include "f4ll/consolehandler.h"
#endif
extern "C" {
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */ /* USER CODE BEGIN TD */
#define HardFault_Handler(x) __attribute__((weak)) HardFault_Handler(x)
#define MemManage_Handler(x) __attribute__((weak)) MemManage_Handler(x)
#define BusFault_Handler(x) __attribute__((weak)) BusFault_Handler(x)
#define UsageFault_Handler(x) __attribute__((weak)) UsageFault_Handler(x)
/* USER CODE END TD */ /* USER CODE END TD */
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */ /* USER CODE BEGIN PD */
/* USER CODE END PD */ /* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
@ -92,7 +61,7 @@ extern "C" {
/* USER CODE END EV */ /* USER CODE END EV */
/******************************************************************************/ /******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */ /* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/ /******************************************************************************/
/** /**
* @brief This function handles Non maskable interrupt. * @brief This function handles Non maskable interrupt.
@ -103,7 +72,9 @@ void NMI_Handler(void)
/* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */ /* USER CODE END NonMaskableInt_IRQn 1 */
} }
@ -233,13 +204,8 @@ void SysTick_Handler(void)
void DMA1_Stream1_IRQHandler(void) void DMA1_Stream1_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::UsartCore::HandleRxDmaIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
/* USER CODE END DMA1_Stream1_IRQn 0 */ /* USER CODE END DMA1_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
/* USER CODE END DMA1_Stream1_IRQn 1 */ /* USER CODE END DMA1_Stream1_IRQn 1 */
@ -251,9 +217,8 @@ void DMA1_Stream1_IRQHandler(void)
void DMA1_Stream2_IRQHandler(void) void DMA1_Stream2_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
// console rx
/* USER CODE END DMA1_Stream2_IRQn 0 */ /* USER CODE END DMA1_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
/* USER CODE END DMA1_Stream2_IRQn 1 */ /* USER CODE END DMA1_Stream2_IRQn 1 */
@ -265,13 +230,8 @@ void DMA1_Stream2_IRQHandler(void)
void DMA1_Stream3_IRQHandler(void) void DMA1_Stream3_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
/* USER CODE END DMA1_Stream3_IRQn 0 */ /* USER CODE END DMA1_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */ /* USER CODE END DMA1_Stream3_IRQn 1 */
@ -283,13 +243,8 @@ void DMA1_Stream3_IRQHandler(void)
void DMA1_Stream4_IRQHandler(void) void DMA1_Stream4_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::ConsoleHandler::HandleTxDmaIrq(&f4ll::ConsoleHandler::Instance());
#else
HandleConsoleTxDmaIrq(&g_ConsoleTxDmaInfo, UART4);
#endif
/* USER CODE END DMA1_Stream4_IRQn 0 */ /* USER CODE END DMA1_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
/* USER CODE END DMA1_Stream4_IRQn 1 */ /* USER CODE END DMA1_Stream4_IRQn 1 */
@ -301,13 +256,8 @@ void DMA1_Stream4_IRQHandler(void)
void DMA1_Stream5_IRQHandler(void) void DMA1_Stream5_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
/* USER CODE END DMA1_Stream5_IRQn 0 */ /* USER CODE END DMA1_Stream5_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
/* USER CODE END DMA1_Stream5_IRQn 1 */ /* USER CODE END DMA1_Stream5_IRQn 1 */
@ -319,13 +269,8 @@ void DMA1_Stream5_IRQHandler(void)
void DMA1_Stream6_IRQHandler(void) void DMA1_Stream6_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
/* USER CODE END DMA1_Stream6_IRQn 0 */ /* USER CODE END DMA1_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
/* USER CODE END DMA1_Stream6_IRQn 1 */ /* USER CODE END DMA1_Stream6_IRQn 1 */
@ -350,11 +295,7 @@ void SPI2_IRQHandler(void)
void USART1_IRQHandler(void) void USART1_IRQHandler(void)
{ {
/* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE BEGIN USART1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
/* USER CODE END USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE BEGIN USART1_IRQn 1 */
@ -367,11 +308,7 @@ void USART1_IRQHandler(void)
void USART2_IRQHandler(void) void USART2_IRQHandler(void)
{ {
/* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE BEGIN USART2_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART2_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
/* USER CODE END USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */
/* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE BEGIN USART2_IRQn 1 */
@ -384,11 +321,7 @@ void USART2_IRQHandler(void)
void USART3_IRQHandler(void) void USART3_IRQHandler(void)
{ {
/* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE BEGIN USART3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART3_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
/* USER CODE END USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */
/* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE BEGIN USART3_IRQn 1 */
@ -401,11 +334,7 @@ void USART3_IRQHandler(void)
void UART4_IRQHandler(void) void UART4_IRQHandler(void)
{ {
/* USER CODE BEGIN UART4_IRQn 0 */ /* USER CODE BEGIN UART4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::ConsoleHandler::HandleUsartIrq(&f4ll::ConsoleHandler::Instance());
#else
Con_HandleUsartIrq(UART4);
#endif
/* USER CODE END UART4_IRQn 0 */ /* USER CODE END UART4_IRQn 0 */
/* USER CODE BEGIN UART4_IRQn 1 */ /* USER CODE BEGIN UART4_IRQn 1 */
@ -418,13 +347,8 @@ void UART4_IRQHandler(void)
void DMA2_Stream1_IRQHandler(void) void DMA2_Stream1_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
/* USER CODE END DMA2_Stream1_IRQn 0 */ /* USER CODE END DMA2_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
/* USER CODE END DMA2_Stream1_IRQn 1 */ /* USER CODE END DMA2_Stream1_IRQn 1 */
@ -436,13 +360,8 @@ void DMA2_Stream1_IRQHandler(void)
void DMA2_Stream2_IRQHandler(void) void DMA2_Stream2_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartRxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
/* USER CODE END DMA2_Stream2_IRQn 0 */ /* USER CODE END DMA2_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
/* USER CODE END DMA2_Stream2_IRQn 1 */ /* USER CODE END DMA2_Stream2_IRQn 1 */
@ -454,13 +373,8 @@ void DMA2_Stream2_IRQHandler(void)
void DMA2_Stream3_IRQHandler(void) void DMA2_Stream3_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::MemcpyDma::Instance().DmaTransferCompleted();
#else
Mcd_HandleDmaIrq();
#endif
/* USER CODE END DMA2_Stream3_IRQn 0 */ /* USER CODE END DMA2_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
/* USER CODE END DMA2_Stream3_IRQn 1 */ /* USER CODE END DMA2_Stream3_IRQn 1 */
@ -472,13 +386,8 @@ void DMA2_Stream3_IRQHandler(void)
void DMA2_Stream4_IRQHandler(void) void DMA2_Stream4_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::CrcHandler::Instance().DmaTransferCompleted();
#else
HandleCrcDmaIrq(&g_crcStatus);
#endif
/* USER CODE END DMA2_Stream4_IRQn 0 */ /* USER CODE END DMA2_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
/* USER CODE END DMA2_Stream4_IRQn 1 */ /* USER CODE END DMA2_Stream4_IRQn 1 */
@ -490,13 +399,8 @@ void DMA2_Stream4_IRQHandler(void)
void DMA2_Stream6_IRQHandler(void) void DMA2_Stream6_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
/* USER CODE END DMA2_Stream6_IRQn 0 */ /* USER CODE END DMA2_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
/* USER CODE END DMA2_Stream6_IRQn 1 */ /* USER CODE END DMA2_Stream6_IRQn 1 */
@ -508,13 +412,8 @@ void DMA2_Stream6_IRQHandler(void)
void DMA2_Stream7_IRQHandler(void) void DMA2_Stream7_IRQHandler(void)
{ {
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */ /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART1_OFFSET]);
#else
HandleUsartTxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
/* USER CODE END DMA2_Stream7_IRQn 0 */ /* USER CODE END DMA2_Stream7_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */ /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
/* USER CODE END DMA2_Stream7_IRQn 1 */ /* USER CODE END DMA2_Stream7_IRQn 1 */
@ -526,11 +425,7 @@ void DMA2_Stream7_IRQHandler(void)
void USART6_IRQHandler(void) void USART6_IRQHandler(void)
{ {
/* USER CODE BEGIN USART6_IRQn 0 */ /* USER CODE BEGIN USART6_IRQn 0 */
#ifdef USE_CPLUSPLUS
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART6_OFFSET]);
#else
HandleUsartIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
/* USER CODE END USART6_IRQn 0 */ /* USER CODE END USART6_IRQn 0 */
/* USER CODE BEGIN USART6_IRQn 1 */ /* USER CODE BEGIN USART6_IRQn 1 */
@ -539,7 +434,4 @@ void USART6_IRQHandler(void)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
}
#endif // __cplusplus
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

176
Core/Src/syscalls.c Normal file
View file

@ -0,0 +1,176 @@
/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeMX
* @brief Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}

79
Core/Src/sysmem.c Normal file
View file

@ -0,0 +1,79 @@
/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeMX
* @brief System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}

1508
Src/system_stm32f4xx.c → Core/Src/system_stm32f4xx.c
View file

File diff suppressed because it is too large Load diff

127
Src/usart.c → Core/Src/usart.c
View file

@ -1,22 +1,22 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : USART.c * @file usart.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of the USART instances. * of the USART instances.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "usart.h" #include "usart.h"
@ -27,28 +27,33 @@
/* UART4 init function */ /* UART4 init function */
void MX_UART4_Init(void) void MX_UART4_Init(void)
{ {
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0}; LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART4); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UART4);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
/**UART4 GPIO Configuration /**UART4 GPIO Configuration
PA0-WKUP ------> UART4_TX PA0-WKUP ------> UART4_TX
PA1 ------> UART4_RX PA1 ------> UART4_RX
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_0|LL_GPIO_PIN_1; GPIO_InitStruct.Pin = LL_GPIO_PIN_0|LL_GPIO_PIN_1;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_8; GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct); LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* UART4 DMA Init */ /* UART4 DMA Init */
/* UART4_RX Init */ /* UART4_RX Init */
LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4); LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4);
@ -91,6 +96,9 @@ void MX_UART4_Init(void)
NVIC_SetPriority(UART4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(UART4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(UART4_IRQn); NVIC_EnableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
USART_InitStruct.BaudRate = 115200; USART_InitStruct.BaudRate = 115200;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
@ -101,34 +109,42 @@ void MX_UART4_Init(void)
LL_USART_Init(UART4, &USART_InitStruct); LL_USART_Init(UART4, &USART_InitStruct);
LL_USART_ConfigAsyncMode(UART4); LL_USART_ConfigAsyncMode(UART4);
LL_USART_Enable(UART4); LL_USART_Enable(UART4);
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
} }
/* USART1 init function */ /* USART1 init function */
void MX_USART1_UART_Init(void) void MX_USART1_UART_Init(void)
{ {
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0}; LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
/**USART1 GPIO Configuration /**USART1 GPIO Configuration
PA9 ------> USART1_TX PA9 ------> USART1_TX
PA10 ------> USART1_RX PA10 ------> USART1_RX
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_9|LL_GPIO_PIN_10; GPIO_InitStruct.Pin = LL_GPIO_PIN_9|LL_GPIO_PIN_10;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_7; GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct); LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 DMA Init */ /* USART1 DMA Init */
/* USART1_RX Init */ /* USART1_RX Init */
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4); LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_2, LL_DMA_CHANNEL_4);
@ -171,6 +187,9 @@ void MX_USART1_UART_Init(void)
NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(USART1_IRQn); NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
USART_InitStruct.BaudRate = 5250000; USART_InitStruct.BaudRate = 5250000;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
@ -181,34 +200,42 @@ void MX_USART1_UART_Init(void)
LL_USART_Init(USART1, &USART_InitStruct); LL_USART_Init(USART1, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART1); LL_USART_ConfigAsyncMode(USART1);
LL_USART_Enable(USART1); LL_USART_Enable(USART1);
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
} }
/* USART2 init function */ /* USART2 init function */
void MX_USART2_UART_Init(void) void MX_USART2_UART_Init(void)
{ {
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0}; LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
/**USART2 GPIO Configuration /**USART2 GPIO Configuration
PA2 ------> USART2_TX PA2 ------> USART2_TX
PA3 ------> USART2_RX PA3 ------> USART2_RX
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_2|LL_GPIO_PIN_3; GPIO_InitStruct.Pin = LL_GPIO_PIN_2|LL_GPIO_PIN_3;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_7; GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct); LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART2 DMA Init */ /* USART2 DMA Init */
/* USART2_RX Init */ /* USART2_RX Init */
LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_5, LL_DMA_CHANNEL_4); LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_5, LL_DMA_CHANNEL_4);
@ -251,6 +278,9 @@ void MX_USART2_UART_Init(void)
NVIC_SetPriority(USART2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(USART2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(USART2_IRQn); NVIC_EnableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
USART_InitStruct.BaudRate = 5250000; USART_InitStruct.BaudRate = 5250000;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
@ -261,34 +291,42 @@ void MX_USART2_UART_Init(void)
LL_USART_Init(USART2, &USART_InitStruct); LL_USART_Init(USART2, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART2); LL_USART_ConfigAsyncMode(USART2);
LL_USART_Enable(USART2); LL_USART_Enable(USART2);
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
} }
/* USART3 init function */ /* USART3 init function */
void MX_USART3_UART_Init(void) void MX_USART3_UART_Init(void)
{ {
/* USER CODE BEGIN USART3_Init 0 */
/* USER CODE END USART3_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0}; LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
/**USART3 GPIO Configuration /**USART3 GPIO Configuration
PB10 ------> USART3_TX PB10 ------> USART3_TX
PB11 ------> USART3_RX PB11 ------> USART3_RX
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_10|LL_GPIO_PIN_11; GPIO_InitStruct.Pin = LL_GPIO_PIN_10|LL_GPIO_PIN_11;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_7; GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct); LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART3 DMA Init */ /* USART3 DMA Init */
/* USART3_RX Init */ /* USART3_RX Init */
LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_1, LL_DMA_CHANNEL_4); LL_DMA_SetChannelSelection(DMA1, LL_DMA_STREAM_1, LL_DMA_CHANNEL_4);
@ -331,6 +369,9 @@ void MX_USART3_UART_Init(void)
NVIC_SetPriority(USART3_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(USART3_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(USART3_IRQn); NVIC_EnableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
USART_InitStruct.BaudRate = 5250000; USART_InitStruct.BaudRate = 5250000;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
@ -341,34 +382,42 @@ void MX_USART3_UART_Init(void)
LL_USART_Init(USART3, &USART_InitStruct); LL_USART_Init(USART3, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART3); LL_USART_ConfigAsyncMode(USART3);
LL_USART_Enable(USART3); LL_USART_Enable(USART3);
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
} }
/* USART6 init function */ /* USART6 init function */
void MX_USART6_UART_Init(void) void MX_USART6_UART_Init(void)
{ {
/* USER CODE BEGIN USART6_Init 0 */
/* USER CODE END USART6_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0}; LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */ /* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART6); LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART6);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
/**USART6 GPIO Configuration /**USART6 GPIO Configuration
PC6 ------> USART6_TX PC6 ------> USART6_TX
PC7 ------> USART6_RX PC7 ------> USART6_RX
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7; GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_8; GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct); LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USART6 DMA Init */ /* USART6 DMA Init */
/* USART6_RX Init */ /* USART6_RX Init */
LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_1, LL_DMA_CHANNEL_5); LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_1, LL_DMA_CHANNEL_5);
@ -411,6 +460,9 @@ void MX_USART6_UART_Init(void)
NVIC_SetPriority(USART6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0)); NVIC_SetPriority(USART6_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),1, 0));
NVIC_EnableIRQ(USART6_IRQn); NVIC_EnableIRQ(USART6_IRQn);
/* USER CODE BEGIN USART6_Init 1 */
/* USER CODE END USART6_Init 1 */
USART_InitStruct.BaudRate = 5250000; USART_InitStruct.BaudRate = 5250000;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1; USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
@ -421,11 +473,12 @@ void MX_USART6_UART_Init(void)
LL_USART_Init(USART6, &USART_InitStruct); LL_USART_Init(USART6, &USART_InitStruct);
LL_USART_ConfigAsyncMode(USART6); LL_USART_ConfigAsyncMode(USART6);
LL_USART_Enable(USART6); LL_USART_Enable(USART6);
/* USER CODE BEGIN USART6_Init 2 */
/* USER CODE END USART6_Init 2 */
} }
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

46
Src/usb_otg.c → Core/Src/usb_otg.c
View file

@ -1,22 +1,22 @@
/* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* File Name : USB_OTG.c * @file usb_otg.c
* Description : This file provides code for the configuration * @brief This file provides code for the configuration
* of the USB_OTG instances. * of the USB_OTG instances.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2025 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under Ultimate Liberty license * This software is licensed under terms that can be found in the LICENSE file
* SLA0044, the "License"; You may not use this file except in compliance with * in the root directory of this software component.
* the License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* www.st.com/SLA0044
* *
****************************************************************************** ******************************************************************************
*/ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "usb_otg.h" #include "usb_otg.h"
@ -31,6 +31,13 @@ PCD_HandleTypeDef hpcd_USB_OTG_FS;
void MX_USB_OTG_FS_PCD_Init(void) void MX_USB_OTG_FS_PCD_Init(void)
{ {
/* USER CODE BEGIN USB_OTG_FS_Init 0 */
/* USER CODE END USB_OTG_FS_Init 0 */
/* USER CODE BEGIN USB_OTG_FS_Init 1 */
/* USER CODE END USB_OTG_FS_Init 1 */
hpcd_USB_OTG_FS.Instance = USB_OTG_FS; hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
hpcd_USB_OTG_FS.Init.dev_endpoints = 4; hpcd_USB_OTG_FS.Init.dev_endpoints = 4;
hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
@ -45,6 +52,9 @@ void MX_USB_OTG_FS_PCD_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/* USER CODE BEGIN USB_OTG_FS_Init 2 */
/* USER CODE END USB_OTG_FS_Init 2 */
} }
@ -57,11 +67,11 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
/* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
/* USER CODE END USB_OTG_FS_MspInit 0 */ /* USER CODE END USB_OTG_FS_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**USB_OTG_FS GPIO Configuration /**USB_OTG_FS GPIO Configuration
PA11 ------> USB_OTG_FS_DM PA11 ------> USB_OTG_FS_DM
PA12 ------> USB_OTG_FS_DP PA12 ------> USB_OTG_FS_DP
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -88,10 +98,10 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
/* USER CODE END USB_OTG_FS_MspDeInit 0 */ /* USER CODE END USB_OTG_FS_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE(); __HAL_RCC_USB_OTG_FS_CLK_DISABLE();
/**USB_OTG_FS GPIO Configuration /**USB_OTG_FS GPIO Configuration
PA11 ------> USB_OTG_FS_DM PA11 ------> USB_OTG_FS_DM
PA12 ------> USB_OTG_FS_DP PA12 ------> USB_OTG_FS_DP
*/ */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
@ -99,10 +109,8 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
/* USER CODE END USB_OTG_FS_MspDeInit 1 */ /* USER CODE END USB_OTG_FS_MspDeInit 1 */
} }
} }
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

31227
Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h
View file

File diff suppressed because it is too large Load diff

570
Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
View file

@ -1,269 +1,301 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx.h * @file stm32f4xx.h
* @author MCD Application Team * @author MCD Application Team
* @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File. * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
* *
* The file is the unique include file that the application programmer * The file is the unique include file that the application programmer
* is using in the C source code, usually in main.c. This file contains: * is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select: * - Configuration section that allows to select:
* - The STM32F4xx device used in the target application * - The STM32F4xx device used in the target application
* - To use or not the peripheral’s drivers in application code(i.e. * - To use or not the peripheral's drivers in application code(i.e.
* code will be based on direct access to peripheral’s registers * code will be based on direct access to peripheral's registers
* rather than drivers API), this option is controlled by * rather than drivers API), this option is controlled by
* "#define USE_HAL_DRIVER" * "#define USE_HAL_DRIVER"
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * Copyright (c) 2017 STMicroelectronics.
* * All rights reserved.
* Redistribution and use in source and binary forms, with or without modification, *
* are permitted provided that the following conditions are met: * This software is licensed under terms that can be found in the LICENSE file
* 1. Redistributions of source code must retain the above copyright notice, * in the root directory of this software component.
* this list of conditions and the following disclaimer. * If no LICENSE file comes with this software, it is provided AS-IS.
* 2. Redistributions in binary form must reproduce the above copyright notice, *
* this list of conditions and the following disclaimer in the documentation ******************************************************************************
* and/or other materials provided with the distribution. */
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software /** @addtogroup CMSIS
* without specific prior written permission. * @{
* */
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE /** @addtogroup stm32f4xx
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * @{
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE */
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR #ifndef __STM32F4xx_H
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER #define __STM32F4xx_H
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE #ifdef __cplusplus
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. extern "C" {
* #endif /* __cplusplus */
******************************************************************************
*/ /** @addtogroup Library_configuration_section
* @{
/** @addtogroup CMSIS */
* @{
*/ /**
* @brief STM32 Family
/** @addtogroup stm32f4xx */
* @{ #if !defined (STM32F4)
*/ #define STM32F4
#endif /* STM32F4 */
#ifndef __STM32F4xx_H
#define __STM32F4xx_H /* Uncomment the line below according to the target STM32 device used in your
application
#ifdef __cplusplus */
extern "C" { #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
#endif /* __cplusplus */ !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \
/** @addtogroup Library_configuration_section !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \
* @{ !defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \
*/ !defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx)
/* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
/** /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
* @brief STM32 Family /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
*/ /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
#if !defined (STM32F4) /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
#define STM32F4 /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
#endif /* STM32F4 */ /* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
STM32F439NI, STM32F429IG and STM32F429II Devices */
/* Uncomment the line below according to the target STM32 device used in your /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
application STM32F439NI, STM32F439IG and STM32F439II Devices */
*/ /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \ /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
!defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \ /* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */
!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \ /* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
!defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \ /* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */
!defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \ /* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */
!defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx) /* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,
/* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */ and STM32F446ZE Devices */
/* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */ /* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG,
/* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */ STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */
/* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */ /* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG
/* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */ and STM32F479NG Devices */
/* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */ /* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */
/* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG, /* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */
STM32F439NI, STM32F429IG and STM32F429II Devices */ /* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */
/* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG, /* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */
STM32F439NI, STM32F439IG and STM32F439II Devices */ /* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG,
/* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */ STM32F413RG, STM32F413VG and STM32F413ZG Devices */
/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */ /* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */
/* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */ #endif
/* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
/* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */ /* Tip: To avoid modifying this file each time you need to switch between these
/* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */ devices, you can define the device in your toolchain compiler preprocessor.
/* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, */
and STM32F446ZE Devices */ #if !defined (USE_HAL_DRIVER)
/* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG, /**
STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */ * @brief Comment the line below if you will not use the peripherals drivers.
/* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG In this case, these drivers will not be included and the application code will
and STM32F479NG Devices */ be based on direct access to peripherals registers
/* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */ */
/* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */ /*#define USE_HAL_DRIVER */
/* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */ #endif /* USE_HAL_DRIVER */
/* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */
/* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG, /**
STM32F413RG, STM32F413VG and STM32F413ZG Devices */ * @brief CMSIS version number V2.6.11
/* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */ */
#endif #define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */
/* Tip: To avoid modifying this file each time you need to switch between these #define __STM32F4xx_CMSIS_VERSION_SUB2 (0x0BU) /*!< [15:8] sub2 version */
devices, you can define the device in your toolchain compiler preprocessor. #define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
*/ #define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\
#if !defined (USE_HAL_DRIVER) |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\
/** |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\
* @brief Comment the line below if you will not use the peripherals drivers. |(__STM32F4xx_CMSIS_VERSION_RC))
In this case, these drivers will not be included and the application code will
be based on direct access to peripherals registers /**
*/ * @}
/*#define USE_HAL_DRIVER */ */
#endif /* USE_HAL_DRIVER */
/** @addtogroup Device_Included
/** * @{
* @brief CMSIS version number V2.6.3 */
*/
#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */ #if defined(STM32F405xx)
#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */ #include "stm32f405xx.h"
#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */ #elif defined(STM32F415xx)
#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #include "stm32f415xx.h"
#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\ #elif defined(STM32F407xx)
|(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\ #include "stm32f407xx.h"
|(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\ #elif defined(STM32F417xx)
|(__STM32F4xx_CMSIS_VERSION)) #include "stm32f417xx.h"
#elif defined(STM32F427xx)
/** #include "stm32f427xx.h"
* @} #elif defined(STM32F437xx)
*/ #include "stm32f437xx.h"
#elif defined(STM32F429xx)
/** @addtogroup Device_Included #include "stm32f429xx.h"
* @{ #elif defined(STM32F439xx)
*/ #include "stm32f439xx.h"
#elif defined(STM32F401xC)
#if defined(STM32F405xx) #include "stm32f401xc.h"
#include "stm32f405xx.h" #elif defined(STM32F401xE)
#elif defined(STM32F415xx) #include "stm32f401xe.h"
#include "stm32f415xx.h" #elif defined(STM32F410Tx)
#elif defined(STM32F407xx) #include "stm32f410tx.h"
#include "stm32f407xx.h" #elif defined(STM32F410Cx)
#elif defined(STM32F417xx) #include "stm32f410cx.h"
#include "stm32f417xx.h" #elif defined(STM32F410Rx)
#elif defined(STM32F427xx) #include "stm32f410rx.h"
#include "stm32f427xx.h" #elif defined(STM32F411xE)
#elif defined(STM32F437xx) #include "stm32f411xe.h"
#include "stm32f437xx.h" #elif defined(STM32F446xx)
#elif defined(STM32F429xx) #include "stm32f446xx.h"
#include "stm32f429xx.h" #elif defined(STM32F469xx)
#elif defined(STM32F439xx) #include "stm32f469xx.h"
#include "stm32f439xx.h" #elif defined(STM32F479xx)
#elif defined(STM32F401xC) #include "stm32f479xx.h"
#include "stm32f401xc.h" #elif defined(STM32F412Cx)
#elif defined(STM32F401xE) #include "stm32f412cx.h"
#include "stm32f401xe.h" #elif defined(STM32F412Zx)
#elif defined(STM32F410Tx) #include "stm32f412zx.h"
#include "stm32f410tx.h" #elif defined(STM32F412Rx)
#elif defined(STM32F410Cx) #include "stm32f412rx.h"
#include "stm32f410cx.h" #elif defined(STM32F412Vx)
#elif defined(STM32F410Rx) #include "stm32f412vx.h"
#include "stm32f410rx.h" #elif defined(STM32F413xx)
#elif defined(STM32F411xE) #include "stm32f413xx.h"
#include "stm32f411xe.h" #elif defined(STM32F423xx)
#elif defined(STM32F446xx) #include "stm32f423xx.h"
#include "stm32f446xx.h" #else
#elif defined(STM32F469xx) #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
#include "stm32f469xx.h" #endif
#elif defined(STM32F479xx)
#include "stm32f479xx.h" /**
#elif defined(STM32F412Cx) * @}
#include "stm32f412cx.h" */
#elif defined(STM32F412Zx)
#include "stm32f412zx.h" /** @addtogroup Exported_types
#elif defined(STM32F412Rx) * @{
#include "stm32f412rx.h" */
#elif defined(STM32F412Vx) typedef enum
#include "stm32f412vx.h" {
#elif defined(STM32F413xx) RESET = 0U,
#include "stm32f413xx.h" SET = !RESET
#elif defined(STM32F423xx) } FlagStatus, ITStatus;
#include "stm32f423xx.h"
#else typedef enum
#error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)" {
#endif DISABLE = 0U,
ENABLE = !DISABLE
/** } FunctionalState;
* @} #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
*/
typedef enum
/** @addtogroup Exported_types {
* @{ SUCCESS = 0U,
*/ ERROR = !SUCCESS
typedef enum } ErrorStatus;
{
RESET = 0U, /**
SET = !RESET * @}
} FlagStatus, ITStatus; */
typedef enum
{ /** @addtogroup Exported_macro
DISABLE = 0U, * @{
ENABLE = !DISABLE */
} FunctionalState; #define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
typedef enum
{ #define READ_BIT(REG, BIT) ((REG) & (BIT))
SUCCESS = 0U,
ERROR = !SUCCESS #define CLEAR_REG(REG) ((REG) = (0x0))
} ErrorStatus;
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
/**
* @} #define READ_REG(REG) ((REG))
*/
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/** @addtogroup Exported_macro #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
* @{
*/ /* Use of CMSIS compiler intrinsics for register exclusive access */
#define SET_BIT(REG, BIT) ((REG) |= (BIT)) /* Atomic 32-bit register access macro to set one or several bits */
#define ATOMIC_SET_BIT(REG, BIT) \
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) do { \
uint32_t val; \
#define READ_BIT(REG, BIT) ((REG) & (BIT)) do { \
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
#define CLEAR_REG(REG) ((REG) = (0x0)) } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
} while(0)
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
/* Atomic 32-bit register access macro to clear one or several bits */
#define READ_REG(REG) ((REG)) #define ATOMIC_CLEAR_BIT(REG, BIT) \
do { \
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) uint32_t val; \
do { \
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
} while(0)
/**
* @} /* Atomic 32-bit register access macro to clear and set one or several bits */
*/ #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
do { \
#if defined (USE_HAL_DRIVER) uint32_t val; \
#include "stm32f4xx_hal.h" do { \
#endif /* USE_HAL_DRIVER */ val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
#ifdef __cplusplus } while(0)
}
#endif /* __cplusplus */ /* Atomic 16-bit register access macro to set one or several bits */
#define ATOMIC_SETH_BIT(REG, BIT) \
#endif /* __STM32F4xx_H */ do { \
/** uint16_t val; \
* @} do { \
*/ val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
/** } while(0)
* @}
*/ /* Atomic 16-bit register access macro to clear one or several bits */
#define ATOMIC_CLEARH_BIT(REG, BIT) \
do { \
uint16_t val; \
do { \
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
} while(0)
/* Atomic 16-bit register access macro to clear and set one or several bits */
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
do { \
uint16_t val; \
do { \
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
} while(0)
/**
* @}
*/
#if defined (USE_HAL_DRIVER)
#include "stm32f4xx_hal.h"
#endif /* USE_HAL_DRIVER */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __STM32F4xx_H */
/**
* @}
*/
/**
* @}
*/

226
Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h
View file

@ -1,122 +1,104 @@
/** /**
****************************************************************************** ******************************************************************************
* @file system_stm32f4xx.h * @file system_stm32f4xx.h
* @author MCD Application Team * @author MCD Application Team
* @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * Copyright (c) 2017 STMicroelectronics.
* * All rights reserved.
* Redistribution and use in source and binary forms, with or without modification, *
* are permitted provided that the following conditions are met: * This software is licensed under terms that can be found in the LICENSE file
* 1. Redistributions of source code must retain the above copyright notice, * in the root directory of this software component.
* this list of conditions and the following disclaimer. * If no LICENSE file comes with this software, it is provided AS-IS.
* 2. Redistributions in binary form must reproduce the above copyright notice, *
* this list of conditions and the following disclaimer in the documentation ******************************************************************************
* and/or other materials provided with the distribution. */
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software /** @addtogroup CMSIS
* without specific prior written permission. * @{
* */
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE /** @addtogroup stm32f4xx_system
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * @{
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE */
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR /**
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * @brief Define to prevent recursive inclusion
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, */
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE #ifndef __SYSTEM_STM32F4XX_H
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define __SYSTEM_STM32F4XX_H
*
****************************************************************************** #ifdef __cplusplus
*/ extern "C" {
#endif
/** @addtogroup CMSIS
* @{ /** @addtogroup STM32F4xx_System_Includes
*/ * @{
*/
/** @addtogroup stm32f4xx_system
* @{ /**
*/ * @}
*/
/**
* @brief Define to prevent recursive inclusion
*/ /** @addtogroup STM32F4xx_System_Exported_types
#ifndef __SYSTEM_STM32F4XX_H * @{
#define __SYSTEM_STM32F4XX_H */
/* This variable is updated in three ways:
#ifdef __cplusplus 1) by calling CMSIS function SystemCoreClockUpdate()
extern "C" { 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
#endif 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
/** @addtogroup STM32F4xx_System_Includes is no need to call the 2 first functions listed above, since SystemCoreClock
* @{ variable is updated automatically.
*/ */
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* @} extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
*/ extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
/**
/** @addtogroup STM32F4xx_System_Exported_types * @}
* @{ */
*/
/* This variable is updated in three ways: /** @addtogroup STM32F4xx_System_Exported_Constants
1) by calling CMSIS function SystemCoreClockUpdate() * @{
2) by calling HAL API function HAL_RCC_GetSysClockFreq() */
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there /**
is no need to call the 2 first functions listed above, since SystemCoreClock * @}
variable is updated automatically. */
*/
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ /** @addtogroup STM32F4xx_System_Exported_Macros
* @{
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ */
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
/**
/** * @}
* @} */
*/
/** @addtogroup STM32F4xx_System_Exported_Functions
/** @addtogroup STM32F4xx_System_Exported_Constants * @{
* @{ */
*/
extern void SystemInit(void);
/** extern void SystemCoreClockUpdate(void);
* @} /**
*/ * @}
*/
/** @addtogroup STM32F4xx_System_Exported_Macros
* @{ #ifdef __cplusplus
*/ }
#endif
/**
* @} #endif /*__SYSTEM_STM32F4XX_H */
*/
/**
/** @addtogroup STM32F4xx_System_Exported_Functions * @}
* @{ */
*/
/**
extern void SystemInit(void); * @}
extern void SystemCoreClockUpdate(void); */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*__SYSTEM_STM32F4XX_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

6
Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt Normal file
View file

@ -0,0 +1,6 @@
This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the Apache-2.0 license shall apply.
You may obtain a copy of the Apache-2.0 at:
https://opensource.org/licenses/Apache-2.0

411
Drivers/CMSIS/Include/cachel1_armv7.h Normal file
View file

@ -0,0 +1,411 @@
/******************************************************************************
* @file cachel1_armv7.h
* @brief CMSIS Level 1 Cache API for Armv7-M and later
* @version V1.0.1
* @date 19. April 2021
******************************************************************************/
/*
* Copyright (c) 2020-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_CACHEL1_ARMV7_H
#define ARM_CACHEL1_ARMV7_H
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_CacheFunctions Cache Functions
\brief Functions that configure Instruction and Data cache.
@{
*/
/* Cache Size ID Register Macros */
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
#ifndef __SCB_DCACHE_LINE_SIZE
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
#ifndef __SCB_ICACHE_LINE_SIZE
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
/**
\brief Enable I-Cache
\details Turns on I-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
__DSB();
__ISB();
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable I-Cache
\details Turns off I-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate I-Cache
\details Invalidates I-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->ICIALLU = 0UL;
__DSB();
__ISB();
#endif
}
/**
\brief I-Cache Invalidate by address
\details Invalidates I-Cache for the given address.
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
I-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] isize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if ( isize > 0 ) {
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_ICACHE_LINE_SIZE;
op_size -= __SCB_ICACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief Enable D-Cache
\details Turns on D-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable D-Cache
\details Turns off D-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate D-Cache
\details Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean D-Cache
\details Cleans D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean & Invalidate D-Cache
\details Cleans and Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief D-Cache Invalidate by address
\details Invalidates D-Cache for the given address.
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean by address
\details Cleans D-Cache for the given address
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean and Invalidate by address
\details Cleans and invalidates D_Cache for the given address
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
\param[in] addr address (aligned to 32-byte boundary)
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/*@} end of CMSIS_Core_CacheFunctions */
#endif /* ARM_CACHEL1_ARMV7_H */

1753
Drivers/CMSIS/Include/cmsis_armcc.h
View file

File diff suppressed because it is too large Load diff

3372
Drivers/CMSIS/Include/cmsis_armclang.h
View file

File diff suppressed because it is too large Load diff

1928
Drivers/CMSIS/Include/cmsis_armclang_ltm.h Normal file
View file

File diff suppressed because it is too large Load diff

549
Drivers/CMSIS/Include/cmsis_compiler.h
View file

@ -1,266 +1,283 @@
/**************************************************************************//** /**************************************************************************//**
* @file cmsis_compiler.h * @file cmsis_compiler.h
* @brief CMSIS compiler generic header file * @brief CMSIS compiler generic header file
* @version V5.0.4 * @version V5.1.0
* @date 10. January 2018 * @date 09. October 2018
******************************************************************************/ ******************************************************************************/
/* /*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved. * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Licensed under the Apache License, Version 2.0 (the License); you may * Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License. * not use this file except in compliance with the License.
* You may obtain a copy of the License at * You may obtain a copy of the License at
* *
* www.apache.org/licenses/LICENSE-2.0 * www.apache.org/licenses/LICENSE-2.0
* *
* Unless required by applicable law or agreed to in writing, software * Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT * distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#ifndef __CMSIS_COMPILER_H #ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H #define __CMSIS_COMPILER_H
#include <stdint.h> #include <stdint.h>
/* /*
* Arm Compiler 4/5 * Arm Compiler 4/5
*/ */
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
#include "cmsis_armcc.h" #include "cmsis_armcc.h"
/* /*
* Arm Compiler 6 (armclang) * Arm Compiler 6.6 LTM (armclang)
*/ */
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang.h" #include "cmsis_armclang_ltm.h"
/*
/* * Arm Compiler above 6.10.1 (armclang)
* GNU Compiler */
*/ #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#elif defined ( __GNUC__ ) #include "cmsis_armclang.h"
#include "cmsis_gcc.h"
/*
/* * GNU Compiler
* IAR Compiler */
*/ #elif defined ( __GNUC__ )
#elif defined ( __ICCARM__ ) #include "cmsis_gcc.h"
#include <cmsis_iccarm.h>
/*
/* * IAR Compiler
* TI Arm Compiler */
*/ #elif defined ( __ICCARM__ )
#elif defined ( __TI_ARM__ ) #include <cmsis_iccarm.h>
#include <cmsis_ccs.h>
#ifndef __ASM /*
#define __ASM __asm * TI Arm Compiler
#endif */
#ifndef __INLINE #elif defined ( __TI_ARM__ )
#define __INLINE inline #include <cmsis_ccs.h>
#endif
#ifndef __STATIC_INLINE #ifndef __ASM
#define __STATIC_INLINE static inline #define __ASM __asm
#endif #endif
#ifndef __STATIC_FORCEINLINE #ifndef __INLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE #define __INLINE inline
#endif #endif
#ifndef __NO_RETURN #ifndef __STATIC_INLINE
#define __NO_RETURN __attribute__((noreturn)) #define __STATIC_INLINE static inline
#endif #endif
#ifndef __USED #ifndef __STATIC_FORCEINLINE
#define __USED __attribute__((used)) #define __STATIC_FORCEINLINE __STATIC_INLINE
#endif #endif
#ifndef __WEAK #ifndef __NO_RETURN
#define __WEAK __attribute__((weak)) #define __NO_RETURN __attribute__((noreturn))
#endif #endif
#ifndef __PACKED #ifndef __USED
#define __PACKED __attribute__((packed)) #define __USED __attribute__((used))
#endif #endif
#ifndef __PACKED_STRUCT #ifndef __WEAK
#define __PACKED_STRUCT struct __attribute__((packed)) #define __WEAK __attribute__((weak))
#endif #endif
#ifndef __PACKED_UNION #ifndef __PACKED
#define __PACKED_UNION union __attribute__((packed)) #define __PACKED __attribute__((packed))
#endif #endif
#ifndef __UNALIGNED_UINT32 /* deprecated */ #ifndef __PACKED_STRUCT
struct __attribute__((packed)) T_UINT32 { uint32_t v; }; #define __PACKED_STRUCT struct __attribute__((packed))
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) #endif
#endif #ifndef __PACKED_UNION
#ifndef __UNALIGNED_UINT16_WRITE #define __PACKED_UNION union __attribute__((packed))
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; #endif
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) #ifndef __UNALIGNED_UINT32 /* deprecated */
#endif struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#ifndef __UNALIGNED_UINT16_READ #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
__PACKED_STRUCT T_UINT16_READ { uint16_t v; }; #endif
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) #ifndef __UNALIGNED_UINT16_WRITE
#endif __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#ifndef __UNALIGNED_UINT32_WRITE #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; #endif
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) #ifndef __UNALIGNED_UINT16_READ
#endif __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#ifndef __UNALIGNED_UINT32_READ #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
__PACKED_STRUCT T_UINT32_READ { uint32_t v; }; #endif
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) #ifndef __UNALIGNED_UINT32_WRITE
#endif __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#ifndef __ALIGNED #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#define __ALIGNED(x) __attribute__((aligned(x))) #endif
#endif #ifndef __UNALIGNED_UINT32_READ
#ifndef __RESTRICT __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#define __RESTRICT #endif
#endif #ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
/* #ifndef __RESTRICT
* TASKING Compiler #define __RESTRICT __restrict
*/ #endif
#elif defined ( __TASKING__ ) #ifndef __COMPILER_BARRIER
/* #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
* The CMSIS functions have been implemented as intrinsics in the compiler. #define __COMPILER_BARRIER() (void)0
* Please use "carm -?i" to get an up to date list of all intrinsics, #endif
* Including the CMSIS ones.
*/
/*
#ifndef __ASM * TASKING Compiler
#define __ASM __asm */
#endif #elif defined ( __TASKING__ )
#ifndef __INLINE /*
#define __INLINE inline * The CMSIS functions have been implemented as intrinsics in the compiler.
#endif * Please use "carm -?i" to get an up to date list of all intrinsics,
#ifndef __STATIC_INLINE * Including the CMSIS ones.
#define __STATIC_INLINE static inline */
#endif
#ifndef __STATIC_FORCEINLINE #ifndef __ASM
#define __STATIC_FORCEINLINE __STATIC_INLINE #define __ASM __asm
#endif #endif
#ifndef __NO_RETURN #ifndef __INLINE
#define __NO_RETURN __attribute__((noreturn)) #define __INLINE inline
#endif #endif
#ifndef __USED #ifndef __STATIC_INLINE
#define __USED __attribute__((used)) #define __STATIC_INLINE static inline
#endif #endif
#ifndef __WEAK #ifndef __STATIC_FORCEINLINE
#define __WEAK __attribute__((weak)) #define __STATIC_FORCEINLINE __STATIC_INLINE
#endif #endif
#ifndef __PACKED #ifndef __NO_RETURN
#define __PACKED __packed__ #define __NO_RETURN __attribute__((noreturn))
#endif #endif
#ifndef __PACKED_STRUCT #ifndef __USED
#define __PACKED_STRUCT struct __packed__ #define __USED __attribute__((used))
#endif #endif
#ifndef __PACKED_UNION #ifndef __WEAK
#define __PACKED_UNION union __packed__ #define __WEAK __attribute__((weak))
#endif #endif
#ifndef __UNALIGNED_UINT32 /* deprecated */ #ifndef __PACKED
struct __packed__ T_UINT32 { uint32_t v; }; #define __PACKED __packed__
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) #endif
#endif #ifndef __PACKED_STRUCT
#ifndef __UNALIGNED_UINT16_WRITE #define __PACKED_STRUCT struct __packed__
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; #endif
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) #ifndef __PACKED_UNION
#endif #define __PACKED_UNION union __packed__
#ifndef __UNALIGNED_UINT16_READ #endif
__PACKED_STRUCT T_UINT16_READ { uint16_t v; }; #ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) struct __packed__ T_UINT32 { uint32_t v; };
#endif #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#ifndef __UNALIGNED_UINT32_WRITE #endif
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; #ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#endif #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#ifndef __UNALIGNED_UINT32_READ #endif
__PACKED_STRUCT T_UINT32_READ { uint32_t v; }; #ifndef __UNALIGNED_UINT16_READ
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#endif #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#ifndef __ALIGNED #endif
#define __ALIGNED(x) __align(x) #ifndef __UNALIGNED_UINT32_WRITE
#endif __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#ifndef __RESTRICT #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. #endif
#define __RESTRICT #ifndef __UNALIGNED_UINT32_READ
#endif __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
/* #ifndef __ALIGNED
* COSMIC Compiler #define __ALIGNED(x) __align(x)
*/ #endif
#elif defined ( __CSMC__ ) #ifndef __RESTRICT
#include <cmsis_csm.h> #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#ifndef __ASM #endif
#define __ASM _asm #ifndef __COMPILER_BARRIER
#endif #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#ifndef __INLINE #define __COMPILER_BARRIER() (void)0
#define __INLINE inline #endif
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline /*
#endif * COSMIC Compiler
#ifndef __STATIC_FORCEINLINE */
#define __STATIC_FORCEINLINE __STATIC_INLINE #elif defined ( __CSMC__ )
#endif #include <cmsis_csm.h>
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here #ifndef __ASM
#define __NO_RETURN #define __ASM _asm
#endif #endif
#ifndef __USED #ifndef __INLINE
#warning No compiler specific solution for __USED. __USED is ignored. #define __INLINE inline
#define __USED #endif
#endif #ifndef __STATIC_INLINE
#ifndef __WEAK #define __STATIC_INLINE static inline
#define __WEAK __weak #endif
#endif #ifndef __STATIC_FORCEINLINE
#ifndef __PACKED #define __STATIC_FORCEINLINE __STATIC_INLINE
#define __PACKED @packed #endif
#endif #ifndef __NO_RETURN
#ifndef __PACKED_STRUCT // NO RETURN is automatically detected hence no warning here
#define __PACKED_STRUCT @packed struct #define __NO_RETURN
#endif #endif
#ifndef __PACKED_UNION #ifndef __USED
#define __PACKED_UNION @packed union #warning No compiler specific solution for __USED. __USED is ignored.
#endif #define __USED
#ifndef __UNALIGNED_UINT32 /* deprecated */ #endif
@packed struct T_UINT32 { uint32_t v; }; #ifndef __WEAK
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) #define __WEAK __weak
#endif #endif
#ifndef __UNALIGNED_UINT16_WRITE #ifndef __PACKED
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; #define __PACKED @packed
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) #endif
#endif #ifndef __PACKED_STRUCT
#ifndef __UNALIGNED_UINT16_READ #define __PACKED_STRUCT @packed struct
__PACKED_STRUCT T_UINT16_READ { uint16_t v; }; #endif
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) #ifndef __PACKED_UNION
#endif #define __PACKED_UNION @packed union
#ifndef __UNALIGNED_UINT32_WRITE #endif
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; #ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) @packed struct T_UINT32 { uint32_t v; };
#endif #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#ifndef __UNALIGNED_UINT32_READ #endif
__PACKED_STRUCT T_UINT32_READ { uint32_t v; }; #ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#endif #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#ifndef __ALIGNED #endif
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. #ifndef __UNALIGNED_UINT16_READ
#define __ALIGNED(x) __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#endif #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#ifndef __RESTRICT #endif
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. #ifndef __UNALIGNED_UINT32_WRITE
#define __RESTRICT __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#endif #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#else __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#error Unknown compiler. #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif #endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#endif /* __CMSIS_COMPILER_H */ #define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */

4296
Drivers/CMSIS/Include/cmsis_gcc.h
View file

File diff suppressed because it is too large Load diff

1937
Drivers/CMSIS/Include/cmsis_iccarm.h
View file

File diff suppressed because it is too large Load diff

78
Drivers/CMSIS/Include/cmsis_version.h
View file

@ -1,39 +1,39 @@
/**************************************************************************//** /**************************************************************************//**
* @file cmsis_version.h * @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions * @brief CMSIS Core(M) Version definitions
* @version V5.0.2 * @version V5.0.5
* @date 19. April 2017 * @date 02. February 2022
******************************************************************************/ ******************************************************************************/
/* /*
* Copyright (c) 2009-2017 ARM Limited. All rights reserved. * Copyright (c) 2009-2022 ARM Limited. All rights reserved.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Licensed under the Apache License, Version 2.0 (the License); you may * Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License. * not use this file except in compliance with the License.
* You may obtain a copy of the License at * You may obtain a copy of the License at
* *
* www.apache.org/licenses/LICENSE-2.0 * www.apache.org/licenses/LICENSE-2.0
* *
* Unless required by applicable law or agreed to in writing, software * Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT * distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__) #elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef __CMSIS_VERSION_H #ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H #define __CMSIS_VERSION_H
/* CMSIS Version definitions */ /* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif #endif

4228
Drivers/CMSIS/Include/core_armv81mml.h Normal file
View file

File diff suppressed because it is too large Load diff

4140
Drivers/CMSIS/Include/core_armv8mbl.h
View file

File diff suppressed because it is too large Load diff

6136
Drivers/CMSIS/Include/core_armv8mml.h
View file

File diff suppressed because it is too large Load diff

1901
Drivers/CMSIS/Include/core_cm0.h
View file

File diff suppressed because it is too large Load diff

2170
Drivers/CMSIS/Include/core_cm0plus.h
View file

File diff suppressed because it is too large Load diff

1955
Drivers/CMSIS/Include/core_cm1.h
View file

File diff suppressed because it is too large Load diff

4290
Drivers/CMSIS/Include/core_cm23.h
View file

File diff suppressed because it is too large Load diff

3884
Drivers/CMSIS/Include/core_cm3.h
View file

File diff suppressed because it is too large Load diff

6279
Drivers/CMSIS/Include/core_cm33.h
View file

File diff suppressed because it is too large Load diff

3277
Drivers/CMSIS/Include/core_cm35p.h Normal file
View file

File diff suppressed because it is too large Load diff

4258
Drivers/CMSIS/Include/core_cm4.h
View file

File diff suppressed because it is too large Load diff

4817
Drivers/CMSIS/Include/core_cm55.h Normal file
View file

File diff suppressed because it is too large Load diff

5037
Drivers/CMSIS/Include/core_cm7.h
View file

File diff suppressed because it is too large Load diff

4672
Drivers/CMSIS/Include/core_cm85.h Normal file
View file

File diff suppressed because it is too large Load diff

2052
Drivers/CMSIS/Include/core_sc000.h
View file

File diff suppressed because it is too large Load diff

3832
Drivers/CMSIS/Include/core_sc300.h
View file

File diff suppressed because it is too large Load diff

3592
Drivers/CMSIS/Include/core_starmc1.h Normal file
View file

File diff suppressed because it is too large Load diff

545
Drivers/CMSIS/Include/mpu_armv7.h
View file

@ -1,270 +1,275 @@
/****************************************************************************** /******************************************************************************
* @file mpu_armv7.h * @file mpu_armv7.h
* @brief CMSIS MPU API for Armv7-M MPU * @brief CMSIS MPU API for Armv7-M MPU
* @version V5.0.4 * @version V5.1.2
* @date 10. January 2018 * @date 25. May 2020
******************************************************************************/ ******************************************************************************/
/* /*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved. * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Licensed under the Apache License, Version 2.0 (the License); you may * Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License. * not use this file except in compliance with the License.
* You may obtain a copy of the License at * You may obtain a copy of the License at
* *
* www.apache.org/licenses/LICENSE-2.0 * www.apache.org/licenses/LICENSE-2.0
* *
* Unless required by applicable law or agreed to in writing, software * Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT * distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__) #elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef ARM_MPU_ARMV7_H #ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H #define ARM_MPU_ARMV7_H
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes #define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes #define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes #define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes #define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes #define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte #define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes #define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes #define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes #define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes #define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes #define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes #define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes #define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes #define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes #define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte #define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes #define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes #define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes #define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes #define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes #define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes #define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes #define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes #define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes #define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte #define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes #define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes #define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access #define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only #define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only #define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access #define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only #define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access #define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
/** MPU Region Base Address Register Value /** MPU Region Base Address Register Value
* *
* \param Region The region to be configured, number 0 to 15. * \param Region The region to be configured, number 0 to 15.
* \param BaseAddress The base address for the region. * \param BaseAddress The base address for the region.
*/ */
#define ARM_MPU_RBAR(Region, BaseAddress) \ #define ARM_MPU_RBAR(Region, BaseAddress) \
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
((Region) & MPU_RBAR_REGION_Msk) | \ ((Region) & MPU_RBAR_REGION_Msk) | \
(MPU_RBAR_VALID_Msk)) (MPU_RBAR_VALID_Msk))
/** /**
* MPU Memory Access Attributes * MPU Memory Access Attributes
* *
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters. * \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/ */
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
(((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
(((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
/** /**
* MPU Region Attribute and Size Register Value * MPU Region Attribute and Size Register Value
* *
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. * \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
* \param SubRegionDisable Sub-region disable field. * \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K. * \param Size Region size of the region to be configured, for example 4K, 8K.
*/ */
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ #define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
(((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
/** (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
* MPU Region Attribute and Size Register Value (((MPU_RASR_ENABLE_Msk))))
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. /**
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * MPU Region Attribute and Size Register Value
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. *
* \param IsShareable Region is shareable between multiple bus masters. * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param SubRegionDisable Sub-region disable field. * \param IsShareable Region is shareable between multiple bus masters.
* \param Size Region size of the region to be configured, for example 4K, 8K. * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
*/ * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ * \param SubRegionDisable Sub-region disable field.
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) * \param Size Region size of the region to be configured, for example 4K, 8K.
*/
/** #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
* MPU Memory Access Attribute for strongly ordered memory. ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
* - TEX: 000b
* - Shareable /**
* - Non-cacheable * MPU Memory Access Attribute for strongly ordered memory.
* - Non-bufferable * - TEX: 000b
*/ * - Shareable
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) * - Non-cacheable
* - Non-bufferable
/** */
* MPU Memory Access Attribute for device memory. #define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
* - TEX: 000b (if non-shareable) or 010b (if shareable)
* - Shareable or non-shareable /**
* - Non-cacheable * MPU Memory Access Attribute for device memory.
* - Bufferable (if shareable) or non-bufferable (if non-shareable) * - TEX: 000b (if shareable) or 010b (if non-shareable)
* * - Shareable or non-shareable
* \param IsShareable Configures the device memory as shareable or non-shareable. * - Non-cacheable
*/ * - Bufferable (if shareable) or non-bufferable (if non-shareable)
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) *
* \param IsShareable Configures the device memory as shareable or non-shareable.
/** */
* MPU Memory Access Attribute for normal memory. #define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
* - TEX: 1BBb (reflecting outer cacheability rules)
* - Shareable or non-shareable /**
* - Cacheable or non-cacheable (reflecting inner cacheability rules) * MPU Memory Access Attribute for normal memory.
* - Bufferable or non-bufferable (reflecting inner cacheability rules) * - TEX: 1BBb (reflecting outer cacheability rules)
* * - Shareable or non-shareable
* \param OuterCp Configures the outer cache policy. * - Cacheable or non-cacheable (reflecting inner cacheability rules)
* \param InnerCp Configures the inner cache policy. * - Bufferable or non-bufferable (reflecting inner cacheability rules)
* \param IsShareable Configures the memory as shareable or non-shareable. *
*/ * \param OuterCp Configures the outer cache policy.
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U)) * \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
/** */
* MPU Memory Access Attribute non-cacheable policy. #define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
*/
#define ARM_MPU_CACHEP_NOCACHE 0U /**
* MPU Memory Access Attribute non-cacheable policy.
/** */
* MPU Memory Access Attribute write-back, write and read allocate policy. #define ARM_MPU_CACHEP_NOCACHE 0U
*/
#define ARM_MPU_CACHEP_WB_WRA 1U /**
* MPU Memory Access Attribute write-back, write and read allocate policy.
/** */
* MPU Memory Access Attribute write-through, no write allocate policy. #define ARM_MPU_CACHEP_WB_WRA 1U
*/
#define ARM_MPU_CACHEP_WT_NWA 2U /**
* MPU Memory Access Attribute write-through, no write allocate policy.
/** */
* MPU Memory Access Attribute write-back, no write allocate policy. #define ARM_MPU_CACHEP_WT_NWA 2U
*/
#define ARM_MPU_CACHEP_WB_NWA 3U /**
* MPU Memory Access Attribute write-back, no write allocate policy.
*/
/** #define ARM_MPU_CACHEP_WB_NWA 3U
* Struct for a single MPU Region
*/
typedef struct { /**
uint32_t RBAR; //!< The region base address register value (RBAR) * Struct for a single MPU Region
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR */
} ARM_MPU_Region_t; typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR)
/** Enable the MPU. uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
* \param MPU_Control Default access permissions for unconfigured regions. } ARM_MPU_Region_t;
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) /** Enable the MPU.
{ * \param MPU_Control Default access permissions for unconfigured regions.
__DSB(); */
__ISB(); __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; {
#ifdef SCB_SHCSR_MEMFAULTENA_Msk __DMB();
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#endif #ifdef SCB_SHCSR_MEMFAULTENA_Msk
} SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
/** Disable the MPU. __DSB();
*/ __ISB();
__STATIC_INLINE void ARM_MPU_Disable(void) }
{
__DSB(); /** Disable the MPU.
__ISB(); */
#ifdef SCB_SHCSR_MEMFAULTENA_Msk __STATIC_INLINE void ARM_MPU_Disable(void)
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; {
#endif __DMB();
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; #ifdef SCB_SHCSR_MEMFAULTENA_Msk
} SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
/** Clear and disable the given MPU region. MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
* \param rnr Region number to be cleared. __DSB();
*/ __ISB();
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) }
{
MPU->RNR = rnr; /** Clear and disable the given MPU region.
MPU->RASR = 0U; * \param rnr Region number to be cleared.
} */
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
/** Configure an MPU region. {
* \param rbar Value for RBAR register. MPU->RNR = rnr;
* \param rsar Value for RSAR register. MPU->RASR = 0U;
*/ }
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{ /** Configure an MPU region.
MPU->RBAR = rbar; * \param rbar Value for RBAR register.
MPU->RASR = rasr; * \param rasr Value for RASR register.
} */
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
/** Configure the given MPU region. {
* \param rnr Region number to be configured. MPU->RBAR = rbar;
* \param rbar Value for RBAR register. MPU->RASR = rasr;
* \param rsar Value for RSAR register. }
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) /** Configure the given MPU region.
{ * \param rnr Region number to be configured.
MPU->RNR = rnr; * \param rbar Value for RBAR register.
MPU->RBAR = rbar; * \param rasr Value for RASR register.
MPU->RASR = rasr; */
} __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
/** Memcopy with strictly ordered memory access, e.g. for register targets. MPU->RNR = rnr;
* \param dst Destination data is copied to. MPU->RBAR = rbar;
* \param src Source data is copied from. MPU->RASR = rasr;
* \param len Amount of data words to be copied. }
*/
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) /** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load().
{ * \param dst Destination data is copied to.
uint32_t i; * \param src Source data is copied from.
for (i = 0U; i < len; ++i) * \param len Amount of data words to be copied.
{ */
dst[i] = src[i]; __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
} {
} uint32_t i;
for (i = 0U; i < len; ++i)
/** Load the given number of MPU regions from a table. {
* \param table Pointer to the MPU configuration table. dst[i] = src[i];
* \param cnt Amount of regions to be configured. }
*/ }
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{ /** Load the given number of MPU regions from a table.
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; * \param table Pointer to the MPU configuration table.
while (cnt > MPU_TYPE_RALIASES) { * \param cnt Amount of regions to be configured.
orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); */
table += MPU_TYPE_RALIASES; __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
cnt -= MPU_TYPE_RALIASES; {
} const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); while (cnt > MPU_TYPE_RALIASES) {
} ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
table += MPU_TYPE_RALIASES;
#endif cnt -= MPU_TYPE_RALIASES;
}
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
}
#endif

685
Drivers/CMSIS/Include/mpu_armv8.h
View file

@ -1,333 +1,352 @@
/****************************************************************************** /******************************************************************************
* @file mpu_armv8.h * @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M MPU * @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.0.4 * @version V5.1.3
* @date 10. January 2018 * @date 03. February 2021
******************************************************************************/ ******************************************************************************/
/* /*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved. * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Licensed under the Apache License, Version 2.0 (the License); you may * Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License. * not use this file except in compliance with the License.
* You may obtain a copy of the License at * You may obtain a copy of the License at
* *
* www.apache.org/licenses/LICENSE-2.0 * www.apache.org/licenses/LICENSE-2.0
* *
* Unless required by applicable law or agreed to in writing, software * Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT * distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__) #elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef ARM_MPU_ARMV8_H #ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H #define ARM_MPU_ARMV8_H
/** \brief Attribute for device memory (outer only) */ /** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U ) #define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */ /** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) #define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for normal memory (outer and inner) /** \brief Attribute for normal memory (outer and inner)
* \param NT Non-Transient: Set to 1 for non-transient data. * \param NT Non-Transient: Set to 1 for non-transient data.
* \param WB Write-Back: Set to 1 to use write-back update policy. * \param WB Write-Back: Set to 1 to use write-back update policy.
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss. * \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss. * \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/ */
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \ #define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U)) ((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */ /** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U) #define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */ /** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U) #define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */ /** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U) #define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */ /** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U) #define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Memory Attribute /** \brief Memory Attribute
* \param O Outer memory attributes * \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes * \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/ */
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U))) #define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */ /** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U) #define ARM_MPU_SH_NON (0U)
/** \brief Normal memory outer shareable */ /** \brief Normal memory outer shareable */
#define ARM_MPU_SH_OUTER (2U) #define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory inner shareable */ /** \brief Normal memory inner shareable */
#define ARM_MPU_SH_INNER (3U) #define ARM_MPU_SH_INNER (3U)
/** \brief Memory access permissions /** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory. * \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory. * \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/ */
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U)) #define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
/** \brief Region Base Address Register value /** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. * \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region. * \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region. * \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region. * \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region. * \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/ */
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \ #define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
((BASE & MPU_RBAR_BASE_Msk) | \ (((BASE) & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \ (((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \ ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk)) (((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value /** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region. * \param IDX The attribute index to be associated with this memory region.
*/ */
#define ARM_MPU_RLAR(LIMIT, IDX) \ #define ARM_MPU_RLAR(LIMIT, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \ (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk)) (MPU_RLAR_EN_Msk))
/** #if defined(MPU_RLAR_PXN_Pos)
* Struct for a single MPU Region
*/ /** \brief Region Limit Address Register with PXN value
typedef struct { * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
uint32_t RBAR; /*!< Region Base Address Register value */ * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
uint32_t RLAR; /*!< Region Limit Address Register value */ * \param IDX The attribute index to be associated with this memory region.
} ARM_MPU_Region_t; */
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
/** Enable the MPU. (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
* \param MPU_Control Default access permissions for unconfigured regions. (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
*/ (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) (MPU_RLAR_EN_Msk))
{
__DSB(); #endif
__ISB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; /**
#ifdef SCB_SHCSR_MEMFAULTENA_Msk * Struct for a single MPU Region
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; */
#endif typedef struct {
} uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
/** Disable the MPU. } ARM_MPU_Region_t;
*/
__STATIC_INLINE void ARM_MPU_Disable(void) /** Enable the MPU.
{ * \param MPU_Control Default access permissions for unconfigured regions.
__DSB(); */
__ISB(); __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
#ifdef SCB_SHCSR_MEMFAULTENA_Msk {
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; __DMB();
#endif MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; #ifdef SCB_SHCSR_MEMFAULTENA_Msk
} SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
#ifdef MPU_NS __DSB();
/** Enable the Non-secure MPU. __ISB();
* \param MPU_Control Default access permissions for unconfigured regions. }
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control) /** Disable the MPU.
{ */
__DSB(); __STATIC_INLINE void ARM_MPU_Disable(void)
__ISB(); {
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; __DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk #ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif #endif
} MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
/** Disable the Non-secure MPU. __ISB();
*/ }
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{ #ifdef MPU_NS
__DSB(); /** Enable the Non-secure MPU.
__ISB(); * \param MPU_Control Default access permissions for unconfigured regions.
#ifdef SCB_SHCSR_MEMFAULTENA_Msk */
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
#endif {
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk; __DMB();
} MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#endif #ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
/** Set the memory attribute encoding to the given MPU. #endif
* \param mpu Pointer to the MPU to be configured. __DSB();
* \param idx The attribute index to be set [0-7] __ISB();
* \param attr The attribute value to be set. }
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr) /** Disable the Non-secure MPU.
{ */
const uint8_t reg = idx / 4U; __STATIC_INLINE void ARM_MPU_Disable_NS(void)
const uint32_t pos = ((idx % 4U) * 8U); {
const uint32_t mask = 0xFFU << pos; __DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
return; // invalid index #endif
} MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); __ISB();
} }
#endif
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7] /** Set the memory attribute encoding to the given MPU.
* \param attr The attribute value to be set. * \param mpu Pointer to the MPU to be configured.
*/ * \param idx The attribute index to be set [0-7]
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr) * \param attr The attribute value to be set.
{ */
ARM_MPU_SetMemAttrEx(MPU, idx, attr); __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
} {
const uint8_t reg = idx / 4U;
#ifdef MPU_NS const uint32_t pos = ((idx % 4U) * 8U);
/** Set the memory attribute encoding to the Non-secure MPU. const uint32_t mask = 0xFFU << pos;
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set. if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
*/ return; // invalid index
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr) }
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr); mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
} }
#endif
/** Set the memory attribute encoding.
/** Clear and disable the given MPU region of the given MPU. * \param idx The attribute index to be set [0-7]
* \param mpu Pointer to MPU to be used. * \param attr The attribute value to be set.
* \param rnr Region number to be cleared. */
*/ __STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr) {
{ ARM_MPU_SetMemAttrEx(MPU, idx, attr);
mpu->RNR = rnr; }
mpu->RLAR = 0U;
} #ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
/** Clear and disable the given MPU region. * \param idx The attribute index to be set [0-7]
* \param rnr Region number to be cleared. * \param attr The attribute value to be set.
*/ */
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) __STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{ {
ARM_MPU_ClrRegionEx(MPU, rnr); ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
} }
#endif
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region. /** Clear and disable the given MPU region of the given MPU.
* \param rnr Region number to be cleared. * \param mpu Pointer to MPU to be used.
*/ * \param rnr Region number to be cleared.
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) */
{ __STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
ARM_MPU_ClrRegionEx(MPU_NS, rnr); {
} mpu->RNR = rnr;
#endif mpu->RLAR = 0U;
}
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used. /** Clear and disable the given MPU region.
* \param rnr Region number to be configured. * \param rnr Region number to be cleared.
* \param rbar Value for RBAR register. */
* \param rlar Value for RLAR register. __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
*/ {
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) ARM_MPU_ClrRegionEx(MPU, rnr);
{ }
mpu->RNR = rnr;
mpu->RBAR = rbar; #ifdef MPU_NS
mpu->RLAR = rlar; /** Clear and disable the given Non-secure MPU region.
} * \param rnr Region number to be cleared.
*/
/** Configure the given MPU region. __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
* \param rnr Region number to be configured. {
* \param rbar Value for RBAR register. ARM_MPU_ClrRegionEx(MPU_NS, rnr);
* \param rlar Value for RLAR register. }
*/ #endif
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{ /** Configure the given MPU region of the given MPU.
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); * \param mpu Pointer to MPU to be used.
} * \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
#ifdef MPU_NS * \param rlar Value for RLAR register.
/** Configure the given Non-secure MPU region. */
* \param rnr Region number to be configured. __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
* \param rbar Value for RBAR register. {
* \param rlar Value for RLAR register. mpu->RNR = rnr;
*/ mpu->RBAR = rbar;
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) mpu->RLAR = rlar;
{ }
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
} /** Configure the given MPU region.
#endif * \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
/** Memcopy with strictly ordered memory access, e.g. for register targets. * \param rlar Value for RLAR register.
* \param dst Destination data is copied to. */
* \param src Source data is copied from. __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
* \param len Amount of data words to be copied. {
*/ ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) }
{
uint32_t i; #ifdef MPU_NS
for (i = 0U; i < len; ++i) /** Configure the given Non-secure MPU region.
{ * \param rnr Region number to be configured.
dst[i] = src[i]; * \param rbar Value for RBAR register.
} * \param rlar Value for RLAR register.
} */
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
/** Load the given number of MPU regions from a table to the given MPU. {
* \param mpu Pointer to the MPU registers to be used. ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
* \param rnr First region number to be configured. }
* \param table Pointer to the MPU configuration table. #endif
* \param cnt Amount of regions to be configured.
*/ /** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) * \param dst Destination data is copied to.
{ * \param src Source data is copied from.
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; * \param len Amount of data words to be copied.
if (cnt == 1U) { */
mpu->RNR = rnr; __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize); {
} else { uint32_t i;
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); for (i = 0U; i < len; ++i)
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; {
dst[i] = src[i];
mpu->RNR = rnrBase; }
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { }
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize); /** Load the given number of MPU regions from a table to the given MPU.
table += c; * \param mpu Pointer to the MPU registers to be used.
cnt -= c; * \param rnr First region number to be configured.
rnrOffset = 0U; * \param table Pointer to the MPU configuration table.
rnrBase += MPU_TYPE_RALIASES; * \param cnt Amount of regions to be configured.
mpu->RNR = rnrBase; */
} __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
} if (cnt == 1U) {
} mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
/** Load the given number of MPU regions from a table. } else {
* \param rnr First region number to be configured. uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
* \param table Pointer to the MPU configuration table. uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
* \param cnt Amount of regions to be configured.
*/ mpu->RNR = rnrBase;
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
{ uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_LoadEx(MPU, rnr, table, cnt); ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
} table += c;
cnt -= c;
#ifdef MPU_NS rnrOffset = 0U;
/** Load the given number of MPU regions from a table to the Non-secure MPU. rnrBase += MPU_TYPE_RALIASES;
* \param rnr First region number to be configured. mpu->RNR = rnrBase;
* \param table Pointer to the MPU configuration table. }
* \param cnt Amount of regions to be configured.
*/ ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) }
{ }
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
} /** Load the given number of MPU regions from a table.
#endif * \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
#endif * \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif

206
Drivers/CMSIS/Include/pac_armv81.h Normal file
View file

@ -0,0 +1,206 @@
/******************************************************************************
* @file pac_armv81.h
* @brief CMSIS PAC key functions for Armv8.1-M PAC extension
* @version V1.0.0
* @date 23. March 2022
******************************************************************************/
/*
* Copyright (c) 2022 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef PAC_ARMV81_H
#define PAC_ARMV81_H
/* ################### PAC Key functions ########################### */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_PacKeyFunctions PAC Key functions
\brief Functions that access the PAC keys.
@{
*/
#if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1))
/**
\brief read the PAC key used for privileged mode
\details Reads the PAC key stored in the PAC_KEY_P registers.
\param [out] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __get_PAC_KEY_P (uint32_t* pPacKey) {
__ASM volatile (
"mrs r1, pac_key_p_0\n"
"str r1,[%0,#0]\n"
"mrs r1, pac_key_p_1\n"
"str r1,[%0,#4]\n"
"mrs r1, pac_key_p_2\n"
"str r1,[%0,#8]\n"
"mrs r1, pac_key_p_3\n"
"str r1,[%0,#12]\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief write the PAC key used for privileged mode
\details writes the given PAC key to the PAC_KEY_P registers.
\param [in] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __set_PAC_KEY_P (uint32_t* pPacKey) {
__ASM volatile (
"ldr r1,[%0,#0]\n"
"msr pac_key_p_0, r1\n"
"ldr r1,[%0,#4]\n"
"msr pac_key_p_1, r1\n"
"ldr r1,[%0,#8]\n"
"msr pac_key_p_2, r1\n"
"ldr r1,[%0,#12]\n"
"msr pac_key_p_3, r1\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief read the PAC key used for unprivileged mode
\details Reads the PAC key stored in the PAC_KEY_U registers.
\param [out] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __get_PAC_KEY_U (uint32_t* pPacKey) {
__ASM volatile (
"mrs r1, pac_key_u_0\n"
"str r1,[%0,#0]\n"
"mrs r1, pac_key_u_1\n"
"str r1,[%0,#4]\n"
"mrs r1, pac_key_u_2\n"
"str r1,[%0,#8]\n"
"mrs r1, pac_key_u_3\n"
"str r1,[%0,#12]\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief write the PAC key used for unprivileged mode
\details writes the given PAC key to the PAC_KEY_U registers.
\param [in] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __set_PAC_KEY_U (uint32_t* pPacKey) {
__ASM volatile (
"ldr r1,[%0,#0]\n"
"msr pac_key_u_0, r1\n"
"ldr r1,[%0,#4]\n"
"msr pac_key_u_1, r1\n"
"ldr r1,[%0,#8]\n"
"msr pac_key_u_2, r1\n"
"ldr r1,[%0,#12]\n"
"msr pac_key_u_3, r1\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
/**
\brief read the PAC key used for privileged mode (non-secure)
\details Reads the PAC key stored in the non-secure PAC_KEY_P registers when in secure mode.
\param [out] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __TZ_get_PAC_KEY_P_NS (uint32_t* pPacKey) {
__ASM volatile (
"mrs r1, pac_key_p_0_ns\n"
"str r1,[%0,#0]\n"
"mrs r1, pac_key_p_1_ns\n"
"str r1,[%0,#4]\n"
"mrs r1, pac_key_p_2_ns\n"
"str r1,[%0,#8]\n"
"mrs r1, pac_key_p_3_ns\n"
"str r1,[%0,#12]\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief write the PAC key used for privileged mode (non-secure)
\details writes the given PAC key to the non-secure PAC_KEY_P registers when in secure mode.
\param [in] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __TZ_set_PAC_KEY_P_NS (uint32_t* pPacKey) {
__ASM volatile (
"ldr r1,[%0,#0]\n"
"msr pac_key_p_0_ns, r1\n"
"ldr r1,[%0,#4]\n"
"msr pac_key_p_1_ns, r1\n"
"ldr r1,[%0,#8]\n"
"msr pac_key_p_2_ns, r1\n"
"ldr r1,[%0,#12]\n"
"msr pac_key_p_3_ns, r1\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief read the PAC key used for unprivileged mode (non-secure)
\details Reads the PAC key stored in the non-secure PAC_KEY_U registers when in secure mode.
\param [out] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __TZ_get_PAC_KEY_U_NS (uint32_t* pPacKey) {
__ASM volatile (
"mrs r1, pac_key_u_0_ns\n"
"str r1,[%0,#0]\n"
"mrs r1, pac_key_u_1_ns\n"
"str r1,[%0,#4]\n"
"mrs r1, pac_key_u_2_ns\n"
"str r1,[%0,#8]\n"
"mrs r1, pac_key_u_3_ns\n"
"str r1,[%0,#12]\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
/**
\brief write the PAC key used for unprivileged mode (non-secure)
\details writes the given PAC key to the non-secure PAC_KEY_U registers when in secure mode.
\param [in] pPacKey 128bit PAC key
*/
__STATIC_FORCEINLINE void __TZ_set_PAC_KEY_U_NS (uint32_t* pPacKey) {
__ASM volatile (
"ldr r1,[%0,#0]\n"
"msr pac_key_u_0_ns, r1\n"
"ldr r1,[%0,#4]\n"
"msr pac_key_u_1_ns, r1\n"
"ldr r1,[%0,#8]\n"
"msr pac_key_u_2_ns, r1\n"
"ldr r1,[%0,#12]\n"
"msr pac_key_u_3_ns, r1\n"
: : "r" (pPacKey) : "memory", "r1"
);
}
#endif /* (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) */
#endif /* (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) */
/*@} end of CMSIS_Core_PacKeyFunctions */
#endif /* PAC_ARMV81_H */

337
Drivers/CMSIS/Include/pmu_armv8.h Normal file
View file

@ -0,0 +1,337 @@
/******************************************************************************
* @file pmu_armv8.h
* @brief CMSIS PMU API for Armv8.1-M PMU
* @version V1.0.1
* @date 15. April 2020
******************************************************************************/
/*
* Copyright (c) 2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_PMU_ARMV8_H
#define ARM_PMU_ARMV8_H
/**
* \brief PMU Events
* \note See the Armv8.1-M Architecture Reference Manual for full details on these PMU events.
* */
#define ARM_PMU_SW_INCR 0x0000 /*!< Software update to the PMU_SWINC register, architecturally executed and condition code check pass */
#define ARM_PMU_L1I_CACHE_REFILL 0x0001 /*!< L1 I-Cache refill */
#define ARM_PMU_L1D_CACHE_REFILL 0x0003 /*!< L1 D-Cache refill */
#define ARM_PMU_L1D_CACHE 0x0004 /*!< L1 D-Cache access */
#define ARM_PMU_LD_RETIRED 0x0006 /*!< Memory-reading instruction architecturally executed and condition code check pass */
#define ARM_PMU_ST_RETIRED 0x0007 /*!< Memory-writing instruction architecturally executed and condition code check pass */
#define ARM_PMU_INST_RETIRED 0x0008 /*!< Instruction architecturally executed */
#define ARM_PMU_EXC_TAKEN 0x0009 /*!< Exception entry */
#define ARM_PMU_EXC_RETURN 0x000A /*!< Exception return instruction architecturally executed and the condition code check pass */
#define ARM_PMU_PC_WRITE_RETIRED 0x000C /*!< Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass */
#define ARM_PMU_BR_IMMED_RETIRED 0x000D /*!< Immediate branch architecturally executed */
#define ARM_PMU_BR_RETURN_RETIRED 0x000E /*!< Function return instruction architecturally executed and the condition code check pass */
#define ARM_PMU_UNALIGNED_LDST_RETIRED 0x000F /*!< Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass */
#define ARM_PMU_BR_MIS_PRED 0x0010 /*!< Mispredicted or not predicted branch speculatively executed */
#define ARM_PMU_CPU_CYCLES 0x0011 /*!< Cycle */
#define ARM_PMU_BR_PRED 0x0012 /*!< Predictable branch speculatively executed */
#define ARM_PMU_MEM_ACCESS 0x0013 /*!< Data memory access */
#define ARM_PMU_L1I_CACHE 0x0014 /*!< Level 1 instruction cache access */
#define ARM_PMU_L1D_CACHE_WB 0x0015 /*!< Level 1 data cache write-back */
#define ARM_PMU_L2D_CACHE 0x0016 /*!< Level 2 data cache access */
#define ARM_PMU_L2D_CACHE_REFILL 0x0017 /*!< Level 2 data cache refill */
#define ARM_PMU_L2D_CACHE_WB 0x0018 /*!< Level 2 data cache write-back */
#define ARM_PMU_BUS_ACCESS 0x0019 /*!< Bus access */
#define ARM_PMU_MEMORY_ERROR 0x001A /*!< Local memory error */
#define ARM_PMU_INST_SPEC 0x001B /*!< Instruction speculatively executed */
#define ARM_PMU_BUS_CYCLES 0x001D /*!< Bus cycles */
#define ARM_PMU_CHAIN 0x001E /*!< For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE */
#define ARM_PMU_L1D_CACHE_ALLOCATE 0x001F /*!< Level 1 data cache allocation without refill */
#define ARM_PMU_L2D_CACHE_ALLOCATE 0x0020 /*!< Level 2 data cache allocation without refill */
#define ARM_PMU_BR_RETIRED 0x0021 /*!< Branch instruction architecturally executed */
#define ARM_PMU_BR_MIS_PRED_RETIRED 0x0022 /*!< Mispredicted branch instruction architecturally executed */
#define ARM_PMU_STALL_FRONTEND 0x0023 /*!< No operation issued because of the frontend */
#define ARM_PMU_STALL_BACKEND 0x0024 /*!< No operation issued because of the backend */
#define ARM_PMU_L2I_CACHE 0x0027 /*!< Level 2 instruction cache access */
#define ARM_PMU_L2I_CACHE_REFILL 0x0028 /*!< Level 2 instruction cache refill */
#define ARM_PMU_L3D_CACHE_ALLOCATE 0x0029 /*!< Level 3 data cache allocation without refill */
#define ARM_PMU_L3D_CACHE_REFILL 0x002A /*!< Level 3 data cache refill */
#define ARM_PMU_L3D_CACHE 0x002B /*!< Level 3 data cache access */
#define ARM_PMU_L3D_CACHE_WB 0x002C /*!< Level 3 data cache write-back */
#define ARM_PMU_LL_CACHE_RD 0x0036 /*!< Last level data cache read */
#define ARM_PMU_LL_CACHE_MISS_RD 0x0037 /*!< Last level data cache read miss */
#define ARM_PMU_L1D_CACHE_MISS_RD 0x0039 /*!< Level 1 data cache read miss */
#define ARM_PMU_OP_COMPLETE 0x003A /*!< Operation retired */
#define ARM_PMU_OP_SPEC 0x003B /*!< Operation speculatively executed */
#define ARM_PMU_STALL 0x003C /*!< Stall cycle for instruction or operation not sent for execution */
#define ARM_PMU_STALL_OP_BACKEND 0x003D /*!< Stall cycle for instruction or operation not sent for execution due to pipeline backend */
#define ARM_PMU_STALL_OP_FRONTEND 0x003E /*!< Stall cycle for instruction or operation not sent for execution due to pipeline frontend */
#define ARM_PMU_STALL_OP 0x003F /*!< Instruction or operation slots not occupied each cycle */
#define ARM_PMU_L1D_CACHE_RD 0x0040 /*!< Level 1 data cache read */
#define ARM_PMU_LE_RETIRED 0x0100 /*!< Loop end instruction executed */
#define ARM_PMU_LE_SPEC 0x0101 /*!< Loop end instruction speculatively executed */
#define ARM_PMU_BF_RETIRED 0x0104 /*!< Branch future instruction architecturally executed and condition code check pass */
#define ARM_PMU_BF_SPEC 0x0105 /*!< Branch future instruction speculatively executed and condition code check pass */
#define ARM_PMU_LE_CANCEL 0x0108 /*!< Loop end instruction not taken */
#define ARM_PMU_BF_CANCEL 0x0109 /*!< Branch future instruction not taken */
#define ARM_PMU_SE_CALL_S 0x0114 /*!< Call to secure function, resulting in Security state change */
#define ARM_PMU_SE_CALL_NS 0x0115 /*!< Call to non-secure function, resulting in Security state change */
#define ARM_PMU_DWT_CMPMATCH0 0x0118 /*!< DWT comparator 0 match */
#define ARM_PMU_DWT_CMPMATCH1 0x0119 /*!< DWT comparator 1 match */
#define ARM_PMU_DWT_CMPMATCH2 0x011A /*!< DWT comparator 2 match */
#define ARM_PMU_DWT_CMPMATCH3 0x011B /*!< DWT comparator 3 match */
#define ARM_PMU_MVE_INST_RETIRED 0x0200 /*!< MVE instruction architecturally executed */
#define ARM_PMU_MVE_INST_SPEC 0x0201 /*!< MVE instruction speculatively executed */
#define ARM_PMU_MVE_FP_RETIRED 0x0204 /*!< MVE floating-point instruction architecturally executed */
#define ARM_PMU_MVE_FP_SPEC 0x0205 /*!< MVE floating-point instruction speculatively executed */
#define ARM_PMU_MVE_FP_HP_RETIRED 0x0208 /*!< MVE half-precision floating-point instruction architecturally executed */
#define ARM_PMU_MVE_FP_HP_SPEC 0x0209 /*!< MVE half-precision floating-point instruction speculatively executed */
#define ARM_PMU_MVE_FP_SP_RETIRED 0x020C /*!< MVE single-precision floating-point instruction architecturally executed */
#define ARM_PMU_MVE_FP_SP_SPEC 0x020D /*!< MVE single-precision floating-point instruction speculatively executed */
#define ARM_PMU_MVE_FP_MAC_RETIRED 0x0214 /*!< MVE floating-point multiply or multiply-accumulate instruction architecturally executed */
#define ARM_PMU_MVE_FP_MAC_SPEC 0x0215 /*!< MVE floating-point multiply or multiply-accumulate instruction speculatively executed */
#define ARM_PMU_MVE_INT_RETIRED 0x0224 /*!< MVE integer instruction architecturally executed */
#define ARM_PMU_MVE_INT_SPEC 0x0225 /*!< MVE integer instruction speculatively executed */
#define ARM_PMU_MVE_INT_MAC_RETIRED 0x0228 /*!< MVE multiply or multiply-accumulate instruction architecturally executed */
#define ARM_PMU_MVE_INT_MAC_SPEC 0x0229 /*!< MVE multiply or multiply-accumulate instruction speculatively executed */
#define ARM_PMU_MVE_LDST_RETIRED 0x0238 /*!< MVE load or store instruction architecturally executed */
#define ARM_PMU_MVE_LDST_SPEC 0x0239 /*!< MVE load or store instruction speculatively executed */
#define ARM_PMU_MVE_LD_RETIRED 0x023C /*!< MVE load instruction architecturally executed */
#define ARM_PMU_MVE_LD_SPEC 0x023D /*!< MVE load instruction speculatively executed */
#define ARM_PMU_MVE_ST_RETIRED 0x0240 /*!< MVE store instruction architecturally executed */
#define ARM_PMU_MVE_ST_SPEC 0x0241 /*!< MVE store instruction speculatively executed */
#define ARM_PMU_MVE_LDST_CONTIG_RETIRED 0x0244 /*!< MVE contiguous load or store instruction architecturally executed */
#define ARM_PMU_MVE_LDST_CONTIG_SPEC 0x0245 /*!< MVE contiguous load or store instruction speculatively executed */
#define ARM_PMU_MVE_LD_CONTIG_RETIRED 0x0248 /*!< MVE contiguous load instruction architecturally executed */
#define ARM_PMU_MVE_LD_CONTIG_SPEC 0x0249 /*!< MVE contiguous load instruction speculatively executed */
#define ARM_PMU_MVE_ST_CONTIG_RETIRED 0x024C /*!< MVE contiguous store instruction architecturally executed */
#define ARM_PMU_MVE_ST_CONTIG_SPEC 0x024D /*!< MVE contiguous store instruction speculatively executed */
#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED 0x0250 /*!< MVE non-contiguous load or store instruction architecturally executed */
#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC 0x0251 /*!< MVE non-contiguous load or store instruction speculatively executed */
#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED 0x0254 /*!< MVE non-contiguous load instruction architecturally executed */
#define ARM_PMU_MVE_LD_NONCONTIG_SPEC 0x0255 /*!< MVE non-contiguous load instruction speculatively executed */
#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED 0x0258 /*!< MVE non-contiguous store instruction architecturally executed */
#define ARM_PMU_MVE_ST_NONCONTIG_SPEC 0x0259 /*!< MVE non-contiguous store instruction speculatively executed */
#define ARM_PMU_MVE_LDST_MULTI_RETIRED 0x025C /*!< MVE memory instruction targeting multiple registers architecturally executed */
#define ARM_PMU_MVE_LDST_MULTI_SPEC 0x025D /*!< MVE memory instruction targeting multiple registers speculatively executed */
#define ARM_PMU_MVE_LD_MULTI_RETIRED 0x0260 /*!< MVE memory load instruction targeting multiple registers architecturally executed */
#define ARM_PMU_MVE_LD_MULTI_SPEC 0x0261 /*!< MVE memory load instruction targeting multiple registers speculatively executed */
#define ARM_PMU_MVE_ST_MULTI_RETIRED 0x0261 /*!< MVE memory store instruction targeting multiple registers architecturally executed */
#define ARM_PMU_MVE_ST_MULTI_SPEC 0x0265 /*!< MVE memory store instruction targeting multiple registers speculatively executed */
#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED 0x028C /*!< MVE unaligned memory load or store instruction architecturally executed */
#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC 0x028D /*!< MVE unaligned memory load or store instruction speculatively executed */
#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED 0x0290 /*!< MVE unaligned load instruction architecturally executed */
#define ARM_PMU_MVE_LD_UNALIGNED_SPEC 0x0291 /*!< MVE unaligned load instruction speculatively executed */
#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED 0x0294 /*!< MVE unaligned store instruction architecturally executed */
#define ARM_PMU_MVE_ST_UNALIGNED_SPEC 0x0295 /*!< MVE unaligned store instruction speculatively executed */
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED 0x0298 /*!< MVE unaligned noncontiguous load or store instruction architecturally executed */
#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC 0x0299 /*!< MVE unaligned noncontiguous load or store instruction speculatively executed */
#define ARM_PMU_MVE_VREDUCE_RETIRED 0x02A0 /*!< MVE vector reduction instruction architecturally executed */
#define ARM_PMU_MVE_VREDUCE_SPEC 0x02A1 /*!< MVE vector reduction instruction speculatively executed */
#define ARM_PMU_MVE_VREDUCE_FP_RETIRED 0x02A4 /*!< MVE floating-point vector reduction instruction architecturally executed */
#define ARM_PMU_MVE_VREDUCE_FP_SPEC 0x02A5 /*!< MVE floating-point vector reduction instruction speculatively executed */
#define ARM_PMU_MVE_VREDUCE_INT_RETIRED 0x02A8 /*!< MVE integer vector reduction instruction architecturally executed */
#define ARM_PMU_MVE_VREDUCE_INT_SPEC 0x02A9 /*!< MVE integer vector reduction instruction speculatively executed */
#define ARM_PMU_MVE_PRED 0x02B8 /*!< Cycles where one or more predicated beats architecturally executed */
#define ARM_PMU_MVE_STALL 0x02CC /*!< Stall cycles caused by an MVE instruction */
#define ARM_PMU_MVE_STALL_RESOURCE 0x02CD /*!< Stall cycles caused by an MVE instruction because of resource conflicts */
#define ARM_PMU_MVE_STALL_RESOURCE_MEM 0x02CE /*!< Stall cycles caused by an MVE instruction because of memory resource conflicts */
#define ARM_PMU_MVE_STALL_RESOURCE_FP 0x02CF /*!< Stall cycles caused by an MVE instruction because of floating-point resource conflicts */
#define ARM_PMU_MVE_STALL_RESOURCE_INT 0x02D0 /*!< Stall cycles caused by an MVE instruction because of integer resource conflicts */
#define ARM_PMU_MVE_STALL_BREAK 0x02D3 /*!< Stall cycles caused by an MVE chain break */
#define ARM_PMU_MVE_STALL_DEPENDENCY 0x02D4 /*!< Stall cycles caused by MVE register dependency */
#define ARM_PMU_ITCM_ACCESS 0x4007 /*!< Instruction TCM access */
#define ARM_PMU_DTCM_ACCESS 0x4008 /*!< Data TCM access */
#define ARM_PMU_TRCEXTOUT0 0x4010 /*!< ETM external output 0 */
#define ARM_PMU_TRCEXTOUT1 0x4011 /*!< ETM external output 1 */
#define ARM_PMU_TRCEXTOUT2 0x4012 /*!< ETM external output 2 */
#define ARM_PMU_TRCEXTOUT3 0x4013 /*!< ETM external output 3 */
#define ARM_PMU_CTI_TRIGOUT4 0x4018 /*!< Cross-trigger Interface output trigger 4 */
#define ARM_PMU_CTI_TRIGOUT5 0x4019 /*!< Cross-trigger Interface output trigger 5 */
#define ARM_PMU_CTI_TRIGOUT6 0x401A /*!< Cross-trigger Interface output trigger 6 */
#define ARM_PMU_CTI_TRIGOUT7 0x401B /*!< Cross-trigger Interface output trigger 7 */
/** \brief PMU Functions */
__STATIC_INLINE void ARM_PMU_Enable(void);
__STATIC_INLINE void ARM_PMU_Disable(void);
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type);
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void);
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void);
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask);
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask);
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void);
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num);
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void);
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask);
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask);
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask);
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask);
/**
\brief Enable the PMU
*/
__STATIC_INLINE void ARM_PMU_Enable(void)
{
PMU->CTRL |= PMU_CTRL_ENABLE_Msk;
}
/**
\brief Disable the PMU
*/
__STATIC_INLINE void ARM_PMU_Disable(void)
{
PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk;
}
/**
\brief Set event to count for PMU eventer counter
\param [in] num Event counter (0-30) to configure
\param [in] type Event to count
*/
__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type)
{
PMU->EVTYPER[num] = type;
}
/**
\brief Reset cycle counter
*/
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
{
PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk;
}
/**
\brief Reset all event counters
*/
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
{
PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk;
}
/**
\brief Enable counters
\param [in] mask Counters to enable
\note Enables one or more of the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask)
{
PMU->CNTENSET = mask;
}
/**
\brief Disable counters
\param [in] mask Counters to enable
\note Disables one or more of the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask)
{
PMU->CNTENCLR = mask;
}
/**
\brief Read cycle counter
\return Cycle count
*/
__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void)
{
return PMU->CCNTR;
}
/**
\brief Read event counter
\param [in] num Event counter (0-30) to read
\return Event count
*/
__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
{
return PMU_EVCNTR_CNT_Msk & PMU->EVCNTR[num];
}
/**
\brief Read counter overflow status
\return Counter overflow status bits for the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void)
{
return PMU->OVSSET;
}
/**
\brief Clear counter overflow status
\param [in] mask Counter overflow status bits to clear
\note Clears overflow status bits for one or more of the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask)
{
PMU->OVSCLR = mask;
}
/**
\brief Enable counter overflow interrupt request
\param [in] mask Counter overflow interrupt request bits to set
\note Sets overflow interrupt request bits for one or more of the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask)
{
PMU->INTENSET = mask;
}
/**
\brief Disable counter overflow interrupt request
\param [in] mask Counter overflow interrupt request bits to clear
\note Clears overflow interrupt request bits for one or more of the following:
- event counters (0-30)
- cycle counter
*/
__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask)
{
PMU->INTENCLR = mask;
}
/**
\brief Software increment event counter
\param [in] mask Counters to increment
\note Software increment bits for one or more event counters (0-30)
*/
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask)
{
PMU->SWINC = mask;
}
#endif

140
Drivers/CMSIS/Include/tz_context.h
View file

@ -1,70 +1,70 @@
/****************************************************************************** /******************************************************************************
* @file tz_context.h * @file tz_context.h
* @brief Context Management for Armv8-M TrustZone * @brief Context Management for Armv8-M TrustZone
* @version V1.0.1 * @version V1.0.1
* @date 10. January 2018 * @date 10. January 2018
******************************************************************************/ ******************************************************************************/
/* /*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved. * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
* Licensed under the Apache License, Version 2.0 (the License); you may * Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License. * not use this file except in compliance with the License.
* You may obtain a copy of the License at * You may obtain a copy of the License at
* *
* www.apache.org/licenses/LICENSE-2.0 * www.apache.org/licenses/LICENSE-2.0
* *
* Unless required by applicable law or agreed to in writing, software * Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT * distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__) #elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef TZ_CONTEXT_H #ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H #define TZ_CONTEXT_H
#include <stdint.h> #include <stdint.h>
#ifndef TZ_MODULEID_T #ifndef TZ_MODULEID_T
#define TZ_MODULEID_T #define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process. /// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t; typedef uint32_t TZ_ModuleId_t;
#endif #endif
/// \details TZ Memory ID identifies an allocated memory slot. /// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t; typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system /// Initialize secure context memory system
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void); uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone /// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode /// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier /// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error /// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch) /// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch) /// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H #endif // TZ_CONTEXT_H

201
Drivers/CMSIS/LICENSE.txt Normal file
View file

@ -0,0 +1,201 @@
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
"control" means (i) the power, direct or indirect, to cause the
direction or management of such entity, whether by contract or
otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity
exercising permissions granted by this License.
"Source" form shall mean the preferred form for making modifications,
including but not limited to software source code, documentation
source, and configuration files.
"Object" form shall mean any form resulting from mechanical
transformation or translation of a Source form, including but
not limited to compiled object code, generated documentation,
and conversions to other media types.
"Work" shall mean the work of authorship, whether in Source or
Object form, made available under the License, as indicated by a
copyright notice that is included in or attached to the work
(an example is provided in the Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object
form, that is based on (or derived from) the Work and for which the
editorial revisions, annotations, elaborations, or other modifications
represent, as a whole, an original work of authorship. For the purposes
of this License, Derivative Works shall not include works that remain
separable from, or merely link (or bind by name) to the interfaces of,
the Work and Derivative Works thereof.
"Contribution" shall mean any work of authorship, including
the original version of the Work and any modifications or additions
to that Work or Derivative Works thereof, that is intentionally
submitted to Licensor for inclusion in the Work by the copyright owner
or by an individual or Legal Entity authorized to submit on behalf of
the copyright owner. For the purposes of this definition, "submitted"
means any form of electronic, verbal, or written communication sent
to the Licensor or its representatives, including but not limited to
communication on electronic mailing lists, source code control systems,
and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but
excluding communication that is conspicuously marked or otherwise
designated in writing by the copyright owner as "Not a Contribution."
"Contributor" shall mean Licensor and any individual or Legal Entity
on behalf of whom a Contribution has been received by Licensor and
subsequently incorporated within the Work.
2. Grant of Copyright License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
copyright license to reproduce, prepare Derivative Works of,
publicly display, publicly perform, sublicense, and distribute the
Work and such Derivative Works in Source or Object form.
3. Grant of Patent License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except as stated in this section) patent license to make, have made,
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
Contribution(s) alone or by combination of their Contribution(s)
with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
or contributory patent infringement, then any patent licenses
granted to You under this License for that Work shall terminate
as of the date such litigation is filed.
4. Redistribution. You may reproduce and distribute copies of the
Work or Derivative Works thereof in any medium, with or without
modifications, and in Source or Object form, provided that You
meet the following conditions:
(a) You must give any other recipients of the Work or
Derivative Works a copy of this License; and
(b) You must cause any modified files to carry prominent notices
stating that You changed the files; and
(c) You must retain, in the Source form of any Derivative Works
that You distribute, all copyright, patent, trademark, and
attribution notices from the Source form of the Work,
excluding those notices that do not pertain to any part of
the Derivative Works; and
(d) If the Work includes a "NOTICE" text file as part of its
distribution, then any Derivative Works that You distribute must
include a readable copy of the attribution notices contained
within such NOTICE file, excluding those notices that do not
pertain to any part of the Derivative Works, in at least one
of the following places: within a NOTICE text file distributed
as part of the Derivative Works; within the Source form or
documentation, if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
do not modify the License. You may add Your own attribution
notices within Derivative Works that You distribute, alongside
or as an addendum to the NOTICE text from the Work, provided
that such additional attribution notices cannot be construed
as modifying the License.
You may add Your own copyright statement to Your modifications and
may provide additional or different license terms and conditions
for use, reproduction, or distribution of Your modifications, or
for any such Derivative Works as a whole, provided Your use,
reproduction, and distribution of the Work otherwise complies with
the conditions stated in this License.
5. Submission of Contributions. Unless You explicitly state otherwise,
any Contribution intentionally submitted for inclusion in the Work
by You to the Licensor shall be under the terms and conditions of
this License, without any additional terms or conditions.
Notwithstanding the above, nothing herein shall supersede or modify
the terms of any separate license agreement you may have executed
with Licensor regarding such Contributions.
6. Trademarks. This License does not grant permission to use the trade
names, trademarks, service marks, or product names of the Licensor,
except as required for reasonable and customary use in describing the
origin of the Work and reproducing the content of the NOTICE file.
7. Disclaimer of Warranty. Unless required by applicable law or
agreed to in writing, Licensor provides the Work (and each
Contributor provides its Contributions) on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, including, without limitation, any warranties or conditions
of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any
risks associated with Your exercise of permissions under this License.
8. Limitation of Liability. In no event and under no legal theory,
whether in tort (including negligence), contract, or otherwise,
unless required by applicable law (such as deliberate and grossly
negligent acts) or agreed to in writing, shall any Contributor be
liable to You for damages, including any direct, indirect, special,
incidental, or consequential damages of any character arising as a
result of this License or out of the use or inability to use the
Work (including but not limited to damages for loss of goodwill,
work stoppage, computer failure or malfunction, or any and all
other commercial damages or losses), even if such Contributor
has been advised of the possibility of such damages.
9. Accepting Warranty or Additional Liability. While redistributing
the Work or Derivative Works thereof, You may choose to offer,
and charge a fee for, acceptance of support, warranty, indemnity,
or other liability obligations and/or rights consistent with this
License. However, in accepting such obligations, You may act only
on Your own behalf and on Your sole responsibility, not on behalf
of any other Contributor, and only if You agree to indemnify,
defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
APPENDIX: How to apply the Apache License to your work.
To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "{}"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
comment syntax for the file format. We also recommend that a
file or class name and description of purpose be included on the
same "printed page" as the copyright notice for easier
identification within third-party archives.
Copyright {yyyy} {name of copyright owner}
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.

7873
Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
View file

File diff suppressed because it is too large Load diff

583
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h
View file

@ -1,286 +1,297 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal.h * @file stm32f4xx_hal.h
* @author MCD Application Team * @author MCD Application Team
* @brief This file contains all the functions prototypes for the HAL * @brief This file contains all the functions prototypes for the HAL
* module driver. * module driver.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics. * Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause *
* ******************************************************************************
****************************************************************************** */
*/
/* Define to prevent recursive inclusion -------------------------------------*/
/* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_H
#ifndef __STM32F4xx_HAL_H #define __STM32F4xx_HAL_H
#define __STM32F4xx_HAL_H
#ifdef __cplusplus
#ifdef __cplusplus extern "C" {
extern "C" { #endif
#endif
/* Includes ------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal_conf.h"
#include "stm32f4xx_hal_conf.h"
/** @addtogroup STM32F4xx_HAL_Driver
/** @addtogroup STM32F4xx_HAL_Driver * @{
* @{ */
*/
/** @addtogroup HAL
/** @addtogroup HAL * @{
* @{ */
*/
/* Exported types ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup HAL_Exported_Constants HAL Exported Constants
/** @defgroup HAL_Exported_Constants HAL Exported Constants * @{
* @{ */
*/
/** @defgroup HAL_TICK_FREQ Tick Frequency
/** @defgroup HAL_TICK_FREQ Tick Frequency * @{
* @{ */
*/ typedef enum
typedef enum {
{ HAL_TICK_FREQ_10HZ = 100U,
HAL_TICK_FREQ_10HZ = 100U, HAL_TICK_FREQ_100HZ = 10U,
HAL_TICK_FREQ_100HZ = 10U, HAL_TICK_FREQ_1KHZ = 1U,
HAL_TICK_FREQ_1KHZ = 1U, HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ } HAL_TickFreqTypeDef;
} HAL_TickFreqTypeDef; /**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /** @defgroup HAL_Exported_Macros HAL Exported Macros
/** @defgroup HAL_Exported_Macros HAL Exported Macros * @{
* @{ */
*/
/** @brief Freeze/Unfreeze Peripherals in Debug mode
/** @brief Freeze/Unfreeze Peripherals in Debug mode */
*/ #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
#define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
#define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
#define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
#define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
#define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
#define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
#define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
#define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
#define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
#define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
#define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
#define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
#define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
#define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
#define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
#define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
#define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
#define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
#define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
#define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
#define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
#define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
#define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
#define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
/** @brief Main Flash memory mapped at 0x00000000
/** @brief Main Flash memory mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
#define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
/** @brief System Flash memory mapped at 0x00000000
/** @brief System Flash memory mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ }while(0);
}while(0);
/** @brief Embedded SRAM mapped at 0x00000000
/** @brief Embedded SRAM mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
#define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ }while(0);
}while(0);
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
/** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
#define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ }while(0);
}while(0); #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ defined(STM32F469xx) || defined(STM32F479xx)
defined(STM32F469xx) || defined(STM32F479xx) /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
/** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
#define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ }while(0);
}while(0);
/** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
/** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000 */
*/ #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ }while(0);
}while(0); #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx) /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
/** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable * @{
* @{ */
*/ /** @brief SYSCFG Break Lockup lock
/** @brief SYSCFG Break Lockup lock * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
* Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input * @note The selected configuration is locked and can be unlocked by system reset
* @note The selected configuration is locked and can be unlocked by system reset */
*/ #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
#define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \ SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \ }while(0)
}while(0) /**
/** * @}
* @} */
*/
/** @defgroup PVD_Lock_Enable PVD Lock
/** @defgroup PVD_Lock_Enable PVD Lock * @{
* @{ */
*/ /** @brief SYSCFG Break PVD lock
/** @brief SYSCFG Break PVD lock * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
* Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register * @note The selected configuration is locked and can be unlocked by system reset
* @note The selected configuration is locked and can be unlocked by system reset */
*/ #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \ SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \ }while(0)
}while(0) /**
/** * @}
* @} */
*/ #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */ /**
/** * @}
* @} */
*/
/** @defgroup HAL_Private_Macros HAL Private Macros
/** @defgroup HAL_Private_Macros HAL Private Macros * @{
* @{ */
*/ #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ ((FREQ) == HAL_TICK_FREQ_100HZ) || \
((FREQ) == HAL_TICK_FREQ_100HZ) || \ ((FREQ) == HAL_TICK_FREQ_1KHZ))
((FREQ) == HAL_TICK_FREQ_1KHZ)) /**
/** * @}
* @} */
*/
/* Exported variables --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup HAL_Exported_Functions /** @addtogroup HAL_Exported_Variables
* @{ * @{
*/ */
/** @addtogroup HAL_Exported_Functions_Group1 extern __IO uint32_t uwTick;
* @{ extern uint32_t uwTickPrio;
*/ extern HAL_TickFreqTypeDef uwTickFreq;
/* Initialization and Configuration functions ******************************/ /**
HAL_StatusTypeDef HAL_Init(void); * @}
HAL_StatusTypeDef HAL_DeInit(void); */
void HAL_MspInit(void);
void HAL_MspDeInit(void); /* Exported functions --------------------------------------------------------*/
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); /** @addtogroup HAL_Exported_Functions
/** * @{
* @} */
*/ /** @addtogroup HAL_Exported_Functions_Group1
* @{
/** @addtogroup HAL_Exported_Functions_Group2 */
* @{ /* Initialization and Configuration functions ******************************/
*/ HAL_StatusTypeDef HAL_Init(void);
/* Peripheral Control functions ************************************************/ HAL_StatusTypeDef HAL_DeInit(void);
void HAL_IncTick(void); void HAL_MspInit(void);
void HAL_Delay(uint32_t Delay); void HAL_MspDeInit(void);
uint32_t HAL_GetTick(void); HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
uint32_t HAL_GetTickPrio(void); /**
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); * @}
HAL_TickFreqTypeDef HAL_GetTickFreq(void); */
void HAL_SuspendTick(void);
void HAL_ResumeTick(void); /** @addtogroup HAL_Exported_Functions_Group2
uint32_t HAL_GetHalVersion(void); * @{
uint32_t HAL_GetREVID(void); */
uint32_t HAL_GetDEVID(void); /* Peripheral Control functions ************************************************/
void HAL_DBGMCU_EnableDBGSleepMode(void); void HAL_IncTick(void);
void HAL_DBGMCU_DisableDBGSleepMode(void); void HAL_Delay(uint32_t Delay);
void HAL_DBGMCU_EnableDBGStopMode(void); uint32_t HAL_GetTick(void);
void HAL_DBGMCU_DisableDBGStopMode(void); uint32_t HAL_GetTickPrio(void);
void HAL_DBGMCU_EnableDBGStandbyMode(void); HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
void HAL_DBGMCU_DisableDBGStandbyMode(void); HAL_TickFreqTypeDef HAL_GetTickFreq(void);
void HAL_EnableCompensationCell(void); void HAL_SuspendTick(void);
void HAL_DisableCompensationCell(void); void HAL_ResumeTick(void);
uint32_t HAL_GetUIDw0(void); uint32_t HAL_GetHalVersion(void);
uint32_t HAL_GetUIDw1(void); uint32_t HAL_GetREVID(void);
uint32_t HAL_GetUIDw2(void); uint32_t HAL_GetDEVID(void);
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\ void HAL_DBGMCU_EnableDBGSleepMode(void);
defined(STM32F469xx) || defined(STM32F479xx) void HAL_DBGMCU_DisableDBGSleepMode(void);
void HAL_EnableMemorySwappingBank(void); void HAL_DBGMCU_EnableDBGStopMode(void);
void HAL_DisableMemorySwappingBank(void); void HAL_DBGMCU_DisableDBGStopMode(void);
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ void HAL_DBGMCU_EnableDBGStandbyMode(void);
/** void HAL_DBGMCU_DisableDBGStandbyMode(void);
* @} void HAL_EnableCompensationCell(void);
*/ void HAL_DisableCompensationCell(void);
uint32_t HAL_GetUIDw0(void);
/** uint32_t HAL_GetUIDw1(void);
* @} uint32_t HAL_GetUIDw2(void);
*/ #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
/* Private types -------------------------------------------------------------*/ defined(STM32F469xx) || defined(STM32F479xx)
/* Private variables ---------------------------------------------------------*/ void HAL_EnableMemorySwappingBank(void);
/** @defgroup HAL_Private_Variables HAL Private Variables void HAL_DisableMemorySwappingBank(void);
* @{ #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
*/ /**
/** * @}
* @} */
*/
/* Private constants ---------------------------------------------------------*/ /**
/** @defgroup HAL_Private_Constants HAL Private Constants * @}
* @{ */
*/ /* Private types -------------------------------------------------------------*/
/** /* Private variables ---------------------------------------------------------*/
* @} /** @defgroup HAL_Private_Variables HAL Private Variables
*/ * @{
/* Private macros ------------------------------------------------------------*/ */
/* Private functions ---------------------------------------------------------*/ /**
/** * @}
* @} */
*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup HAL_Private_Constants HAL Private Constants
/** * @{
* @} */
*/ /**
* @}
#ifdef __cplusplus */
} /* Private macros ------------------------------------------------------------*/
#endif /* Private functions ---------------------------------------------------------*/
/**
#endif /* __STM32F4xx_HAL_H */ * @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_HAL_H */

820
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h
View file

@ -1,410 +1,410 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal_cortex.h * @file stm32f4xx_hal_cortex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CORTEX HAL module. * @brief Header file of CORTEX HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics. * Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file in
* the "License"; You may not use this file except in compliance with the * the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause ******************************************************************************
* */
******************************************************************************
*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CORTEX_H
/* Define to prevent recursive inclusion -------------------------------------*/ #define __STM32F4xx_HAL_CORTEX_H
#ifndef __STM32F4xx_HAL_CORTEX_H
#define __STM32F4xx_HAL_CORTEX_H #ifdef __cplusplus
extern "C" {
#ifdef __cplusplus #endif
extern "C" {
#endif /* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal_def.h"
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal_def.h" /** @addtogroup STM32F4xx_HAL_Driver
* @{
/** @addtogroup STM32F4xx_HAL_Driver */
* @{
*/ /** @addtogroup CORTEX
* @{
/** @addtogroup CORTEX */
* @{ /* Exported types ------------------------------------------------------------*/
*/ /** @defgroup CORTEX_Exported_Types Cortex Exported Types
/* Exported types ------------------------------------------------------------*/ * @{
/** @defgroup CORTEX_Exported_Types Cortex Exported Types */
* @{
*/ #if (__MPU_PRESENT == 1U)
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
#if (__MPU_PRESENT == 1U) * @brief MPU Region initialization structure
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition * @{
* @brief MPU Region initialization structure */
* @{ typedef struct
*/ {
typedef struct uint8_t Enable; /*!< Specifies the status of the region.
{ This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
uint8_t Enable; /*!< Specifies the status of the region. uint8_t Number; /*!< Specifies the number of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ This parameter can be a value of @ref CORTEX_MPU_Region_Number */
uint8_t Number; /*!< Specifies the number of the region to protect. uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
This parameter can be a value of @ref CORTEX_MPU_Region_Number */ uint8_t Size; /*!< Specifies the size of the region to protect.
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ This parameter can be a value of @ref CORTEX_MPU_Region_Size */
uint8_t Size; /*!< Specifies the size of the region to protect. uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
This parameter can be a value of @ref CORTEX_MPU_Region_Size */ This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. uint8_t TypeExtField; /*!< Specifies the TEX field level.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
uint8_t TypeExtField; /*!< Specifies the TEX field level. uint8_t AccessPermission; /*!< Specifies the region access permission type.
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
uint8_t AccessPermission; /*!< Specifies the region access permission type. uint8_t DisableExec; /*!< Specifies the instruction access status.
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
uint8_t DisableExec; /*!< Specifies the instruction access status. uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. }MPU_Region_InitTypeDef;
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ /**
}MPU_Region_InitTypeDef; * @}
/** */
* @} #endif /* __MPU_PRESENT */
*/
#endif /* __MPU_PRESENT */ /**
* @}
/** */
* @}
*/ /* Exported constants --------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
* @{
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants */
* @{
*/ /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
* @{
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group */
* @{ #define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
*/ 4 bits for subpriority */
#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority #define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
4 bits for subpriority */ 3 bits for subpriority */
#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority #define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
3 bits for subpriority */ 2 bits for subpriority */
#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority #define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
2 bits for subpriority */ 1 bits for subpriority */
#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority #define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority
1 bits for subpriority */ 0 bits for subpriority */
#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority /**
0 bits for subpriority */ * @}
/** */
* @}
*/ /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
* @{
/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source */
* @{ #define SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U
*/ #define SYSTICK_CLKSOURCE_HCLK 0x00000004U
#define SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U
#define SYSTICK_CLKSOURCE_HCLK 0x00000004U /**
* @}
/** */
* @}
*/ #if (__MPU_PRESENT == 1)
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
#if (__MPU_PRESENT == 1) * @{
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control */
* @{ #define MPU_HFNMI_PRIVDEF_NONE 0x00000000U
*/ #define MPU_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk
#define MPU_HFNMI_PRIVDEF_NONE 0x00000000U #define MPU_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk
#define MPU_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk #define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
#define MPU_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk
#define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /**
* @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
* @{
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable */
* @{ #define MPU_REGION_ENABLE ((uint8_t)0x01)
*/ #define MPU_REGION_DISABLE ((uint8_t)0x00)
#define MPU_REGION_ENABLE ((uint8_t)0x01) /**
#define MPU_REGION_DISABLE ((uint8_t)0x00) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
* @{
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access */
* @{ #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
*/ #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) /**
#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
* @{
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable */
* @{ #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
*/ #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) /**
#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
* @{
/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable */
* @{ #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
*/ #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) /**
#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
* @{
/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable */
* @{ #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
*/ #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) /**
#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
* @{
/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels */
* @{ #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
*/ #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
#define MPU_TEX_LEVEL0 ((uint8_t)0x00) #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
#define MPU_TEX_LEVEL1 ((uint8_t)0x01) /**
#define MPU_TEX_LEVEL2 ((uint8_t)0x02) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
* @{
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size */
* @{ #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
*/ #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
#define MPU_REGION_SIZE_32B ((uint8_t)0x04) #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
#define MPU_REGION_SIZE_64B ((uint8_t)0x05) #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
#define MPU_REGION_SIZE_128B ((uint8_t)0x06) #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
#define MPU_REGION_SIZE_256B ((uint8_t)0x07) #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
#define MPU_REGION_SIZE_512B ((uint8_t)0x08) #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09) #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
#define MPU_REGION_SIZE_128KB ((uint8_t)0x10) #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
#define MPU_REGION_SIZE_256KB ((uint8_t)0x11) #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
#define MPU_REGION_SIZE_512KB ((uint8_t)0x12) #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
#define MPU_REGION_SIZE_1MB ((uint8_t)0x13) #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
#define MPU_REGION_SIZE_2MB ((uint8_t)0x14) #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
#define MPU_REGION_SIZE_4MB ((uint8_t)0x15) #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
#define MPU_REGION_SIZE_8MB ((uint8_t)0x16) #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
#define MPU_REGION_SIZE_16MB ((uint8_t)0x17) #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
#define MPU_REGION_SIZE_32MB ((uint8_t)0x18) #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
#define MPU_REGION_SIZE_64MB ((uint8_t)0x19) #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) /**
#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
* @{
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes */
* @{ #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
*/ #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00) #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
#define MPU_REGION_PRIV_RW ((uint8_t)0x01) #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
#define MPU_REGION_PRIV_RO ((uint8_t)0x05) /**
#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) * @}
/** */
* @}
*/ /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
* @{
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number */
* @{ #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
*/ #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
#define MPU_REGION_NUMBER0 ((uint8_t)0x00) #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
#define MPU_REGION_NUMBER1 ((uint8_t)0x01) #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
#define MPU_REGION_NUMBER2 ((uint8_t)0x02) #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
#define MPU_REGION_NUMBER3 ((uint8_t)0x03) #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
#define MPU_REGION_NUMBER4 ((uint8_t)0x04) #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
#define MPU_REGION_NUMBER5 ((uint8_t)0x05) #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
#define MPU_REGION_NUMBER6 ((uint8_t)0x06) /**
#define MPU_REGION_NUMBER7 ((uint8_t)0x07) * @}
/** */
* @} #endif /* __MPU_PRESENT */
*/
#endif /* __MPU_PRESENT */ /**
* @}
/** */
* @}
*/
/* Exported Macros -----------------------------------------------------------*/
/* Exported Macros -----------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup CORTEX_Exported_Functions
/* Exported functions --------------------------------------------------------*/ * @{
/** @addtogroup CORTEX_Exported_Functions */
* @{
*/ /** @addtogroup CORTEX_Exported_Functions_Group1
* @{
/** @addtogroup CORTEX_Exported_Functions_Group1 */
* @{ /* Initialization and de-initialization functions *****************************/
*/ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
/* Initialization and de-initialization functions *****************************/ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); void HAL_NVIC_SystemReset(void);
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
void HAL_NVIC_SystemReset(void); /**
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); * @}
/** */
* @}
*/ /** @addtogroup CORTEX_Exported_Functions_Group2
* @{
/** @addtogroup CORTEX_Exported_Functions_Group2 */
* @{ /* Peripheral Control functions ***********************************************/
*/ uint32_t HAL_NVIC_GetPriorityGrouping(void);
/* Peripheral Control functions ***********************************************/ void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
uint32_t HAL_NVIC_GetPriorityGrouping(void); uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); void HAL_SYSTICK_IRQHandler(void);
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); void HAL_SYSTICK_Callback(void);
void HAL_SYSTICK_IRQHandler(void);
void HAL_SYSTICK_Callback(void); #if (__MPU_PRESENT == 1U)
void HAL_MPU_Enable(uint32_t MPU_Control);
#if (__MPU_PRESENT == 1U) void HAL_MPU_Disable(void);
void HAL_MPU_Enable(uint32_t MPU_Control); void HAL_MPU_EnableRegion(uint32_t RegionNumber);
void HAL_MPU_Disable(void); void HAL_MPU_DisableRegion(uint32_t RegionNumber);
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** void HAL_CORTEX_ClearEvent(void);
* @} /**
*/ * @}
*/
/**
* @} /**
*/ * @}
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros /* Private macros ------------------------------------------------------------*/
* @{ /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
*/ * @{
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ */
((GROUP) == NVIC_PRIORITYGROUP_1) || \ #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
((GROUP) == NVIC_PRIORITYGROUP_2) || \ ((GROUP) == NVIC_PRIORITYGROUP_1) || \
((GROUP) == NVIC_PRIORITYGROUP_3) || \ ((GROUP) == NVIC_PRIORITYGROUP_2) || \
((GROUP) == NVIC_PRIORITYGROUP_4)) ((GROUP) == NVIC_PRIORITYGROUP_3) || \
((GROUP) == NVIC_PRIORITYGROUP_4))
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U)
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U)
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
#if (__MPU_PRESENT == 1U)
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ #if (__MPU_PRESENT == 1U)
((STATE) == MPU_REGION_DISABLE)) #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
((STATE) == MPU_REGION_DISABLE))
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
((STATE) == MPU_ACCESS_NOT_SHAREABLE)) #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
((STATE) == MPU_ACCESS_NOT_SHAREABLE))
#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
((STATE) == MPU_ACCESS_NOT_CACHEABLE)) #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
((STATE) == MPU_ACCESS_NOT_CACHEABLE))
#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
((TYPE) == MPU_TEX_LEVEL1) || \ #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
((TYPE) == MPU_TEX_LEVEL2)) ((TYPE) == MPU_TEX_LEVEL1) || \
((TYPE) == MPU_TEX_LEVEL2))
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RW) || \ #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RW_URO) || \ ((TYPE) == MPU_REGION_PRIV_RW) || \
((TYPE) == MPU_REGION_FULL_ACCESS) || \ ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
((TYPE) == MPU_REGION_PRIV_RO) || \ ((TYPE) == MPU_REGION_FULL_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RO_URO)) ((TYPE) == MPU_REGION_PRIV_RO) || \
((TYPE) == MPU_REGION_PRIV_RO_URO))
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
((NUMBER) == MPU_REGION_NUMBER1) || \ #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
((NUMBER) == MPU_REGION_NUMBER2) || \ ((NUMBER) == MPU_REGION_NUMBER1) || \
((NUMBER) == MPU_REGION_NUMBER3) || \ ((NUMBER) == MPU_REGION_NUMBER2) || \
((NUMBER) == MPU_REGION_NUMBER4) || \ ((NUMBER) == MPU_REGION_NUMBER3) || \
((NUMBER) == MPU_REGION_NUMBER5) || \ ((NUMBER) == MPU_REGION_NUMBER4) || \
((NUMBER) == MPU_REGION_NUMBER6) || \ ((NUMBER) == MPU_REGION_NUMBER5) || \
((NUMBER) == MPU_REGION_NUMBER7)) ((NUMBER) == MPU_REGION_NUMBER6) || \
((NUMBER) == MPU_REGION_NUMBER7))
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
((SIZE) == MPU_REGION_SIZE_64B) || \ #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
((SIZE) == MPU_REGION_SIZE_128B) || \ ((SIZE) == MPU_REGION_SIZE_64B) || \
((SIZE) == MPU_REGION_SIZE_256B) || \ ((SIZE) == MPU_REGION_SIZE_128B) || \
((SIZE) == MPU_REGION_SIZE_512B) || \ ((SIZE) == MPU_REGION_SIZE_256B) || \
((SIZE) == MPU_REGION_SIZE_1KB) || \ ((SIZE) == MPU_REGION_SIZE_512B) || \
((SIZE) == MPU_REGION_SIZE_2KB) || \ ((SIZE) == MPU_REGION_SIZE_1KB) || \
((SIZE) == MPU_REGION_SIZE_4KB) || \ ((SIZE) == MPU_REGION_SIZE_2KB) || \
((SIZE) == MPU_REGION_SIZE_8KB) || \ ((SIZE) == MPU_REGION_SIZE_4KB) || \
((SIZE) == MPU_REGION_SIZE_16KB) || \ ((SIZE) == MPU_REGION_SIZE_8KB) || \
((SIZE) == MPU_REGION_SIZE_32KB) || \ ((SIZE) == MPU_REGION_SIZE_16KB) || \
((SIZE) == MPU_REGION_SIZE_64KB) || \ ((SIZE) == MPU_REGION_SIZE_32KB) || \
((SIZE) == MPU_REGION_SIZE_128KB) || \ ((SIZE) == MPU_REGION_SIZE_64KB) || \
((SIZE) == MPU_REGION_SIZE_256KB) || \ ((SIZE) == MPU_REGION_SIZE_128KB) || \
((SIZE) == MPU_REGION_SIZE_512KB) || \ ((SIZE) == MPU_REGION_SIZE_256KB) || \
((SIZE) == MPU_REGION_SIZE_1MB) || \ ((SIZE) == MPU_REGION_SIZE_512KB) || \
((SIZE) == MPU_REGION_SIZE_2MB) || \ ((SIZE) == MPU_REGION_SIZE_1MB) || \
((SIZE) == MPU_REGION_SIZE_4MB) || \ ((SIZE) == MPU_REGION_SIZE_2MB) || \
((SIZE) == MPU_REGION_SIZE_8MB) || \ ((SIZE) == MPU_REGION_SIZE_4MB) || \
((SIZE) == MPU_REGION_SIZE_16MB) || \ ((SIZE) == MPU_REGION_SIZE_8MB) || \
((SIZE) == MPU_REGION_SIZE_32MB) || \ ((SIZE) == MPU_REGION_SIZE_16MB) || \
((SIZE) == MPU_REGION_SIZE_64MB) || \ ((SIZE) == MPU_REGION_SIZE_32MB) || \
((SIZE) == MPU_REGION_SIZE_128MB) || \ ((SIZE) == MPU_REGION_SIZE_64MB) || \
((SIZE) == MPU_REGION_SIZE_256MB) || \ ((SIZE) == MPU_REGION_SIZE_128MB) || \
((SIZE) == MPU_REGION_SIZE_512MB) || \ ((SIZE) == MPU_REGION_SIZE_256MB) || \
((SIZE) == MPU_REGION_SIZE_1GB) || \ ((SIZE) == MPU_REGION_SIZE_512MB) || \
((SIZE) == MPU_REGION_SIZE_2GB) || \ ((SIZE) == MPU_REGION_SIZE_1GB) || \
((SIZE) == MPU_REGION_SIZE_4GB)) ((SIZE) == MPU_REGION_SIZE_2GB) || \
((SIZE) == MPU_REGION_SIZE_4GB))
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
#endif /* __MPU_PRESENT */ #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
#endif /* __MPU_PRESENT */
/**
* @} /**
*/ * @}
*/
/* Private functions ---------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @} /**
*/ * @}
*/
/**
* @} /**
*/ * @}
*/
#ifdef __cplusplus
} #ifdef __cplusplus
#endif }
#endif
#endif /* __STM32F4xx_HAL_CORTEX_H */
#endif /* __STM32F4xx_HAL_CORTEX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

409
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h
View file

@ -1,197 +1,212 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal_def.h * @file stm32f4xx_hal_def.h
* @author MCD Application Team * @author MCD Application Team
* @brief This file contains HAL common defines, enumeration, macros and * @brief This file contains HAL common defines, enumeration, macros and
* structures definitions. * structures definitions.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics. * Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file
* the "License"; You may not use this file except in compliance with the * in the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause *
* ******************************************************************************
****************************************************************************** */
*/
/* Define to prevent recursive inclusion -------------------------------------*/
/* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_DEF
#ifndef __STM32F4xx_HAL_DEF #define __STM32F4xx_HAL_DEF
#define __STM32F4xx_HAL_DEF
#ifdef __cplusplus
#ifdef __cplusplus extern "C" {
extern "C" { #endif
#endif
/* Includes ------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/ #include "stm32f4xx.h"
#include "stm32f4xx.h" #include "Legacy/stm32_hal_legacy.h"
#include "Legacy/stm32_hal_legacy.h" #include <stddef.h>
#include <stddef.h>
/* Exported types ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/**
/** * @brief HAL Status structures definition
* @brief HAL Status structures definition */
*/ typedef enum
typedef enum {
{ HAL_OK = 0x00U,
HAL_OK = 0x00U, HAL_ERROR = 0x01U,
HAL_ERROR = 0x01U, HAL_BUSY = 0x02U,
HAL_BUSY = 0x02U, HAL_TIMEOUT = 0x03U
HAL_TIMEOUT = 0x03U } HAL_StatusTypeDef;
} HAL_StatusTypeDef;
/**
/** * @brief HAL Lock structures definition
* @brief HAL Lock structures definition */
*/ typedef enum
typedef enum {
{ HAL_UNLOCKED = 0x00U,
HAL_UNLOCKED = 0x00U, HAL_LOCKED = 0x01U
HAL_LOCKED = 0x01U } HAL_LockTypeDef;
} HAL_LockTypeDef;
/* Exported macro ------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#if !defined(UNUSED)
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
#endif /* UNUSED */
#define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
do{ \ #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
(__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ do{ \
(__DMA_HANDLE__).Parent = (__HANDLE__); \ (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
} while(0U) (__DMA_HANDLE__).Parent = (__HANDLE__); \
} while(0U)
/** @brief Reset the Handle's State field.
* @param __HANDLE__ specifies the Peripheral Handle. /** @brief Reset the Handle's State field.
* @note This macro can be used for the following purpose: * @param __HANDLE__ specifies the Peripheral Handle.
* - When the Handle is declared as local variable; before passing it as parameter * @note This macro can be used for the following purpose:
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro * - When the Handle is declared as local variable; before passing it as parameter
* to set to 0 the Handle's "State" field. * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
* Otherwise, "State" field may have any random value and the first time the function * to set to 0 the Handle's "State" field.
* HAL_PPP_Init() is called, the low level hardware initialization will be missed * Otherwise, "State" field may have any random value and the first time the function
* (i.e. HAL_PPP_MspInit() will not be executed). * HAL_PPP_Init() is called, the low level hardware initialization will be missed
* - When there is a need to reconfigure the low level hardware: instead of calling * (i.e. HAL_PPP_MspInit() will not be executed).
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). * - When there is a need to reconfigure the low level hardware: instead of calling
* In this later function, when the Handle's "State" field is set to 0, it will execute the function * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
* HAL_PPP_MspInit() which will reconfigure the low level hardware. * In this later function, when the Handle's "State" field is set to 0, it will execute the function
* @retval None * HAL_PPP_MspInit() which will reconfigure the low level hardware.
*/ * @retval None
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) */
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
#if (USE_RTOS == 1U)
/* Reserved for future use */ #if (USE_RTOS == 1U)
#error "USE_RTOS should be 0 in the current HAL release" /* Reserved for future use */
#else #error "USE_RTOS should be 0 in the current HAL release"
#define __HAL_LOCK(__HANDLE__) \ #else
do{ \ #define __HAL_LOCK(__HANDLE__) \
if((__HANDLE__)->Lock == HAL_LOCKED) \ do{ \
{ \ if((__HANDLE__)->Lock == HAL_LOCKED) \
return HAL_BUSY; \ { \
} \ return HAL_BUSY; \
else \ } \
{ \ else \
(__HANDLE__)->Lock = HAL_LOCKED; \ { \
} \ (__HANDLE__)->Lock = HAL_LOCKED; \
}while (0U) } \
}while (0U)
#define __HAL_UNLOCK(__HANDLE__) \
do{ \ #define __HAL_UNLOCK(__HANDLE__) \
(__HANDLE__)->Lock = HAL_UNLOCKED; \ do{ \
}while (0U) (__HANDLE__)->Lock = HAL_UNLOCKED; \
#endif /* USE_RTOS */ }while (0U)
#endif /* USE_RTOS */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __weak #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
#define __weak __attribute__((weak)) #ifndef __weak
#endif /* __weak */ #define __weak __attribute__((weak))
#ifndef __packed #endif
#define __packed __attribute__((__packed__)) #ifndef __packed
#endif /* __packed */ #define __packed __attribute__((packed))
#endif /* __GNUC__ */ #endif
#elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __weak
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ #define __weak __attribute__((weak))
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ #endif /* __weak */
#ifndef __ALIGN_END #ifndef __packed
#define __ALIGN_END __attribute__ ((aligned (4))) #define __packed __attribute__((__packed__))
#endif /* __ALIGN_END */ #endif /* __packed */
#ifndef __ALIGN_BEGIN #endif /* __GNUC__ */
#define __ALIGN_BEGIN
#endif /* __ALIGN_BEGIN */
#else /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
#ifndef __ALIGN_END #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
#define __ALIGN_END #ifndef __ALIGN_BEGIN
#endif /* __ALIGN_END */ #define __ALIGN_BEGIN
#ifndef __ALIGN_BEGIN #endif
#if defined (__CC_ARM) /* ARM Compiler */ #ifndef __ALIGN_END
#define __ALIGN_BEGIN __align(4) #define __ALIGN_END __attribute__ ((aligned (4)))
#elif defined (__ICCARM__) /* IAR Compiler */ #endif
#define __ALIGN_BEGIN #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#endif /* __CC_ARM */ #ifndef __ALIGN_END
#endif /* __ALIGN_BEGIN */ #define __ALIGN_END __attribute__ ((aligned (4)))
#endif /* __GNUC__ */ #endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN
/** #endif /* __ALIGN_BEGIN */
* @brief __RAM_FUNC definition #else
*/ #ifndef __ALIGN_END
#if defined ( __CC_ARM ) #define __ALIGN_END
/* ARM Compiler #endif /* __ALIGN_END */
------------ #ifndef __ALIGN_BEGIN
RAM functions are defined using the toolchain options. #if defined (__CC_ARM) /* ARM Compiler V5*/
Functions that are executed in RAM should reside in a separate source module. #define __ALIGN_BEGIN __align(4)
Using the 'Options for File' dialog you can simply change the 'Code / Const' #elif defined (__ICCARM__) /* IAR Compiler */
area of a module to a memory space in physical RAM. #define __ALIGN_BEGIN
Available memory areas are declared in the 'Target' tab of the 'Options for Target' #endif /* __CC_ARM */
dialog. #endif /* __ALIGN_BEGIN */
*/ #endif /* __GNUC__ */
#define __RAM_FUNC
#elif defined ( __ICCARM__ ) /**
/* ICCARM Compiler * @brief __RAM_FUNC definition
--------------- */
RAM functions are defined using a specific toolchain keyword "__ramfunc". #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
*/ /* ARM Compiler V4/V5 and V6
#define __RAM_FUNC __ramfunc --------------------------
RAM functions are defined using the toolchain options.
#elif defined ( __GNUC__ ) Functions that are executed in RAM should reside in a separate source module.
/* GNU Compiler Using the 'Options for File' dialog you can simply change the 'Code / Const'
------------ area of a module to a memory space in physical RAM.
RAM functions are defined using a specific toolchain attribute Available memory areas are declared in the 'Target' tab of the 'Options for Target'
"__attribute__((section(".RamFunc")))". dialog.
*/ */
#define __RAM_FUNC __attribute__((section(".RamFunc"))) #define __RAM_FUNC
#endif #elif defined ( __ICCARM__ )
/* ICCARM Compiler
/** ---------------
* @brief __NOINLINE definition RAM functions are defined using a specific toolchain keyword "__ramfunc".
*/ */
#if defined ( __CC_ARM ) || defined ( __GNUC__ ) #define __RAM_FUNC __ramfunc
/* ARM & GNUCompiler
---------------- #elif defined ( __GNUC__ )
*/ /* GNU Compiler
#define __NOINLINE __attribute__ ( (noinline) ) ------------
RAM functions are defined using a specific toolchain attribute
#elif defined ( __ICCARM__ ) "__attribute__((section(".RamFunc")))".
/* ICCARM Compiler */
--------------- #define __RAM_FUNC __attribute__((section(".RamFunc")))
*/
#define __NOINLINE _Pragma("optimize = no_inline") #endif
#endif /**
* @brief __NOINLINE definition
#ifdef __cplusplus */
} #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
#endif /* ARM V4/V5 and V6 & GNU Compiler
-------------------------------
#endif /* ___STM32F4xx_HAL_DEF */ */
#define __NOINLINE __attribute__ ( (noinline) )
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#elif defined ( __ICCARM__ )
/* ICCARM Compiler
---------------
*/
#define __NOINLINE _Pragma("optimize = no_inline")
#endif
#ifdef __cplusplus
}
#endif
#endif /* ___STM32F4xx_HAL_DEF */

1606
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h
View file

File diff suppressed because it is too large Load diff

206
Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h
View file

@ -1,104 +1,102 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_hal_dma_ex.h * @file stm32f4xx_hal_dma_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DMA HAL extension module. * @brief Header file of DMA HAL extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics. * Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software is licensed under terms that can be found in the LICENSE file in
* the "License"; You may not use this file except in compliance with the * the root directory of this software component.
* License. You may obtain a copy of the License at: * If no LICENSE file comes with this software, it is provided AS-IS.
* opensource.org/licenses/BSD-3-Clause *
* ******************************************************************************
****************************************************************************** */
*/
/* Define to prevent recursive inclusion -------------------------------------*/
/* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_DMA_EX_H
#ifndef __STM32F4xx_HAL_DMA_EX_H #define __STM32F4xx_HAL_DMA_EX_H
#define __STM32F4xx_HAL_DMA_EX_H
#ifdef __cplusplus
#ifdef __cplusplus extern "C" {
extern "C" { #endif
#endif
/* Includes ------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal_def.h"
#include "stm32f4xx_hal_def.h"
/** @addtogroup STM32F4xx_HAL_Driver
/** @addtogroup STM32F4xx_HAL_Driver * @{
* @{ */
*/
/** @addtogroup DMAEx
/** @addtogroup DMAEx * @{
* @{ */
*/
/* Exported types ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
/** @defgroup DMAEx_Exported_Types DMAEx Exported Types * @brief DMAEx Exported types
* @brief DMAEx Exported types * @{
* @{ */
*/
/**
/** * @brief HAL DMA Memory definition
* @brief HAL DMA Memory definition */
*/ typedef enum
typedef enum {
{ MEMORY0 = 0x00U, /*!< Memory 0 */
MEMORY0 = 0x00U, /*!< Memory 0 */ MEMORY1 = 0x01U /*!< Memory 1 */
MEMORY1 = 0x01U /*!< Memory 1 */ }HAL_DMA_MemoryTypeDef;
}HAL_DMA_MemoryTypeDef;
/**
/** * @}
* @} */
*/
/* Exported functions --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions * @brief DMAEx Exported functions
* @brief DMAEx Exported functions * @{
* @{ */
*/
/** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
/** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions * @brief Extended features functions
* @brief Extended features functions * @{
* @{ */
*/
/* IO operation functions *******************************************************/
/* IO operation functions *******************************************************/ HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
/**
/** * @}
* @} */
*/ /**
/** * @}
* @} */
*/
/* Private functions ---------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /** @defgroup DMAEx_Private_Functions DMAEx Private Functions
/** @defgroup DMAEx_Private_Functions DMAEx Private Functions * @brief DMAEx Private functions
* @brief DMAEx Private functions * @{
* @{ */
*/ /**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
#ifdef __cplusplus
#ifdef __cplusplus }
} #endif
#endif
#endif /*__STM32F4xx_HAL_DMA_EX_H*/
#endif /*__STM32F4xx_HAL_DMA_EX_H*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Some files were not shown because too many files have changed in this diff Show more