This commit is contained in:
Attila Body 2025-06-08 16:49:58 +02:00
parent 3957af107d
commit 3253c9413e
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
17 changed files with 176 additions and 94 deletions

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/*
* ll_testbed.cpp
*
* Created on: Oct 28, 2019
* Author: abody
*/
#ifdef USE_CPLUSPLUS
#include <string.h>
#include <stdlib.h>
#include "f4ll/packetusart.h"
#include "f4ll/crchandler.h"
#include "f4ll/memcpydma.h"
#include "f4ll/consolehandler.h"
#include "f4ll/irqlock.h"
#include "f4ll/strutil.h"
extern "C" {
#include "main.h"
#include "globals.h"
#include "config.h"
}
#include "globals_cpp.h"
#define PACKAGE_DELAY_MS 0
#define STATS_DELAY_MS 1000
#define ADDINFO(b,s,u) \
b += strcpy_ex(b,s); \
b += uitodec(b,u);
extern "C" void MainLoop()
{
uint8_t const text2Send[] __attribute__((aligned(16))) =
"Megszentsegtelenithetetlensegeskedeseitekert\r\n"
"--------------------------------------------\r\n\0\0\0";
f4ll::MemcpyDma::Init(MEMCPY_DMA_ENGINE, MEMCPY_DMA_STREAM);
f4ll::CrcHandler::Init(DMA2, LL_DMA_STREAM_4);
f4ll::ConsoleHandler::Init(UART4, CONSOLE_DMA_ENGINE, 0u, CONSOLE_TX_DMA_STREAM);
f4ll::PacketUsart u1{ USART1, DMA2, LL_DMA_STREAM_2, LL_DMA_STREAM_7 };
f4ll::PacketUsart u2{ USART2, DMA1, LL_DMA_STREAM_5, LL_DMA_STREAM_6 };
f4ll::PacketUsart u3{ USART3, DMA1, LL_DMA_STREAM_1, LL_DMA_STREAM_3 };
f4ll::PacketUsart u6{ USART6, DMA2, LL_DMA_STREAM_1, LL_DMA_STREAM_6 };
f4ll::PacketUsart * usarts[] = { &u1, &u2, &u3, &u6 };
f4ll::PacketUsart **dst = g_usarts;
for(auto usart: usarts)
*dst++ = usart;
uint32_t lastStatsTick = 0;
uint32_t prevSentTick = 0;
uint8_t statId = 0;
uint32_t tmp = sizeof(text2Send) - 1;
uint32_t randmask = 0x80000000;
do {
if(randmask & tmp)
break;
} while((randmask = randmask >> 1));
--randmask;
lastStatsTick = HAL_GetTick();
for(auto u : g_usarts)
u->SetupReceive();
for(;;) {
uint32_t tick = HAL_GetTick();
bool send = PACKAGE_DELAY_MS ? (tick - prevSentTick > PACKAGE_DELAY_MS) : 1;
if(send)
prevSentTick += PACKAGE_DELAY_MS;
for(auto u : g_usarts) {
if(!u->IsTxBusy() && send) {
//DIAG_ENTER_BUSY();
auto len = sizeof(text2Send) - 1 - (rand() & randmask);
f4ll::MemcpyDma::Instance().Copy(u->GetTxPacketBuffer(), text2Send, len);
u->PostPacket(nullptr, len);
//DIAG_EXIT_BUSY();
}
for(uint16_t rIdx = 0; rIdx < 2; ++rIdx)
if(u->IsRxBusy((bool)rIdx) || u->IsRxFailed(rIdx)) {
u->GetRxPacketBuffer(rIdx);
// ...
u->RxProcessed((bool)rIdx);
}
}
if(tick - lastStatsTick > STATS_DELAY_MS) {
f4ll::ConsoleHandler::Instance().PrintStats(statId, *g_usarts[statId]);
lastStatsTick += STATS_DELAY_MS;
++statId;
if(statId >= sizeof(g_usarts) / sizeof(g_usarts[0]))
statId = 0;
}
// uint32_t ein = LL_GPIO_ReadInputPort(KEY1_GPIO_Port);
// if(!(ein & KEY1_Pin)) {
// void (*fptr)(void) = (void (*)(void))(void*)0xa0000000;
// fptr();
// }
}
}
#endif // USE_CPLUSPLUS

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/*
* globals_cpp.cpp
*
* Created on: Nov 4, 2019
* Author: abody
*/
#include "globals.h"
#include "config.h"
#include <f4ll/memcpy_dma.h>
#include <f4ll/packet_usart.h>
f4ll::PacketUsart *g_usarts[USARTCOUNT];
uint8_t g_statsBuf[256];

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#include "f4ll/console_handler.h"
#include <config.h>
#include <globals.h>
#include <irq_bridge.h>
void usart1_rx_dma_isr(void)
{
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART1_OFFSET]);
}
void usart1_tx_dma_isr(void)
{
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART1_OFFSET]);
}
void usart1_isr(void)
{
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART1_OFFSET]);
}
//
void usart2_rx_dma_isr(void)
{
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART2_OFFSET]);
}
void usart2_tx_dma_isr(void)
{
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART2_OFFSET]);
}
void usart2_isr(void)
{
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART2_OFFSET]);
}
//
void usart3_rx_dma_isr(void)
{
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART3_OFFSET]);
}
void usart3_tx_dma_isr(void)
{
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART3_OFFSET]);
}
void usart3_isr(void)
{
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART3_OFFSET]);
}
//
void usart4_rx_dma_isr(void) {} // console
void usart4_tx_dma_isr(void)
{
f4ll::console_handler::HandleTxDmaIrq(&f4ll::console_handler::instance());
} // console
void usart4_isr(void)
{
f4ll::console_handler::HandleUsartIrq(&f4ll::console_handler::instance());
}
//
void usart6_rx_dma_isr(void)
{
f4ll::PacketUsart::HandleRxDmaIrq(g_usarts[USART6_OFFSET]);
}
void usart6_tx_dma_isr(void)
{
f4ll::PacketUsart::HandleTxDmaIrq(g_usarts[USART6_OFFSET]);
}
void usart6_isr(void)
{
f4ll::PacketUsart::HandleUsartIrq(g_usarts[USART6_OFFSET]);
}
void m2m1_dma_isr(void) {} // m2mcpy
void m2m2_dma_isr(void) {} // crc