playground-stm32/f407ve_hs_uart
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

HsUsart renamed to PacketUsart, volatile usage review

Browse source
This commit is contained in:
Attila Body 2019-11-13 15:24:01 +01:00
parent 7cdc79c2ac
commit 23a75f43c7
12 changed files with 179 additions and 171 deletions
Download patch file Download diff file Expand all files Collapse all files

21
components/f4ll/src/usartcore.cpp
View file

@ -19,16 +19,29 @@ UsartCore::UsartCore(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t streamRx,
LL_DMA_EnableIT_TC(dma, streamTx);
LL_DMA_EnableIT_TE(dma, streamTx);
LL_USART_EnableIT_IDLE(usart);
LL_USART_EnableIT_ERROR(usart);
}
void UsartCore::UsartIsr()
{
if(LL_USART_IsActiveFlag_IDLE(m_usart) && LL_USART_IsEnabledIT_IDLE(m_usart)) { // receiver idle
LL_USART_ClearFlag_IDLE(m_usart);
ReceiverIdle();
} else if(LL_USART_IsActiveFlag_TC(m_usart) && LL_USART_IsEnabledIT_TC(m_usart)) { // transmission complete
if(LL_USART_IsActiveFlag_TC(m_usart) && LL_USART_IsEnabledIT_TC(m_usart)) { // transmission complete
LL_USART_DisableIT_TC(m_usart);
TransmissionComplete();
} else if(LL_USART_IsEnabledIT_ERROR(m_usart)) {
uint32_t status = m_usart->SR;
volatile uint32_t tmpreg = m_usart->DR; // clearing some of the error/status bits in the HW
(void) tmpreg;
if(status & USART_SR_IDLE) {
ReceiverIdle();
}
if(status & USART_SR_FE) {
FramingError();
}
if(status & USART_SR_ORE) {
Overrun();
}
}
}