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Migrated (version bump, tool && libs)

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This commit is contained in:
Attila Body 2025-05-27 17:40:41 +02:00
parent bc01b1f0e8
commit 033122ffb3
Signed by: abody
GPG key ID: BD0C6214E68FB5CF
156 changed files with 155620 additions and 138408 deletions
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15
Src/stm32f4xx_it.c
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@ -92,7 +92,7 @@ extern "C" {
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
@ -239,7 +239,6 @@ void DMA1_Stream1_IRQHandler(void)
HandleUsartRxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
/* USER CODE END DMA1_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
/* USER CODE END DMA1_Stream1_IRQn 1 */
@ -253,7 +252,6 @@ void DMA1_Stream2_IRQHandler(void)
/* USER CODE BEGIN DMA1_Stream2_IRQn 0 */
// console rx
/* USER CODE END DMA1_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream2_IRQn 1 */
/* USER CODE END DMA1_Stream2_IRQn 1 */
@ -271,7 +269,6 @@ void DMA1_Stream3_IRQHandler(void)
HandleUsartTxDmaIrq(&g_uartStatuses[USART3_OFFSET]);
#endif
/* USER CODE END DMA1_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */
@ -289,7 +286,6 @@ void DMA1_Stream4_IRQHandler(void)
HandleConsoleTxDmaIrq(&g_ConsoleTxDmaInfo, UART4);
#endif
/* USER CODE END DMA1_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
/* USER CODE END DMA1_Stream4_IRQn 1 */
@ -307,7 +303,6 @@ void DMA1_Stream5_IRQHandler(void)
HandleUsartRxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
/* USER CODE END DMA1_Stream5_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream5_IRQn 1 */
/* USER CODE END DMA1_Stream5_IRQn 1 */
@ -325,7 +320,6 @@ void DMA1_Stream6_IRQHandler(void)
HandleUsartTxDmaIrq(&g_uartStatuses[USART2_OFFSET]);
#endif
/* USER CODE END DMA1_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA1_Stream6_IRQn 1 */
/* USER CODE END DMA1_Stream6_IRQn 1 */
@ -424,7 +418,6 @@ void DMA2_Stream1_IRQHandler(void)
HandleUsartRxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
/* USER CODE END DMA2_Stream1_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
/* USER CODE END DMA2_Stream1_IRQn 1 */
@ -442,7 +435,6 @@ void DMA2_Stream2_IRQHandler(void)
HandleUsartRxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
/* USER CODE END DMA2_Stream2_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
/* USER CODE END DMA2_Stream2_IRQn 1 */
@ -460,7 +452,6 @@ void DMA2_Stream3_IRQHandler(void)
Mcd_HandleDmaIrq();
#endif
/* USER CODE END DMA2_Stream3_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
/* USER CODE END DMA2_Stream3_IRQn 1 */
@ -478,7 +469,6 @@ void DMA2_Stream4_IRQHandler(void)
HandleCrcDmaIrq(&g_crcStatus);
#endif
/* USER CODE END DMA2_Stream4_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
/* USER CODE END DMA2_Stream4_IRQn 1 */
@ -496,7 +486,6 @@ void DMA2_Stream6_IRQHandler(void)
HandleUsartTxDmaIrq(&g_uartStatuses[USART6_OFFSET]);
#endif
/* USER CODE END DMA2_Stream6_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
/* USER CODE END DMA2_Stream6_IRQn 1 */
@ -514,7 +503,6 @@ void DMA2_Stream7_IRQHandler(void)
HandleUsartTxDmaIrq(&g_uartStatuses[USART1_OFFSET]);
#endif
/* USER CODE END DMA2_Stream7_IRQn 0 */
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
/* USER CODE END DMA2_Stream7_IRQn 1 */
@ -542,4 +530,3 @@ void USART6_IRQHandler(void)
}
#endif // __cplusplus
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/