playground-stm32/f103c8_minimal_ll
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base: playground-stm32:2b17bb1dae89b9730c538415f01443dca6a05006
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playground-stm32:master
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compare: playground-stm32:45141798d8d88f49cbd18e8f67abd49619eb16e0
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playground-stm32:master

2 commits
2b17bb1dae ... 45141798d8

Author SHA1 Message Date
Attila Body
45141798d8
Clan up the structure 2025-05-31 17:45:15 +02:00
Attila Body
340f0329fa
Make it work 2025-05-28 09:23:16 +02:00
45 changed files with 304 additions and 560 deletions
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33
.clang-format Normal file
View file

@ -0,0 +1,33 @@
BasedOnStyle: LLVM
UseTab: Never
IndentWidth: 2
TabWidth: 2
BreakBeforeBraces: Custom
AllowShortFunctionsOnASingleLine: Empty
AllowShortIfStatementsOnASingleLine: false
AllowShortLambdasOnASingleLine: true
AllowAllArgumentsOnNextLine: true
IndentCaseLabels: true
AccessModifierOffset: -2
NamespaceIndentation: None
FixNamespaceComments: false
PackConstructorInitializers: Never
AlignAfterOpenBracket: AlwaysBreak
InsertBraces: true
BraceWrapping:
AfterClass: true # false
AfterControlStatement: false
AfterEnum: true # false
AfterFunction: true # false
AfterNamespace: false
AfterObjCDeclaration: true # false
AfterStruct: true # false
AfterUnion: true # false
AfterExternBlock: false
BeforeCatch: false
BeforeElse: false
IndentBraces: false
SplitEmptyFunction: true
SplitEmptyRecord: true
SplitEmptyNamespace: true
ColumnLimit: 140

1
.gitignore vendored
View file

@ -8,7 +8,6 @@ cmake_install.cmake
compile_commands.json
.clangd
# eclipse
.*project.bak
/.settings/*

28
.mxproject
View file

@ -7,13 +7,29 @@ HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/In
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;STM32F103xB;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;
[PreviousUsedCMakes]
SourceFiles=Src/main.c;Src/gpio.c;Src/dma.c;Src/usart.c;Src/stm32f1xx_it.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;;;
HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Inc;
SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/dma.c;Core/Src/usart.c;Core/Src/stm32f1xx_it.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;;;
HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Core/Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;STM32F103xB;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;
[PreviousGenFiles]
HeaderPath=../Inc
HeaderFiles=gpio.h;dma.h;usart.h;stm32f1xx_it.h;stm32_assert.h;main.h;
SourcePath=../Src
SourceFiles=gpio.c;dma.c;usart.c;stm32f1xx_it.c;main.c;
AdvancedFolderStructure=true
HeaderFileListSize=6
HeaderFiles#0=../Core/Inc/gpio.h
HeaderFiles#1=../Core/Inc/dma.h
HeaderFiles#2=../Core/Inc/usart.h
HeaderFiles#3=../Core/Inc/stm32f1xx_it.h
HeaderFiles#4=../Core/Inc/stm32_assert.h
HeaderFiles#5=../Core/Inc/main.h
HeaderFolderListSize=1
HeaderPath#0=../Core/Inc
HeaderFiles=;
SourceFileListSize=5
SourceFiles#0=../Core/Src/gpio.c
SourceFiles#1=../Core/Src/dma.c
SourceFiles#2=../Core/Src/usart.c
SourceFiles#3=../Core/Src/stm32f1xx_it.c
SourceFiles#4=../Core/Src/main.c
SourceFolderListSize=1
SourcePath#0=../Core/Src
SourceFiles=;

3
.vscode/settings.json vendored
View file

@ -5,5 +5,6 @@
],
"cmake.preferredGenerators": [
"Ninja"
]
],
"sonarlint.pathToCompileCommands": "${workspaceFolder}/compile_commands.json"
}

6
CMakeLists.txt
View file

@ -41,9 +41,9 @@ add_executable(${CMAKE_PROJECT_NAME})
# Add STM32CubeMX generated sources
add_subdirectory(cmake/stm32cubemx)
add_subdirectory(platform)
add_subdirectory(app)
add_subdirectory(f1ll)
add_subdirectory(components/platform)
add_subdirectory(components/app)
add_subdirectory(components/f1ll)
target_link_libraries(stm32cubemx INTERFACE
app

0
Inc/dma.h → Core/Inc/dma.h
View file

0
Inc/gpio.h → Core/Inc/gpio.h
View file

0
Inc/main.h → Core/Inc/main.h
View file

0
Inc/stm32_assert.h → Core/Inc/stm32_assert.h
View file

0
Inc/stm32f1xx_it.h → Core/Inc/stm32f1xx_it.h
View file

0
Inc/usart.h → Core/Inc/usart.h
View file

0
Src/dma.c → Core/Src/dma.c
View file

0
Src/gpio.c → Core/Src/gpio.c
View file

45
Src/main.c → Core/Src/main.c
View file

@ -19,8 +19,8 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "dma.h"
#include "gpio.h"
#include "usart.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
@ -57,21 +57,15 @@ void SystemClock_Config(void);
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void SendStr(char const *str) {
while (*str) {
LL_USART_ClearFlag_TC(USART1);
LL_USART_TransmitData8(USART1, *str++);
while (!LL_USART_IsActiveFlag_TC(USART1))
;
}
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void) {
int main(void)
{
/* USER CODE BEGIN 1 */
@ -79,18 +73,13 @@ int main(void) {
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick.
*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* System interrupt init*/
NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
LL_GPIO_AF_Remap_SWJ_NOJTAG();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
@ -123,20 +112,26 @@ int main(void) {
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void) {
void SystemClock_Config(void)
{
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2) {
while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_2)
{
}
LL_RCC_HSE_Enable();
/* Wait till HSE is ready */
while (LL_RCC_HSE_IsReady() != 1) {
while(LL_RCC_HSE_IsReady() != 1)
{
}
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
/* Wait till PLL is ready */
while (LL_RCC_PLL_IsReady() != 1) {
while(LL_RCC_PLL_IsReady() != 1)
{
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
@ -144,7 +139,9 @@ void SystemClock_Config(void) {
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
/* Wait till System clock is ready */
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
}
LL_Init1msTick(72000000);
LL_SetSystemCoreClock(72000000);
@ -158,7 +155,8 @@ void SystemClock_Config(void) {
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void) {
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
@ -175,7 +173,8 @@ void Error_Handler(void) {
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line) {
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line
number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file,

42
Src/stm32f1xx_it.c → Core/Src/stm32f1xx_it.c
View file

@ -70,7 +70,8 @@
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void) {
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
@ -83,7 +84,8 @@ void NMI_Handler(void) {
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void) {
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
@ -96,7 +98,8 @@ void HardFault_Handler(void) {
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void) {
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
@ -109,7 +112,8 @@ void MemManage_Handler(void) {
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void) {
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
@ -122,7 +126,8 @@ void BusFault_Handler(void) {
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void) {
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
@ -135,7 +140,8 @@ void UsageFault_Handler(void) {
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void) {
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
@ -147,7 +153,8 @@ void SVC_Handler(void) {
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void) {
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
@ -159,7 +166,8 @@ void DebugMon_Handler(void) {
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void) {
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
@ -171,7 +179,8 @@ void PendSV_Handler(void) {
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void) {
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
@ -191,9 +200,10 @@ void SysTick_Handler(void) {
/**
* @brief This function handles DMA1 channel4 global interrupt.
*/
void DMA1_Channel4_IRQHandler(void) {
void DMA1_Channel4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
dma1_channel4_irq_handler();
usart1_tx_dma_isr();
/* USER CODE END DMA1_Channel4_IRQn 0 */
/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
@ -203,9 +213,10 @@ void DMA1_Channel4_IRQHandler(void) {
/**
* @brief This function handles DMA1 channel5 global interrupt.
*/
void DMA1_Channel5_IRQHandler(void) {
void DMA1_Channel5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
dma1_channel5_irq_handler();
usart1_rx_dma_isr();
/* USER CODE END DMA1_Channel5_IRQn 0 */
/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
@ -215,9 +226,10 @@ void DMA1_Channel5_IRQHandler(void) {
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void) {
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
usart1_isr();
/* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */

0
Src/syscalls.c → Core/Src/syscalls.c
View file

0
Src/sysmem.c → Core/Src/sysmem.c
View file

0
Src/system_stm32f1xx.c → Core/Src/system_stm32f1xx.c
View file

0
Src/usart.c → Core/Src/usart.c
View file

364
Startup/startup_stm32f103c8tx.s
View file

@ -1,364 +0,0 @@
/**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* Copyright (c) 2017-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
ldr r2, =_sidata
movs r3, #0
b LoopCopyDataInit
CopyDataInit:
ldr r4, [r2, r3]
str r4, [r0, r3]
adds r3, r3, #4
LoopCopyDataInit:
adds r4, r0, r3
cmp r4, r1
bcc CopyDataInit
/* Zero fill the bss segment. */
ldr r2, =_sbss
ldr r4, =_ebss
movs r3, #0
b LoopFillZerobss
FillZerobss:
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMPER_IRQHandler
.word RTC_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_2_IRQHandler
.word USB_HP_CAN1_TX_IRQHandler
.word USB_LP_CAN1_RX0_IRQHandler
.word CAN1_RX1_IRQHandler
.word CAN1_SCE_IRQHandler
.word EXTI9_5_IRQHandler
.word TIM1_BRK_IRQHandler
.word TIM1_UP_IRQHandler
.word TIM1_TRG_COM_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USBWakeUp_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F10x Medium Density devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMPER_IRQHandler
.thumb_set TAMPER_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_2_IRQHandler
.thumb_set ADC1_2_IRQHandler,Default_Handler
.weak USB_HP_CAN1_TX_IRQHandler
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
.weak USB_LP_CAN1_RX0_IRQHandler
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_IRQHandler
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
.weak TIM1_UP_IRQHandler
.thumb_set TIM1_UP_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_IRQHandler
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USBWakeUp_IRQHandler
.thumb_set USBWakeUp_IRQHandler,Default_Handler

18
cmake/stm32cubemx/CMakeLists.txt
View file

@ -18,7 +18,7 @@ set(MX_Defines_Syms
# STM32CubeMX generated include paths
set(MX_Include_Dirs
${CMAKE_SOURCE_DIR}/Inc
${CMAKE_SOURCE_DIR}/Core/Inc
${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Inc
${CMAKE_SOURCE_DIR}/Drivers/CMSIS/Device/ST/STM32F1xx/Include
${CMAKE_SOURCE_DIR}/Drivers/CMSIS/Include
@ -26,19 +26,19 @@ set(MX_Include_Dirs
# STM32CubeMX generated application sources
set(MX_Application_Src
${CMAKE_SOURCE_DIR}/Src/main.c
${CMAKE_SOURCE_DIR}/Src/gpio.c
${CMAKE_SOURCE_DIR}/Src/dma.c
${CMAKE_SOURCE_DIR}/Src/usart.c
${CMAKE_SOURCE_DIR}/Src/stm32f1xx_it.c
${CMAKE_SOURCE_DIR}/Src/sysmem.c
${CMAKE_SOURCE_DIR}/Src/syscalls.c
${CMAKE_SOURCE_DIR}/Core/Src/main.c
${CMAKE_SOURCE_DIR}/Core/Src/gpio.c
${CMAKE_SOURCE_DIR}/Core/Src/dma.c
${CMAKE_SOURCE_DIR}/Core/Src/usart.c
${CMAKE_SOURCE_DIR}/Core/Src/stm32f1xx_it.c
${CMAKE_SOURCE_DIR}/Core/Src/sysmem.c
${CMAKE_SOURCE_DIR}/Core/Src/syscalls.c
${CMAKE_SOURCE_DIR}/startup_stm32f103xb.s
)
# STM32 HAL/LL Drivers
set(STM32_Drivers_Src
${CMAKE_SOURCE_DIR}/Src/system_stm32f1xx.c
${CMAKE_SOURCE_DIR}/Core/Src/system_stm32f1xx.c
${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c
${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c
${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c

0
app/CMakeLists.txt → components/app/CMakeLists.txt
View file

0
app/inc/app.h → components/app/inc/app.h
View file

5
app/inc/irq_bridge.h → components/app/inc/irq_bridge.h
View file

@ -5,8 +5,9 @@
extern "C" {
#endif
void dma1_channel4_irq_handler();
void dma1_channel5_irq_handler();
void usart1_tx_dma_isr();
void usart1_rx_dma_isr();
void usart1_isr();
#if defined(__cplusplus)
}

3
app/src/app.cpp → components/app/src/app.cpp
View file

@ -4,7 +4,8 @@
#include <f1ll/console_handler.h>
void app_main() {
void app_main()
{
f1ll::console_handler::init(USART1, DMA1, LL_DMA_CHANNEL_5, LL_DMA_CHANNEL_4);
while (true) {

11
app/src/irq_bridge.cpp → components/app/src/irq_bridge.cpp
View file

@ -2,10 +2,17 @@
#include <f1ll/console_handler.h>
void dma1_channel4_irq_handler() {
void usart1_tx_dma_isr() // DMA1 channel 4
{
f1ll::console_handler::instance().tx_dma_isr();
}
void dma1_channel5_irq_handler() {
void usart1_rx_dma_isr() // DMA1 channel 5
{
f1ll::console_handler::instance().rx_dma_isr();
}
void usart1_isr()
{
f1ll::console_handler::instance().usart_isr();
}

3
f1ll/CMakeLists.txt → components/f1ll/CMakeLists.txt
View file

@ -10,3 +10,6 @@ target_include_directories(f1ll PUBLIC
)
target_link_libraries(f1ll PUBLIC platform stm32cubemx)
# ST code quality workaround - Suppres register storage class warning (C++17...)
target_compile_options(f1ll PRIVATE -Wno-register)

47
components/f1ll/inc/f1ll/console_handler.h Normal file
View file

@ -0,0 +1,47 @@
/*
* ll_consolehandler.h
*
* Created on: Nov 7, 2019
* Author: abody
*/
#ifndef LL_CONSOLEHANDLER_H_
#define LL_CONSOLEHANDLER_H_
#include "f1ll/usart_core.h"
#include "singleton.h"
namespace f1ll {
class console_handler : public usart_core, public singleton<console_handler>
{
friend class singleton<console_handler>;
public:
void print(char const *s);
void flush();
void append(char const *s);
private:
console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t channelTx);
// LL_UsartCore pure virtual function implementations
virtual void receiver_idle(void) override;
virtual void transmission_complete(void) override;
virtual void framing_error(void) override;
virtual void overrun(void) override;
virtual void rx_dma_transfer_complete(void) override;
virtual void rx_dma_half_transfer(void) override;
virtual void rx_dma_error(void) override;
virtual void tx_dma_transfer_complete(void) override;
virtual void tx_dma_half_transfer(void) override;
virtual void tx_dma_error(void) override;
char m_buffer[128];
uint16_t m_used = 0;
volatile bool m_busy = false;
};
} // namespace f1ll
#endif /* LL_CONSOLEHANDLER_H_ */

49
components/f1ll/inc/f1ll/dma_helper.h Normal file
View file

@ -0,0 +1,49 @@
/*
* ll_dmahelper.h
*
* Created on: Oct 25, 2019
* Author: abody
*/
#ifndef LL_DMAHELPER_H_
#define LL_DMAHELPER_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
namespace f1ll {
class dma_helper
{
public:
dma_helper(DMA_TypeDef *dma, uint32_t channel);
dma_helper(dma_helper const &base) = default;
inline DMA_TypeDef *get_dma() const { return m_dma; }
inline uint32_t get_channel() const { return m_channel; }
inline volatile uint32_t *get_is_reg() const { return m_is_reg; }
inline volatile uint32_t *get_ifc_reg() const { return m_ifc_reg; }
inline uint32_t get_te_mask() const { return m_te_masks[m_channel - 1]; }
inline uint32_t get_ht_mask() const { return m_ht_masks[m_channel - 1]; }
inline uint32_t get_tc_mask() const { return m_tc_masks[m_channel - 1]; }
inline uint32_t get_gi_mask() const { return m_gi_masks[m_channel - 1]; }
inline bool is_enabled_it_te() { return LL_DMA_IsEnabledIT_TE(m_dma, m_channel) != 0; }
inline bool is_enabled_it_ht() { return LL_DMA_IsEnabledIT_HT(m_dma, m_channel) != 0; }
inline bool is_enabled_it_tc() { return LL_DMA_IsEnabledIT_TC(m_dma, m_channel) != 0; }
private:
DMA_TypeDef *m_dma;
uint32_t m_channel;
volatile uint32_t *m_is_reg;
volatile uint32_t *m_ifc_reg;
static const uint32_t m_te_masks[7];
static const uint32_t m_ht_masks[7];
static const uint32_t m_tc_masks[7];
static const uint32_t m_gi_masks[7];
};
} /* namespace f4ll */
#endif /* LL_DMAHELPER_H_ */

10
f1ll/inc/f1ll/singleton.h → components/f1ll/inc/f1ll/singleton.h
View file

@ -3,10 +3,14 @@
#include <utility>
template <typename T> class singleton {
namespace f1ll {
template <typename T> class singleton
{
public:
static T &instance() { return *m_instance; }
template <typename... args_t> static T &init(args_t &&...args) {
template <typename... args_t> static T &init(args_t &&...args)
{
static T instance{std::forward<args_t>(args)...};
m_instance = &instance;
return instance;
@ -21,4 +25,6 @@ protected:
template <typename T> T *singleton<T>::m_instance = nullptr;
} // namespace f1ll {
#endif /* SINGLETON_H_ */

0
f1ll/inc/f1ll/str_util.h → components/f1ll/inc/f1ll/str_util.h
View file

6
f1ll/inc/f1ll/usart_core.h → components/f1ll/inc/f1ll/usart_core.h
View file

@ -13,7 +13,8 @@
namespace f1ll {
class usart_core {
class usart_core
{
public:
static inline void usart_irq(usart_core *_this) { _this->usart_isr(); }
static inline void rx_dma_irq(usart_core *_this) { _this->rx_dma_isr(); }
@ -23,8 +24,7 @@ public:
void setup_receive(void *buffer, uint16_t length);
protected:
usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channel_rx,
uint32_t stream_tx);
usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channel_rx, uint32_t stream_tx);
USART_TypeDef *m_usart;
dma_helper m_rxDma;

44
f1ll/src/console_handler.cpp → components/f1ll/src/console_handler.cpp
View file

@ -6,32 +6,60 @@
*/
#include <f1ll/console_handler.h>
#include <string.h>
namespace f1ll {
console_handler::console_handler(USART_TypeDef *usart, DMA_TypeDef *dma,
uint32_t channelRx, uint32_t channelTx)
: usart_core(usart, dma, channelRx, channelTx) {}
console_handler::console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, uint32_t channelTx)
: usart_core(usart, dma, channelRx, channelTx)
{
}
void console_handler::receiver_idle(void) {}
void console_handler::transmission_complete(void) {}
void console_handler::transmission_complete(void)
{
m_busy = false;
m_used = 0;
}
void console_handler::framing_error(void) {}
void console_handler::overrun(void) {}
void console_handler::rx_dma_transfer_complete(void) {}
void console_handler::rx_dma_half_transfer(void) {}
void console_handler::rx_dma_error(void) {}
void console_handler::tx_dma_transfer_complete(void) {
void console_handler::tx_dma_transfer_complete(void)
{
LL_USART_EnableIT_TC(m_usart);
LL_DMA_DisableChannel(m_txDma.get_dma(), m_txDma.get_channel());
}
void console_handler::tx_dma_half_transfer(void) {}
void console_handler::tx_dma_error(void) {}
void console_handler::print(char const *s) {
void console_handler::append(char const *s)
{
while (m_busy)
;
size_t len = strlen(s);
strncpy(m_buffer, s, sizeof(m_buffer));
setup_transmit(m_buffer, len > sizeof(m_buffer) ? sizeof(m_buffer) : len);
size_t max_len = sizeof(m_buffer) - m_used;
strncpy(m_buffer + m_used, s, max_len);
m_used += len < max_len ? len : max_len;
}
void console_handler::flush()
{
while (m_busy)
;
if (m_used) {
m_busy = true;
setup_transmit(m_buffer, m_used);
}
}
void console_handler::print(char const *s)
{
append(s);
flush();
}
} // namespace f1ll

0
f1ll/src/dma_helper.cpp → components/f1ll/src/dma_helper.cpp
View file

0
f1ll/src/str_util.cpp → components/f1ll/src/str_util.cpp
View file

0
f1ll/src/usart_core.cpp → components/f1ll/src/usart_core.cpp
View file

0
platform/CMakeLists.txt → components/platform/CMakeLists.txt
View file

0
platform/platform/crc_ll.h → components/platform/platform/crc_ll.h
View file

0
platform/platform/dma_ll.h → components/platform/platform/dma_ll.h
View file

0
platform/platform/gpio_ll.h → components/platform/platform/gpio_ll.h
View file

0
platform/platform/usart_ll.h → components/platform/platform/usart_ll.h
View file

0
platform/platform/utils_ll.h → components/platform/platform/utils_ll.h
View file

8
f103c8_minimal_ll.ioc
View file

@ -68,9 +68,9 @@ NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire
PA13.Mode=Trace_Asynchronous_SW
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Mode=Trace_Asynchronous_SW
PA14.Signal=SYS_JTCK-SWCLK
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
@ -87,7 +87,7 @@ PD1-OSC_OUT.Mode=HSE-External-Oscillator
PD1-OSC_OUT.Signal=RCC_OSC_OUT
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerLinker=GCC
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
@ -103,7 +103,7 @@ ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Src
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=STM32CubeIDE
ProjectManager.ProjectBuild=false

44
f1ll/inc/f1ll/console_handler.h
View file

@ -1,44 +0,0 @@
/*
* ll_consolehandler.h
*
* Created on: Nov 7, 2019
* Author: abody
*/
#ifndef LL_CONSOLEHANDLER_H_
#define LL_CONSOLEHANDLER_H_
#include "f1ll/usart_core.h"
#include "singleton.h"
namespace f1ll {
class console_handler : public usart_core, public singleton<console_handler> {
friend class singleton<console_handler>;
public:
void print(char const *s);
private:
console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx,
uint32_t channelTx);
// LL_UsartCore pure virtual function implementations
virtual void receiver_idle(void);
virtual void transmission_complete(void);
virtual void framing_error(void);
virtual void overrun(void);
virtual void rx_dma_transfer_complete(void);
virtual void rx_dma_half_transfer(void);
virtual void rx_dma_error(void);
virtual void tx_dma_transfer_complete(void);
virtual void tx_dma_half_transfer(void);
virtual void tx_dma_error(void);
char m_buffer[128];
uint16_t m_used = 0;
};
} // namespace f1ll
#endif /* LL_CONSOLEHANDLER_H_ */

50
f1ll/inc/f1ll/dma_helper.h
View file

@ -1,50 +0,0 @@
/*
* ll_dmahelper.h
*
* Created on: Oct 25, 2019
* Author: abody
*/
#ifndef LL_DMAHELPER_H_
#define LL_DMAHELPER_H_
#include <inttypes.h>
#include <platform/dma_ll.h>
namespace f1ll
{
class dma_helper
{
public:
dma_helper(DMA_TypeDef *dma, uint32_t channel);
dma_helper(dma_helper const &base) = default;
inline DMA_TypeDef *get_dma() const { return m_dma; }
inline uint32_t get_channel() const { return m_channel; }
inline volatile uint32_t *get_is_reg() const { return m_is_reg; }
inline volatile uint32_t *get_ifc_reg() const { return m_ifc_reg; }
inline uint32_t get_te_mask() const { return m_te_masks[m_channel - 1]; }
inline uint32_t get_ht_mask() const { return m_ht_masks[m_channel - 1]; }
inline uint32_t get_tc_mask() const { return m_tc_masks[m_channel - 1]; }
inline uint32_t get_gi_mask() const { return m_gi_masks[m_channel - 1]; }
inline bool is_enabled_it_te() { return LL_DMA_IsEnabledIT_TE(m_dma, m_channel) != 0; }
inline bool is_enabled_it_ht() { return LL_DMA_IsEnabledIT_HT(m_dma, m_channel) != 0; }
inline bool is_enabled_it_tc() { return LL_DMA_IsEnabledIT_TC(m_dma, m_channel) != 0; }
private:
DMA_TypeDef *m_dma;
uint32_t m_channel;
volatile uint32_t *m_is_reg;
volatile uint32_t *m_ifc_reg;
static const uint32_t m_te_masks[7];
static const uint32_t m_ht_masks[7];
static const uint32_t m_tc_masks[7];
static const uint32_t m_gi_masks[7];
};
} /* namespace f4ll */
#endif /* LL_DMAHELPER_H_ */