diff --git a/.mxproject b/.mxproject index 7d41268..451cc75 100644 --- a/.mxproject +++ b/.mxproject @@ -1,5 +1,5 @@ [PreviousLibFiles] -LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; +LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usart.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; [PreviousUsedCubeIDEFiles] SourceFiles=Src/main.c;Src/gpio.c;Src/usart.c;Src/stm32f1xx_it.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;;; @@ -7,13 +7,13 @@ HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/In CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;STM32F103xB;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1; [PreviousUsedCMakes] -SourceFiles=Src/main.c;Src/gpio.c;Src/usart.c;Src/stm32f1xx_it.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;;; +SourceFiles=Src/main.c;Src/gpio.c;Src/dma.c;Src/usart.c;Src/stm32f1xx_it.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Src/system_stm32f1xx.c;;; HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Inc; CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;STM32F103xB;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1; [PreviousGenFiles] HeaderPath=../Inc -HeaderFiles=gpio.h;usart.h;stm32f1xx_it.h;stm32_assert.h;main.h; +HeaderFiles=gpio.h;dma.h;usart.h;stm32f1xx_it.h;stm32_assert.h;main.h; SourcePath=../Src -SourceFiles=gpio.c;usart.c;stm32f1xx_it.c;main.c; +SourceFiles=gpio.c;dma.c;usart.c;stm32f1xx_it.c;main.c; diff --git a/CMakeLists.txt b/CMakeLists.txt index 1fb74df..66bb860 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -12,6 +12,8 @@ set(CMAKE_C_STANDARD 11) set(CMAKE_C_STANDARD_REQUIRED ON) set(CMAKE_C_EXTENSIONS ON) +set(CMAKE_CXX_STANDARD 14) +set(CMAKE_CXX_STANDARD_REQUIRED ON) # Define the build type if(NOT CMAKE_BUILD_TYPE) @@ -32,13 +34,20 @@ project(${CMAKE_PROJECT_NAME}) message("Build type: " ${CMAKE_BUILD_TYPE}) # Enable CMake support for ASM and C languages -enable_language(C ASM) +enable_language(C CXX ASM) # Create an executable object type add_executable(${CMAKE_PROJECT_NAME}) # Add STM32CubeMX generated sources add_subdirectory(cmake/stm32cubemx) +add_subdirectory(platform) +add_subdirectory(app) +add_subdirectory(f1ll) + +target_link_libraries(stm32cubemx INTERFACE + app +) # Link directories setup target_link_directories(${CMAKE_PROJECT_NAME} PRIVATE @@ -65,6 +74,9 @@ target_link_libraries(${CMAKE_PROJECT_NAME} stm32cubemx # Add user defined libraries + # platform + # f1ll + app ) # Poor quality LL code from ST diff --git a/Inc/dma.h b/Inc/dma.h new file mode 100644 index 0000000..b874495 --- /dev/null +++ b/Inc/dma.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file dma.h + * @brief This file contains all the function prototypes for + * the dma.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __DMA_H__ +#define __DMA_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* DMA memory to memory transfer handles -------------------------------------*/ + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_DMA_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __DMA_H__ */ + diff --git a/Inc/main.h b/Inc/main.h index 3fcb061..31c1ea6 100644 --- a/Inc/main.h +++ b/Inc/main.h @@ -28,6 +28,7 @@ extern "C" { /* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_ll_dma.h" #include "stm32f1xx_ll_rcc.h" #include "stm32f1xx_ll_bus.h" #include "stm32f1xx_ll_system.h" @@ -35,7 +36,6 @@ extern "C" { #include "stm32f1xx_ll_cortex.h" #include "stm32f1xx_ll_utils.h" #include "stm32f1xx_ll_pwr.h" -#include "stm32f1xx_ll_dma.h" #include "stm32f1xx_ll_usart.h" #include "stm32f1xx_ll_gpio.h" diff --git a/Inc/stm32f1xx_it.h b/Inc/stm32f1xx_it.h index b2c5d4f..1799f3e 100644 --- a/Inc/stm32f1xx_it.h +++ b/Inc/stm32f1xx_it.h @@ -55,6 +55,8 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); +void DMA1_Channel4_IRQHandler(void); +void DMA1_Channel5_IRQHandler(void); void USART1_IRQHandler(void); /* USER CODE BEGIN EFP */ diff --git a/Src/dma.c b/Src/dma.c new file mode 100644 index 0000000..0e0f70d --- /dev/null +++ b/Src/dma.c @@ -0,0 +1,59 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file dma.c + * @brief This file provides code for the configuration + * of all the requested memory to memory DMA transfers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "dma.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure DMA */ +/*----------------------------------------------------------------------------*/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** + * Enable DMA controller clock + */ +void MX_DMA_Init(void) +{ + + /* Init with LL driver */ + /* DMA controller clock enable */ + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); + + /* DMA interrupt init */ + /* DMA1_Channel4_IRQn interrupt configuration */ + NVIC_SetPriority(DMA1_Channel4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + NVIC_EnableIRQ(DMA1_Channel4_IRQn); + /* DMA1_Channel5_IRQn interrupt configuration */ + NVIC_SetPriority(DMA1_Channel5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + NVIC_EnableIRQ(DMA1_Channel5_IRQn); + +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ + diff --git a/Src/main.c b/Src/main.c index f1484a7..fabea7d 100644 --- a/Src/main.c +++ b/Src/main.c @@ -18,11 +18,13 @@ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" -#include "usart.h" +#include "dma.h" #include "gpio.h" +#include "usart.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ +#include /* USER CODE END Includes */ @@ -66,11 +68,10 @@ void SendStr(char const *str) { /* USER CODE END 0 */ /** - * @brief The application entry point. - * @retval int - */ -int main(void) -{ + * @brief The application entry point. + * @retval int + */ +int main(void) { /* USER CODE BEGIN 1 */ @@ -78,7 +79,8 @@ int main(void) /* MCU Configuration--------------------------------------------------------*/ - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + /* Reset of all peripherals, Initializes the Flash interface and the Systick. + */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); @@ -86,7 +88,7 @@ int main(void) NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled - */ + */ LL_GPIO_AF_Remap_SWJ_NOJTAG(); /* USER CODE BEGIN Init */ @@ -102,6 +104,7 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); + MX_DMA_Init(); MX_USART1_UART_Init(); /* USER CODE BEGIN 2 */ @@ -109,52 +112,39 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while (1) { - SendStr("Hello world!\r\n"); - LL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); - LL_mDelay(500); + app_main(); + /* USER CODE END WHILE */ - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - } + /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ } /** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) { LL_FLASH_SetLatency(LL_FLASH_LATENCY_2); - while(LL_FLASH_GetLatency()!= LL_FLASH_LATENCY_2) - { + while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2) { } LL_RCC_HSE_Enable(); - /* Wait till HSE is ready */ - while(LL_RCC_HSE_IsReady() != 1) - { - + /* Wait till HSE is ready */ + while (LL_RCC_HSE_IsReady() != 1) { } LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9); LL_RCC_PLL_Enable(); - /* Wait till PLL is ready */ - while(LL_RCC_PLL_IsReady() != 1) - { - + /* Wait till PLL is ready */ + while (LL_RCC_PLL_IsReady() != 1) { } LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2); LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); - /* Wait till System clock is ready */ - while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) - { - + /* Wait till System clock is ready */ + while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) { } LL_Init1msTick(72000000); LL_SetSystemCoreClock(72000000); @@ -165,11 +155,10 @@ void SystemClock_Config(void) /* USER CODE END 4 */ /** - * @brief This function is executed in case of error occurrence. - * @retval None - */ -void Error_Handler(void) -{ + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); @@ -178,16 +167,15 @@ void Error_Handler(void) /* USER CODE END Error_Handler_Debug */ } -#ifdef USE_FULL_ASSERT +#ifdef USE_FULL_ASSERT /** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t *file, uint32_t line) -{ + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, diff --git a/Src/stm32f1xx_it.c b/Src/stm32f1xx_it.c index 1e8f527..bc84c8a 100644 --- a/Src/stm32f1xx_it.c +++ b/Src/stm32f1xx_it.c @@ -1,27 +1,31 @@ /* USER CODE BEGIN Header */ /** - ****************************************************************************** - * @file stm32f1xx_it.c - * @brief Interrupt Service Routines. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ -#include "main.h" #include "stm32f1xx_it.h" +#include "main.h" + /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ + +#include + /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -64,85 +68,74 @@ /* Cortex-M3 Processor Interruption and Exception Handlers */ /******************************************************************************/ /** - * @brief This function handles Non maskable interrupt. - */ -void NMI_Handler(void) -{ + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) { /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - while (1) - { + while (1) { } /* USER CODE END NonMaskableInt_IRQn 1 */ } /** - * @brief This function handles Hard fault interrupt. - */ -void HardFault_Handler(void) -{ + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ - while (1) - { + while (1) { /* USER CODE BEGIN W1_HardFault_IRQn 0 */ /* USER CODE END W1_HardFault_IRQn 0 */ } } /** - * @brief This function handles Memory management fault. - */ -void MemManage_Handler(void) -{ + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) { /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - { + while (1) { /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ /* USER CODE END W1_MemoryManagement_IRQn 0 */ } } /** - * @brief This function handles Prefetch fault, memory access fault. - */ -void BusFault_Handler(void) -{ + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) { /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ - while (1) - { + while (1) { /* USER CODE BEGIN W1_BusFault_IRQn 0 */ /* USER CODE END W1_BusFault_IRQn 0 */ } } /** - * @brief This function handles Undefined instruction or illegal state. - */ -void UsageFault_Handler(void) -{ + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) { /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ - while (1) - { + while (1) { /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ /* USER CODE END W1_UsageFault_IRQn 0 */ } } /** - * @brief This function handles System service call via SWI instruction. - */ -void SVC_Handler(void) -{ + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) { /* USER CODE BEGIN SVCall_IRQn 0 */ /* USER CODE END SVCall_IRQn 0 */ @@ -152,10 +145,9 @@ void SVC_Handler(void) } /** - * @brief This function handles Debug monitor. - */ -void DebugMon_Handler(void) -{ + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) { /* USER CODE BEGIN DebugMonitor_IRQn 0 */ /* USER CODE END DebugMonitor_IRQn 0 */ @@ -165,10 +157,9 @@ void DebugMon_Handler(void) } /** - * @brief This function handles Pendable request for system service. - */ -void PendSV_Handler(void) -{ + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) { /* USER CODE BEGIN PendSV_IRQn 0 */ /* USER CODE END PendSV_IRQn 0 */ @@ -178,10 +169,9 @@ void PendSV_Handler(void) } /** - * @brief This function handles System tick timer. - */ -void SysTick_Handler(void) -{ + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) { /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ @@ -199,10 +189,33 @@ void SysTick_Handler(void) /******************************************************************************/ /** - * @brief This function handles USART1 global interrupt. - */ -void USART1_IRQHandler(void) -{ + * @brief This function handles DMA1 channel4 global interrupt. + */ +void DMA1_Channel4_IRQHandler(void) { + /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */ + dma1_channel4_irq_handler(); + /* USER CODE END DMA1_Channel4_IRQn 0 */ + /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */ + + /* USER CODE END DMA1_Channel4_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 channel5 global interrupt. + */ +void DMA1_Channel5_IRQHandler(void) { + /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */ + dma1_channel5_irq_handler(); + /* USER CODE END DMA1_Channel5_IRQn 0 */ + /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */ + + /* USER CODE END DMA1_Channel5_IRQn 1 */ +} + +/** + * @brief This function handles USART1 global interrupt. + */ +void USART1_IRQHandler(void) { /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ diff --git a/Src/usart.c b/Src/usart.c index a5f3ea8..b9a5bda 100644 --- a/Src/usart.c +++ b/Src/usart.c @@ -55,6 +55,38 @@ void MX_USART1_UART_Init(void) GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING; LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + /* USART1 DMA Init */ + + /* USART1_RX Init */ + LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); + + LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PRIORITY_LOW); + + LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MODE_NORMAL); + + LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PERIPH_NOINCREMENT); + + LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MEMORY_INCREMENT); + + LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_PDATAALIGN_BYTE); + + LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_5, LL_DMA_MDATAALIGN_BYTE); + + /* USART1_TX Init */ + LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); + + LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PRIORITY_LOW); + + LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MODE_NORMAL); + + LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PERIPH_NOINCREMENT); + + LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MEMORY_INCREMENT); + + LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PDATAALIGN_BYTE); + + LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MDATAALIGN_BYTE); + /* USART1 interrupt Init */ NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); NVIC_EnableIRQ(USART1_IRQn); diff --git a/app/CMakeLists.txt b/app/CMakeLists.txt new file mode 100644 index 0000000..b75c7e5 --- /dev/null +++ b/app/CMakeLists.txt @@ -0,0 +1,10 @@ +add_library(app STATIC + src/app.cpp + src/irq_bridge.cpp +) + +target_include_directories(app PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/inc +) + +target_link_libraries(app PUBLIC stm32cubemx platform f1ll) \ No newline at end of file diff --git a/app/inc/app.h b/app/inc/app.h new file mode 100644 index 0000000..2f8b8f1 --- /dev/null +++ b/app/inc/app.h @@ -0,0 +1,11 @@ +#pragma once + +#if defined(__cplusplus) +extern "C" { +#endif + +void app_main(); + +#if defined(__cplusplus) +} +#endif diff --git a/app/inc/irq_bridge.h b/app/inc/irq_bridge.h new file mode 100644 index 0000000..9a329c5 --- /dev/null +++ b/app/inc/irq_bridge.h @@ -0,0 +1,15 @@ +#ifndef IRQ_BRIDGE_H_ +#define IRQ_BRIDGE_H_ + +#if defined(__cplusplus) +extern "C" { +#endif + +void dma1_channel4_irq_handler(); +void dma1_channel5_irq_handler(); + +#if defined(__cplusplus) +} +#endif + +#endif // IRQ_BRIDGE_H_ \ No newline at end of file diff --git a/app/src/app.cpp b/app/src/app.cpp new file mode 100644 index 0000000..32c975b --- /dev/null +++ b/app/src/app.cpp @@ -0,0 +1,15 @@ +#include + +#include + +#include + +void app_main() { + f1ll::console_handler::init(USART1, DMA1, LL_DMA_CHANNEL_5, LL_DMA_CHANNEL_4); + + while (true) { + f1ll::console_handler::instance().print("->> Hello <<-\r\n"); + LL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); + LL_mDelay(500); + } +} \ No newline at end of file diff --git a/app/src/irq_bridge.cpp b/app/src/irq_bridge.cpp new file mode 100644 index 0000000..7cc11cc --- /dev/null +++ b/app/src/irq_bridge.cpp @@ -0,0 +1,11 @@ +#include + +#include + +void dma1_channel4_irq_handler() { + f1ll::console_handler::instance().tx_dma_isr(); +} + +void dma1_channel5_irq_handler() { + f1ll::console_handler::instance().rx_dma_isr(); +} diff --git a/cmake/stm32cubemx/CMakeLists.txt b/cmake/stm32cubemx/CMakeLists.txt index cdc53ea..7b92cd1 100644 --- a/cmake/stm32cubemx/CMakeLists.txt +++ b/cmake/stm32cubemx/CMakeLists.txt @@ -28,6 +28,7 @@ set(MX_Include_Dirs set(MX_Application_Src ${CMAKE_SOURCE_DIR}/Src/main.c ${CMAKE_SOURCE_DIR}/Src/gpio.c + ${CMAKE_SOURCE_DIR}/Src/dma.c ${CMAKE_SOURCE_DIR}/Src/usart.c ${CMAKE_SOURCE_DIR}/Src/stm32f1xx_it.c ${CMAKE_SOURCE_DIR}/Src/sysmem.c @@ -39,10 +40,10 @@ set(MX_Application_Src set(STM32_Drivers_Src ${CMAKE_SOURCE_DIR}/Src/system_stm32f1xx.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c + ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c - ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ${CMAKE_SOURCE_DIR}/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c ) diff --git a/f103c8_minimal_ll.ioc b/f103c8_minimal_ll.ioc index 15cf06a..20b8995 100644 --- a/f103c8_minimal_ll.ioc +++ b/f103c8_minimal_ll.ioc @@ -2,16 +2,38 @@ CAD.formats= CAD.pinconfig= CAD.provider= +Dma.Request0=USART1_RX +Dma.Request1=USART1_TX +Dma.RequestsNb=2 +Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.USART1_RX.0.Instance=DMA1_Channel5 +Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE +Dma.USART1_RX.0.Mode=DMA_NORMAL +Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE +Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW +Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority +Dma.USART1_TX.1.Direction=DMA_MEMORY_TO_PERIPH +Dma.USART1_TX.1.Instance=DMA1_Channel4 +Dma.USART1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART1_TX.1.MemInc=DMA_MINC_ENABLE +Dma.USART1_TX.1.Mode=DMA_NORMAL +Dma.USART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE +Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW +Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority File.Version=6 GPIO.groupedBy= KeepUserPlacement=false Mcu.CPN=STM32F103C8T6 Mcu.Family=STM32F1 -Mcu.IP0=NVIC -Mcu.IP1=RCC -Mcu.IP2=SYS -Mcu.IP3=USART1 -Mcu.IPNb=4 +Mcu.IP0=DMA +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SYS +Mcu.IP4=USART1 +Mcu.IPNb=5 Mcu.Name=STM32F103C(8-B)Tx Mcu.Package=LQFP48 Mcu.Pin0=PC13-TAMPER-RTC @@ -31,6 +53,8 @@ Mcu.UserName=STM32F103C8Tx MxCube.Version=6.14.1 MxDb.Version=DB.6.0.141 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.DMA1_Channel4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true +NVIC.DMA1_Channel5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false @@ -93,7 +117,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_USART1_UART_Init-USART1-false-LL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_DMA_Init-DMA-false-LL-true,4-MX_USART1_UART_Init-USART1-false-LL-true RCC.ADCFreqValue=36000000 RCC.AHBFreq_Value=72000000 RCC.APB1CLKDivider=RCC_HCLK_DIV2 diff --git a/f1ll/CMakeLists.txt b/f1ll/CMakeLists.txt new file mode 100644 index 0000000..6277fa8 --- /dev/null +++ b/f1ll/CMakeLists.txt @@ -0,0 +1,12 @@ +add_library(f1ll STATIC + src/usart_core.cpp + src/dma_helper.cpp + src/str_util.cpp + src/console_handler.cpp +) + +target_include_directories(f1ll PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/inc +) + +target_link_libraries(f1ll PUBLIC platform stm32cubemx) diff --git a/f1ll/inc/f1ll/console_handler.h b/f1ll/inc/f1ll/console_handler.h new file mode 100644 index 0000000..c85122b --- /dev/null +++ b/f1ll/inc/f1ll/console_handler.h @@ -0,0 +1,44 @@ +/* + * ll_consolehandler.h + * + * Created on: Nov 7, 2019 + * Author: abody + */ + +#ifndef LL_CONSOLEHANDLER_H_ +#define LL_CONSOLEHANDLER_H_ + +#include "f1ll/usart_core.h" +#include "singleton.h" + +namespace f1ll { + +class console_handler : public usart_core, public singleton { + friend class singleton; + +public: + void print(char const *s); + +private: + console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channelRx, + uint32_t channelTx); + + // LL_UsartCore pure virtual function implementations + virtual void receiver_idle(void); + virtual void transmission_complete(void); + virtual void framing_error(void); + virtual void overrun(void); + virtual void rx_dma_transfer_complete(void); + virtual void rx_dma_half_transfer(void); + virtual void rx_dma_error(void); + virtual void tx_dma_transfer_complete(void); + virtual void tx_dma_half_transfer(void); + virtual void tx_dma_error(void); + + char m_buffer[128]; + uint16_t m_used = 0; +}; + +} // namespace f1ll + +#endif /* LL_CONSOLEHANDLER_H_ */ diff --git a/f1ll/inc/f1ll/dma_helper.h b/f1ll/inc/f1ll/dma_helper.h new file mode 100644 index 0000000..466121d --- /dev/null +++ b/f1ll/inc/f1ll/dma_helper.h @@ -0,0 +1,50 @@ +/* + * ll_dmahelper.h + * + * Created on: Oct 25, 2019 + * Author: abody + */ + +#ifndef LL_DMAHELPER_H_ +#define LL_DMAHELPER_H_ + +#include +#include + +namespace f1ll +{ + + class dma_helper + { + public: + dma_helper(DMA_TypeDef *dma, uint32_t channel); + dma_helper(dma_helper const &base) = default; + + inline DMA_TypeDef *get_dma() const { return m_dma; } + inline uint32_t get_channel() const { return m_channel; } + inline volatile uint32_t *get_is_reg() const { return m_is_reg; } + inline volatile uint32_t *get_ifc_reg() const { return m_ifc_reg; } + inline uint32_t get_te_mask() const { return m_te_masks[m_channel - 1]; } + inline uint32_t get_ht_mask() const { return m_ht_masks[m_channel - 1]; } + inline uint32_t get_tc_mask() const { return m_tc_masks[m_channel - 1]; } + inline uint32_t get_gi_mask() const { return m_gi_masks[m_channel - 1]; } + + inline bool is_enabled_it_te() { return LL_DMA_IsEnabledIT_TE(m_dma, m_channel) != 0; } + inline bool is_enabled_it_ht() { return LL_DMA_IsEnabledIT_HT(m_dma, m_channel) != 0; } + inline bool is_enabled_it_tc() { return LL_DMA_IsEnabledIT_TC(m_dma, m_channel) != 0; } + + private: + DMA_TypeDef *m_dma; + uint32_t m_channel; + volatile uint32_t *m_is_reg; + volatile uint32_t *m_ifc_reg; + + static const uint32_t m_te_masks[7]; + static const uint32_t m_ht_masks[7]; + static const uint32_t m_tc_masks[7]; + static const uint32_t m_gi_masks[7]; + }; + +} /* namespace f4ll */ + +#endif /* LL_DMAHELPER_H_ */ diff --git a/f1ll/inc/f1ll/singleton.h b/f1ll/inc/f1ll/singleton.h new file mode 100644 index 0000000..92a6c93 --- /dev/null +++ b/f1ll/inc/f1ll/singleton.h @@ -0,0 +1,24 @@ +#ifndef SINGLETON_H_ +#define SINGLETON_H_ + +#include + +template class singleton { +public: + static T &instance() { return *m_instance; } + template static T &init(args_t &&...args) { + static T instance{std::forward(args)...}; + m_instance = &instance; + return instance; + } + +protected: + singleton() = default; + singleton(const singleton &) = delete; + singleton &operator=(const singleton &) = delete; + static T *m_instance; +}; + +template T *singleton::m_instance = nullptr; + +#endif /* SINGLETON_H_ */ diff --git a/f1ll/inc/f1ll/str_util.h b/f1ll/inc/f1ll/str_util.h new file mode 100644 index 0000000..49ddc39 --- /dev/null +++ b/f1ll/inc/f1ll/str_util.h @@ -0,0 +1,31 @@ +/* + * strutil.h + * + * Created on: Feb 11, 2017 + * Author: compi + */ + +#ifndef _STM32PLUS_STRUTIL_H_ +#define _STM32PLUS_STRUTIL_H_ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +////////////////////////////////////////////////////////////////////////////// +size_t strcpy_ex(char *dst, char const *src); +size_t uitodec(char* buffer, uint32_t data); +size_t uitohex(char* buffer, uint32_t data, uint8_t chars); +size_t itodec(char* buffer, int data); +size_t itohex(char* buffer, int data); +void strrev(char *first, char *last); +char tochr(const uint8_t in, const uint8_t upper); + +#ifdef __cplusplus +} +#endif + +#endif /* _STM32PLUS_STRUTIL_H_ */ diff --git a/f1ll/inc/f1ll/usart_core.h b/f1ll/inc/f1ll/usart_core.h new file mode 100644 index 0000000..c013f91 --- /dev/null +++ b/f1ll/inc/f1ll/usart_core.h @@ -0,0 +1,55 @@ +/* + * ll_dmadrivenusartcore.h + * + * Created on: Nov 4, 2019 + * Author: abody + */ + +#ifndef LL_USARTCORE_H_ +#define LL_USARTCORE_H_ +#include + +#include "f1ll/dma_helper.h" + +namespace f1ll { + +class usart_core { +public: + static inline void usart_irq(usart_core *_this) { _this->usart_isr(); } + static inline void rx_dma_irq(usart_core *_this) { _this->rx_dma_isr(); } + static inline void tx_dma_irq(usart_core *_this) { _this->tx_dma_isr(); } + + void setup_transmit(void const *buffer, uint16_t length); + void setup_receive(void *buffer, uint16_t length); + +protected: + usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, uint32_t channel_rx, + uint32_t stream_tx); + + USART_TypeDef *m_usart; + dma_helper m_rxDma; + dma_helper m_txDma; + +private: + virtual void receiver_idle(void) = 0; + virtual void transmission_complete(void) = 0; + virtual void framing_error(void) = 0; + virtual void overrun(void) = 0; + + virtual void rx_dma_transfer_complete(void) = 0; + virtual void rx_dma_half_transfer(void) = 0; + virtual void rx_dma_error(void) = 0; + + virtual void tx_dma_transfer_complete(void) = 0; + virtual void tx_dma_half_transfer(void) = 0; + virtual void tx_dma_error(void) = 0; + +public: + void usart_isr(); + void rx_dma_isr(); + void tx_dma_isr(); +}; + +} // namespace f1ll + +#endif /* LL_USARTCORE_H_ */ diff --git a/f1ll/src/console_handler.cpp b/f1ll/src/console_handler.cpp new file mode 100644 index 0000000..ce1e578 --- /dev/null +++ b/f1ll/src/console_handler.cpp @@ -0,0 +1,37 @@ +/* + * ll_consolehandler.cpp + * + * Created on: Nov 7, 2019 + * Author: abody + */ + +#include +#include + +namespace f1ll { + +console_handler::console_handler(USART_TypeDef *usart, DMA_TypeDef *dma, + uint32_t channelRx, uint32_t channelTx) + : usart_core(usart, dma, channelRx, channelTx) {} + +void console_handler::receiver_idle(void) {} +void console_handler::transmission_complete(void) {} +void console_handler::framing_error(void) {} +void console_handler::overrun(void) {} +void console_handler::rx_dma_transfer_complete(void) {} +void console_handler::rx_dma_half_transfer(void) {} +void console_handler::rx_dma_error(void) {} +void console_handler::tx_dma_transfer_complete(void) { + LL_USART_EnableIT_TC(m_usart); + LL_DMA_DisableChannel(m_txDma.get_dma(), m_txDma.get_channel()); +} +void console_handler::tx_dma_half_transfer(void) {} +void console_handler::tx_dma_error(void) {} + +void console_handler::print(char const *s) { + size_t len = strlen(s); + strncpy(m_buffer, s, sizeof(m_buffer)); + setup_transmit(m_buffer, len > sizeof(m_buffer) ? sizeof(m_buffer) : len); +} + +} // namespace f1ll diff --git a/f1ll/src/dma_helper.cpp b/f1ll/src/dma_helper.cpp new file mode 100644 index 0000000..25b2985 --- /dev/null +++ b/f1ll/src/dma_helper.cpp @@ -0,0 +1,38 @@ +/* +q * ll_dmahelper.cpp + * + * Created on: Oct 25, 2019 + * Author: abody + */ + +#include + +namespace f1ll { + +const uint32_t dma_helper::m_te_masks[7] = { + DMA_ISR_TEIF1, DMA_ISR_TEIF2, DMA_ISR_TEIF3, DMA_ISR_TEIF4, + DMA_ISR_TEIF5, DMA_ISR_TEIF6, DMA_ISR_TEIF7}; +const uint32_t dma_helper::m_ht_masks[7] = { + DMA_ISR_HTIF1, DMA_ISR_HTIF2, DMA_ISR_HTIF3, DMA_ISR_HTIF4, + DMA_ISR_HTIF5, DMA_ISR_HTIF6, DMA_ISR_HTIF7}; +const uint32_t dma_helper::m_tc_masks[7] = { + DMA_ISR_TCIF1, DMA_ISR_TCIF2, DMA_ISR_TCIF3, DMA_ISR_TCIF4, + DMA_ISR_TCIF5, DMA_ISR_TCIF6, DMA_ISR_TCIF7}; +const uint32_t dma_helper::m_gi_masks[7] = { + DMA_ISR_GIF1, DMA_ISR_GIF2, DMA_ISR_GIF3, DMA_ISR_GIF4, + DMA_ISR_GIF5, DMA_ISR_GIF6, DMA_ISR_GIF7}; + +dma_helper::dma_helper(DMA_TypeDef *dma, uint32_t channel) + : m_dma(dma), m_channel(channel) +#ifdef DMA2 + , + m_is_reg(dma == DMA1 ? &DMA1->ISR : &DMA2->ISR), + m_ifc_reg(dma == DMA1 ? &DMA1->IFCR : &DMA2->IFCR) +#else + , + m_is_reg(&DMA1->ISR), m_ifc_reg(&DMA1->IFCR) +#endif +{ +} + +} // namespace f1ll diff --git a/f1ll/src/str_util.cpp b/f1ll/src/str_util.cpp new file mode 100644 index 0000000..88c2b35 --- /dev/null +++ b/f1ll/src/str_util.cpp @@ -0,0 +1,98 @@ +#include +#include + +////////////////////////////////////////////////////////////////////////////// +size_t strcpy_ex(char *dst, char const *src) { + size_t ret = 0; + do { + *dst++ = *src; + ++ret; + } while (*src++); + return ret - 1; +} + +////////////////////////////////////////////////////////////////////////////// +void strrev(char *first, char *last) { + char tmp; + while (last > first) { + tmp = *first; + *first++ = *last; + *last-- = tmp; + } +} + +////////////////////////////////////////////////////////////////////////////// +char tochr(const uint8_t in, const uint8_t upper) { + return in + ((in < 10) ? '0' : (upper ? 'A' : 'a') - 10); +} + +////////////////////////////////////////////////////////////////////////////// +size_t uitodec(char *buffer, uint32_t data) { + char *b2 = buffer; + if (!data) { + *b2++ = '0'; + *b2 = '\0'; + return 1; + } + + while (data) { + *b2++ = (data % 10) + '0'; + data /= 10; + } + size_t ret = b2 - buffer; + + *b2-- = 0; + + strrev(buffer, b2); + return ret; +} + +////////////////////////////////////////////////////////////////////////////// +size_t uitohex(char *buffer, uint32_t data, uint8_t chars) { + char *b2 = buffer; + size_t ret = 0; + + if (chars == 0xff || !chars) { + if (!data) { + *b2++ = '0'; + *b2 = '\0'; + return 1; + } + + while (data) { + uint8_t curval = data & 0x0f; + *b2++ = tochr(curval, 1); + data >>= 4; + } + ret = b2 - buffer; + + } else { + ret = chars; + for (uint8_t pos = 0; pos < (uint8_t)ret; ++pos) { + *b2++ = tochr(data & 0x0f, 1); + data >>= 4; + } + } + *b2-- = 0; + strrev(buffer, b2); + return ret; +} + +////////////////////////////////////////////////////////////////////////////// +size_t itodec(char *buffer, int data) { + if (data < 0) { + *buffer++ = '-'; + return uitodec(buffer, -data) + 1; + } + + return uitodec(buffer, data); +} + +////////////////////////////////////////////////////////////////////////////// +size_t itohex(char *buffer, int data) { + if (data < 0) { + *buffer++ = '-'; + return uitohex(buffer, -data, 0) + 1; + } + return uitohex(buffer, data, 0); +} diff --git a/f1ll/src/usart_core.cpp b/f1ll/src/usart_core.cpp new file mode 100644 index 0000000..91da187 --- /dev/null +++ b/f1ll/src/usart_core.cpp @@ -0,0 +1,119 @@ +/* + * ll_dmadrivenusartcore.cpp + * + * Created on: Nov 4, 2019 + * Author: abody + */ + +#include + +namespace f1ll { + +usart_core::usart_core(USART_TypeDef *usart, DMA_TypeDef *dma, + uint32_t channelRx, uint32_t channelTx) + : m_usart(usart), m_rxDma(dma, channelRx), m_txDma(dma, channelTx) { + uint32_t status = usart->SR; + volatile uint32_t tmpreg = + usart->DR; // clearing some of the error/status bits in the USART + (void)tmpreg; + (void)status; + + *m_txDma.get_ifc_reg() = m_txDma.get_gi_mask(); + *m_rxDma.get_ifc_reg() = m_rxDma.get_gi_mask(); + + LL_DMA_EnableIT_HT(dma, channelRx); + LL_DMA_EnableIT_TC(dma, channelRx); + LL_DMA_EnableIT_TE(dma, channelRx); + LL_DMA_EnableIT_HT(dma, channelTx); + LL_DMA_EnableIT_TC(dma, channelTx); + LL_DMA_EnableIT_TE(dma, channelTx); +} + +void usart_core::usart_isr() { + uint32_t status = m_usart->SR; + volatile uint32_t tmpreg = + m_usart->DR; // clearing some of the error/status bits in the HW + (void)tmpreg; + + if (LL_USART_IsEnabledIT_TC(m_usart) && + LL_USART_IsActiveFlag_TC(m_usart)) { // transmission complete + LL_USART_DisableIT_TC(m_usart); + transmission_complete(); + } + if (LL_USART_IsEnabledIT_IDLE(m_usart) && (status & USART_SR_IDLE)) { + receiver_idle(); + } + if (LL_USART_IsEnabledIT_ERROR(m_usart)) { + if (status & USART_SR_FE) { + framing_error(); + } + if (status & USART_SR_ORE) { + overrun(); + } + } +} + +void usart_core::rx_dma_isr() { + if (*m_rxDma.get_is_reg() & m_rxDma.get_tc_mask()) { + *m_rxDma.get_ifc_reg() = m_rxDma.get_tc_mask(); + if (m_rxDma.is_enabled_it_tc()) { + rx_dma_transfer_complete(); + } + } + if (*m_rxDma.get_is_reg() & m_rxDma.get_ht_mask()) { + *m_rxDma.get_ifc_reg() = m_rxDma.get_ht_mask(); + if (m_rxDma.is_enabled_it_ht()) { + rx_dma_half_transfer(); + } + } + if (*m_rxDma.get_is_reg() & m_rxDma.get_te_mask()) { + *m_rxDma.get_ifc_reg() = m_rxDma.get_te_mask(); + if (m_rxDma.is_enabled_it_te()) { + rx_dma_error(); + } + } +} + +void usart_core::tx_dma_isr() { + if (*m_txDma.get_is_reg() & m_txDma.get_tc_mask()) { // DMA transfer complete + *m_txDma.get_ifc_reg() = m_txDma.get_tc_mask(); + if (m_txDma.is_enabled_it_tc()) { + tx_dma_transfer_complete(); + } + } + if (*m_txDma.get_is_reg() & m_txDma.get_ht_mask()) { + *m_txDma.get_ifc_reg() = m_txDma.get_ht_mask(); + if (m_txDma.is_enabled_it_ht()) { + tx_dma_half_transfer(); + } + } + if (*m_txDma.get_is_reg() & m_txDma.get_te_mask()) { + *m_txDma.get_ifc_reg() = m_txDma.get_te_mask(); + if (m_txDma.is_enabled_it_te()) { + tx_dma_error(); + } + } +} + +void usart_core::setup_transmit(void const *buffer, uint16_t length) { + LL_DMA_ConfigAddresses(m_txDma.get_dma(), m_txDma.get_channel(), + reinterpret_cast(buffer), + LL_USART_DMA_GetRegAddr(m_usart), + LL_DMA_DIRECTION_MEMORY_TO_PERIPH); + LL_DMA_SetDataLength(m_txDma.get_dma(), m_txDma.get_channel(), length); + LL_USART_EnableDMAReq_TX(m_usart); + LL_DMA_EnableChannel(m_txDma.get_dma(), m_txDma.get_channel()); +} + +void usart_core::setup_receive(void *buffer, uint16_t length) { + LL_DMA_ConfigAddresses(m_rxDma.get_dma(), m_rxDma.get_channel(), + LL_USART_DMA_GetRegAddr(m_usart), + reinterpret_cast(buffer), + LL_DMA_DIRECTION_PERIPH_TO_MEMORY); + LL_DMA_SetDataLength(m_rxDma.get_dma(), m_rxDma.get_channel(), length); + LL_USART_EnableDMAReq_RX(m_usart); + LL_USART_ClearFlag_ORE(m_usart); + LL_DMA_EnableChannel(m_rxDma.get_dma(), m_rxDma.get_channel()); +} + +} // namespace f1ll diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt new file mode 100644 index 0000000..5cb5ca4 --- /dev/null +++ b/platform/CMakeLists.txt @@ -0,0 +1,13 @@ +cmake_minimum_required(VERSION 3.22) + +add_library(platform INTERFACE) + +# Enable CMake support for ASM and C languages +enable_language(C CXX ASM) + +target_include_directories(platform INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}) + +target_link_libraries(platform INTERFACE) + + + diff --git a/platform/platform/crc_ll.h b/platform/platform/crc_ll.h new file mode 100644 index 0000000..f10b7bc --- /dev/null +++ b/platform/platform/crc_ll.h @@ -0,0 +1,6 @@ +#ifndef __PLATFORM_CRC_LL_H_INCLUDED +#define __PLATFORM_CRC_LL_H_INCLUDED + +#include "crc.h" + +#endif // __PLATFORM_CRC_LL_H_INCLUDED diff --git a/platform/platform/dma_ll.h b/platform/platform/dma_ll.h new file mode 100644 index 0000000..23feb1d --- /dev/null +++ b/platform/platform/dma_ll.h @@ -0,0 +1,6 @@ +#ifndef __PLATFORM_DMA_LL_H_INCLUDED +#define __PLATFORM_DMA_LL_H_INCLUDED + +#include "stm32f1xx_ll_dma.h" + +#endif // __PLATFORM_DMA_LL_H_INCLUDED diff --git a/platform/platform/gpio_ll.h b/platform/platform/gpio_ll.h new file mode 100644 index 0000000..be05b2f --- /dev/null +++ b/platform/platform/gpio_ll.h @@ -0,0 +1,6 @@ +#ifndef __PLATFORM_USART_LL_H_INCLUDED +#define __PLATFORM_USART_LL_H_INCLUDED + +#include + +#endif // __PLATFORM_USART_LL_H_INCLUDED diff --git a/platform/platform/usart_ll.h b/platform/platform/usart_ll.h new file mode 100644 index 0000000..1655e65 --- /dev/null +++ b/platform/platform/usart_ll.h @@ -0,0 +1,6 @@ +#ifndef __PLATFORM_USART_LL_H_INCLUDED +#define __PLATFORM_USART_LL_H_INCLUDED + +#include + +#endif // __PLATFORM_USART_LL_H_INCLUDED diff --git a/platform/platform/utils_ll.h b/platform/platform/utils_ll.h new file mode 100644 index 0000000..d14606d --- /dev/null +++ b/platform/platform/utils_ll.h @@ -0,0 +1,6 @@ +#ifndef __PLATFORM_USART_LL_H_INCLUDED +#define __PLATFORM_USART_LL_H_INCLUDED + +#include + +#endif // __PLATFORM_USART_LL_H_INCLUDED